| Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| GuanXuetao | 96cf518 | 2011-01-15 18:23:09 +0800 | [diff] [blame] | 2 | /* |
| 3 | * linux/arch/unicore32/include/asm/assembler.h |
| 4 | * |
| 5 | * Code specific to PKUnity SoC and UniCore ISA |
| 6 | * |
| 7 | * Copyright (C) 2001-2010 GUAN Xue-tao |
| 8 | * |
| GuanXuetao | 96cf518 | 2011-01-15 18:23:09 +0800 | [diff] [blame] | 9 | * Do not include any C declarations in this file - it is included by |
| 10 | * assembler source. |
| 11 | */ |
| 12 | #ifndef __ASSEMBLY__ |
| 13 | #error "Only include this from assembly code" |
| 14 | #endif |
| 15 | |
| 16 | #include <asm/ptrace.h> |
| 17 | |
| 18 | /* |
| 19 | * Little Endian independent macros for shifting bytes within registers. |
| 20 | */ |
| 21 | #define pull >> |
| 22 | #define push << |
| 23 | #define get_byte_0 << #0 |
| 24 | #define get_byte_1 >> #8 |
| 25 | #define get_byte_2 >> #16 |
| 26 | #define get_byte_3 >> #24 |
| 27 | #define put_byte_0 << #0 |
| 28 | #define put_byte_1 << #8 |
| 29 | #define put_byte_2 << #16 |
| 30 | #define put_byte_3 << #24 |
| 31 | |
| 32 | #define cadd cmpadd |
| 33 | #define cand cmpand |
| 34 | #define csub cmpsub |
| 35 | #define cxor cmpxor |
| 36 | |
| 37 | /* |
| 38 | * Enable and disable interrupts |
| 39 | */ |
| 40 | .macro disable_irq, temp |
| 41 | mov \temp, asr |
| 42 | andn \temp, \temp, #0xFF |
| 43 | or \temp, \temp, #PSR_I_BIT | PRIV_MODE |
| 44 | mov.a asr, \temp |
| 45 | .endm |
| 46 | |
| 47 | .macro enable_irq, temp |
| 48 | mov \temp, asr |
| 49 | andn \temp, \temp, #0xFF |
| 50 | or \temp, \temp, #PRIV_MODE |
| 51 | mov.a asr, \temp |
| 52 | .endm |
| 53 | |
| 54 | #define USER(x...) \ |
| 55 | 9999: x; \ |
| 56 | .pushsection __ex_table, "a"; \ |
| 57 | .align 3; \ |
| 58 | .long 9999b, 9001f; \ |
| 59 | .popsection |
| 60 | |
| 61 | .macro notcond, cond, nexti = .+8 |
| 62 | .ifc \cond, eq |
| 63 | bne \nexti |
| 64 | .else; .ifc \cond, ne |
| 65 | beq \nexti |
| 66 | .else; .ifc \cond, ea |
| 67 | bub \nexti |
| 68 | .else; .ifc \cond, ub |
| 69 | bea \nexti |
| 70 | .else; .ifc \cond, fs |
| 71 | bns \nexti |
| 72 | .else; .ifc \cond, ns |
| 73 | bfs \nexti |
| 74 | .else; .ifc \cond, fv |
| 75 | bnv \nexti |
| 76 | .else; .ifc \cond, nv |
| 77 | bfv \nexti |
| 78 | .else; .ifc \cond, ua |
| 79 | beb \nexti |
| 80 | .else; .ifc \cond, eb |
| 81 | bua \nexti |
| 82 | .else; .ifc \cond, eg |
| 83 | bsl \nexti |
| 84 | .else; .ifc \cond, sl |
| 85 | beg \nexti |
| 86 | .else; .ifc \cond, sg |
| 87 | bel \nexti |
| 88 | .else; .ifc \cond, el |
| 89 | bsg \nexti |
| 90 | .else; .ifnc \cond, al |
| 91 | .error "Unknown cond in notcond macro argument" |
| 92 | .endif; .endif; .endif; .endif; .endif; .endif; .endif |
| 93 | .endif; .endif; .endif; .endif; .endif; .endif; .endif |
| 94 | .endif |
| 95 | .endm |
| 96 | |
| 97 | .macro usracc, instr, reg, ptr, inc, cond, rept, abort |
| 98 | .rept \rept |
| 99 | notcond \cond, .+8 |
| 100 | 9999 : |
| 101 | .if \inc == 1 |
| 102 | \instr\()b.u \reg, [\ptr], #\inc |
| 103 | .elseif \inc == 4 |
| 104 | \instr\()w.u \reg, [\ptr], #\inc |
| 105 | .else |
| 106 | .error "Unsupported inc macro argument" |
| 107 | .endif |
| 108 | |
| 109 | .pushsection __ex_table, "a" |
| 110 | .align 3 |
| 111 | .long 9999b, \abort |
| 112 | .popsection |
| 113 | .endr |
| 114 | .endm |
| 115 | |
| 116 | .macro strusr, reg, ptr, inc, cond = al, rept = 1, abort = 9001f |
| 117 | usracc st, \reg, \ptr, \inc, \cond, \rept, \abort |
| 118 | .endm |
| 119 | |
| 120 | .macro ldrusr, reg, ptr, inc, cond = al, rept = 1, abort = 9001f |
| 121 | usracc ld, \reg, \ptr, \inc, \cond, \rept, \abort |
| 122 | .endm |
| 123 | |
| 124 | .macro nop8 |
| 125 | .rept 8 |
| 126 | nop |
| 127 | .endr |
| 128 | .endm |