fip: tools: add ddr_parse tool source for acs compressing [2/2]
PD#SWPL-19852
Problem:
LPDDR4_PHY_V_0_1_20-21 updated G12A/G12B/TL1/TM2/A1/C1 timing with
compressing tool parse, but without source, which makes it hard to
maintain the script issue, like the ramdump data corrupted issue caused
by ddr parse tool.
Solution:
Add the parse source and compile source to final tool to use, make parse
tool for each u-boot compiling.
Verify:
g12a, g12b, tl1, tm2, a1, c1 compiling pass
Change-Id: I3c65a1e3ba9393781fc89ce93a34d70025e58319
Signed-off-by: Honglin Zhang <honglin.zhang@amlogic.com>
diff --git a/variables.sh b/variables.sh
index 3bd39f7..6884ee8 100755
--- a/variables.sh
+++ b/variables.sh
@@ -35,6 +35,7 @@
declare BL33_DEFCFG1="${UBOOT_FOLDER}/${UBOOT_VERSION1}/${DEFCFG_FOLDER}"
declare BL33_DEFCFG2="${UBOOT_FOLDER}/${UBOOT_VERSION2}/${DEFCFG_FOLDER}"
+declare FIP_DDR_PARSE="${FIP_FOLDER}/tools/ddr_parse/"
# current branch/path/rev/name/remote in xml
declare -a GIT_INFO=("branch", "path", "rev", "name", "remote")
@@ -44,4 +45,4 @@
export MANIFEST
export CUR_SOC
export BOARD_DIR
-}
\ No newline at end of file
+}