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Qiufang Dai141086d2020-05-29 17:16:41 +08001/*
2 * Copyright (C) 2014-2018 Amlogic, Inc. All rights reserved.
3 *
4 * All information contained herein is Amlogic confidential.
5 *
6 * This software is provided to you pursuant to Software License Agreement
7 * (SLA) with Amlogic Inc ("Amlogic"). This software may be used
8 * only in accordance with the terms of this agreement.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification is strictly prohibited without prior written permission from
12 * Amlogic.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
15 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
16 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
17 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
18 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
19 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
20 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
24 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27/*
28 * UART driver
29 */
30
31#include "common.h"
32#include "uart.h"
33#include "register.h"
Jianxiong Pan5e711c12020-11-19 13:42:23 +080034#include "soc.h"
Qiufang Dai141086d2020-05-29 17:16:41 +080035
Jianxiong Pan5e711c12020-11-19 13:42:23 +080036//#define UART_PORT_CONS UART_B_WFIFO
Qiufang Dai141086d2020-05-29 17:16:41 +080037
38#define UART_STP_BIT UART_MODE_MASK_STP_1BIT
39#define UART_PRTY_BIT 0
40#define UART_CHAR_LEN UART_MODE_MASK_CHAR_8BIT
41#define UART_MODE_RESET_MASK \
42 (UART_MODE_MASK_RST_TX \
43 | UART_MODE_MASK_RST_RX \
44 | UART_MODE_MASK_CLR_ERR)
45
46#define UART_WFIFO (0<<2)
47#define UART_RFIFO (1<<2)
48#define UART_MODE (2<<2)
49#define UART_STATUS (3<<2)
50#define UART_IRQCTL (4<<2)
51#define UART_CTRL (5<<2)
52#define UART_MODE_MASK_STP_1BIT (0<<16)
53#define UART_MODE_MASK_CHAR_8BIT (0<<20)
54#define UART_MODE_MASK_TX_EN (1<<12)
55#define UART_MODE_MASK_RX_EN (1<<13)
56#define UART_MODE_MASK_RST_TX (1<<22)
57#define UART_MODE_MASK_RST_RX (1<<23)
58#define UART_MODE_MASK_CLR_ERR (1<<24)
59#define UART_CTRL_USE_XTAL_CLK (1<<24)
60#define UART_CTRL_USE_NEW_BAUD_RATE (1<<23)
61
62#define UART_STAT_MASK_RFIFO_FULL (1<<19)
63#define UART_STAT_MASK_RFIFO_EMPTY (1<<20)
64#define UART_STAT_MASK_TFIFO_FULL (1<<21)
65#define UART_STAT_MASK_TFIFO_EMPTY (1<<22)
66
67#define P_UART(uart_base, reg) (uart_base+reg)
68#define P_UART_WFIFO(uart_base) P_UART(uart_base, UART_WFIFO)
69#define P_UART_MODE(uart_base) P_UART(uart_base, UART_MODE)
70#define P_UART_CTRL(uart_base) P_UART(uart_base, UART_CTRL)
71#define P_UART_STATUS(uart_base) P_UART(uart_base, UART_STATUS)
72
73static int prvUartTxIsFull(void)
74{
75 return REG32(P_UART_STATUS(UART_PORT_CONS)) & UART_STAT_MASK_TFIFO_FULL;
76}
77
78void vUartTxFlush(void)
79{
80 while (!
81 (REG32(P_UART_STATUS(UART_PORT_CONS)) &
82 UART_STAT_MASK_TFIFO_EMPTY));
83}
84
85void vUartPutc(const char c)
86{
87 if (c == '\n')
88 vUartPutc('\r');
89
90 while (prvUartTxIsFull());
91 REG32(P_UART_WFIFO(UART_PORT_CONS)) = (char)c;
92 vUartTxFlush();
93}
94
95void vUartPuts(const char *s)
96{
97 while (*s)
98 vUartPutc(*s++);
99}
100
101void vUartTxStart(void)
102{
103 /* Do not allow deep sleep while transmit in progress */
104#ifdef CONFIG_LOW_POWER_IDLE
105 disable_sleep(SLEEP_MASK_UART);
106#endif
107
108 //uart_flush_output();
109}
110
111void vUartTxStop(void)
112{
113
114}
115
116long lUartTxReady(void)
117{
118 return !(REG32(P_UART_STATUS(UART_PORT_CONS)) &
119 UART_STAT_MASK_TFIFO_FULL);
120}
121#if 0
122void vUartWriteChar(char c)
123{
124 vUartPutc(c);
125}
126
127int uart_tx_char(int c)
128{
129 vUartPutc(c);
130
131 return c;
132}
133/*print BCD*/
134void print_u32_dec(unsigned int num) {
135 char buf[16];
136 char *s = buf + (sizeof(buf) / sizeof(buf[0])) - 1;
137 char *e = s;
138
139 do {
140 *--s = '0' + num % 10;
141 } while (num /= 10);
142
143 while (s < e)
144 uart_tx_char(*s++);
145}
146
147void serial_put_hex(unsigned long data, unsigned int bitlen)
148{
149 int i;
150 unsigned char s;
151
152 for (i = bitlen - 4; i >= 0; i -= 4)
153 {
154 s = (data >> i) & 0xf;
155 if (s < 10)
156 vUartPutc(0x30 + s);
157 else if (s < 16)
158 vUartPutc(0x61 + s - 10);
159 }
160}
161#endif
162#if 0
163/* Interrupt handler for console UART */
164void uart_interrupt(void)
165{
166 /* Fill output FIFO */
167 uart_process_output();
168}
169
170DECLARE_IRQ(IRQ_AO_UART_NUM, uart_interrupt, 1);
171#endif
172
173/*
174 * Set UART to 115200-8-N-1
175 *
176 * Using 24M XTAL as UART reference clock, *NOT* clk81
177 * So the clk81 can be dynamically changed and not
178 * diturb UART transfers.
179 */
180void vUartInit(void)
181{
182}