commit 7459354a git:spl branch:amlogic-dev ddr:d06bbe7
Author: zhiguang.ouyang <zhiguang.ouyang@amlogic.com>
Date: Wed Nov 27 07:44:00 2024 +0000
bl2: T5/T5D ddr bl2 src adjust refresh rate from real time soc temperature [1/1]
PD#SWPL-194663
Problem:
t5 bl2 uboot boot time cost too much
Solution:
AML_A_PHY_V_2_10
1 T5w ddr bl2 src adjust refresh rate from real time soc temperature
Verify:
test t5 skt pass
Change-Id: Ie98b260d3822c46b08e0eaaaa495a57fd74a7621
Signed-off-by: zhiguang.ouyang <zhiguang.ouyang@amlogic.com>
t5 build ok
t5 build ok
t5d build ok
t5d build ok
Change-Id: If86e8f11a7c9a434a365f90f1f813127c5cadce1
diff --git a/t5/bl2.bin b/t5/bl2.bin
index 63cb856..1a60b62 100755
--- a/t5/bl2.bin
+++ b/t5/bl2.bin
Binary files differ
diff --git a/t5d/bl2.bin b/t5d/bl2.bin
index 1261116..7c05738 100755
--- a/t5d/bl2.bin
+++ b/t5d/bl2.bin
Binary files differ