commit 1195f5e git:core branch:projects/p1 ddr:96a2d63
Author: Jian Hu <jian.hu@amlogic.com>
Date: Thu Dec 14 02:29:08 2023 +0000
pll: dsu using its own config before cpu switch to sys pll [1/1]
PD#SWPL-148273
Problem:
it will crash during BL2 when cpu frequency is 2GHz
Solution:
dsu use its own clock settings before cpu frequency
changing to 2G.
Verify:
p1
Change-Id: I473d9951495ad67d3f534de8fd12e240da1a3554
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
p1 build ok
Change-Id: I8a5d4625425a7b5ff7e4dd85771550e4cde310b1
4 files changed