commit fe7b1ec1caec8fc918f2cb27102d1eedfacf203b
author Jenkins SH <jenkins.sh@amlogic.com> Fri Nov 18 12:38:55 2022 +0000
committer Jenkins SH <jenkins.sh@amlogic.com> Fri Nov 18 12:38:55 2022 +0000
tree bb65121a3217e3d90609df2dd4a016c5b3215b79
parent fa79bf4348a10bed49ef6bc7996f6aaf574739e4

commit 62bf50e06374f44da9c1b94c12dbf31863b32861
Author: zhiguang.ouyang <zhiguang.ouyang@amlogic.com>
Date:   Thu Nov 10 14:12:03 2022 +0800

    ddr: bl2: t5 t5d sumsang F die sip AC improve [1/1]

    PD#SWPL-100795

    Problem:
    max frequency is 1608

    Solution:
    AML_A_PHY_V_1_33
    1 after AC clk add 128step, max frequency is 1800

    Verify:
    test T963-H35E pass

    Change-Id: I653a54aec3b666f406ffb9b7d18eaefa29be0d1c
    Signed-off-by: zhiguang.ouyang <zhiguang.ouyang@amlogic.com>

gxb      build ok
gxtvbb   build ok
gxl      build ok
txl      build ok
txlx     build ok
axg      build ok
txhd     build ok
g12a     build ok
g12b     build ok
tl1      build ok
tm2      build ok
a1       build ok
c1       build ok
c2       build ok
t5       build ok
t5d      build ok
t5w      build ok

Change-Id: If41e1e24140526bb7a7885a4d4d3dfaf23e28c51