commit 0687698b1c3380a5f29a80ff3dff2b7ff12f7d9c
author Jenkins SH <jenkins.sh@amlogic.com> Tue Sep 10 08:27:15 2024 +0000
committer Jenkins SH <jenkins.sh@amlogic.com> Tue Sep 10 08:27:15 2024 +0000
tree 47b4bb8122648906eb0bea5e4d22e8e86f44b5a1
parent 71692691ddcf3dfac32704f6711f2ae5ce913b60

commit  66b6b2781550009151d347978d2e9ea3be2046b6
Author: Jiucheng Xu <jiucheng.xu@amlogic.com>
Date:   Fri Sep 6 12:55:27 2024 +0800

    cpu: set L1 data cache fetch outstanding to 8 [1/1]

    PD#SWPL-184767

    Problem:
    outstanding = 5 is not top performance setting for a53

    Solution:
    set outstanding = 8 (L1PCTL=7)

    Verify:
    t6d

    Change-Id: I292dc1482bf6a15c4710e43545a028c2b009d2af
    Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com>
s7d      build ok
a4       build ok
t3x      build ok
s1a      build ok
s7       build ok
s6       build ok
t6d      build ok

Change-Id: I86e114df6a025edf3f9d31aae46708cd884eafcc