blob: bea7fe77682523899719e8c6f3707ba5df9b398d [file] [log] [blame]
Thierry Reding89184652014-04-16 09:24:44 +02001/*
2 * Copyright (C) 2014 NVIDIA Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __SOC_TEGRA_MC_H__
10#define __SOC_TEGRA_MC_H__
11
12#include <linux/types.h>
13
14struct clk;
15struct device;
16struct page;
17
18struct tegra_smmu_enable {
19 unsigned int reg;
20 unsigned int bit;
21};
22
Mikko Perttunen3d9dd6f2015-03-12 15:48:02 +010023struct tegra_mc_timing {
24 unsigned long rate;
25
26 u32 *emem_data;
27};
28
Thierry Reding89184652014-04-16 09:24:44 +020029/* latency allowance */
30struct tegra_mc_la {
31 unsigned int reg;
32 unsigned int shift;
33 unsigned int mask;
34 unsigned int def;
35};
36
37struct tegra_mc_client {
38 unsigned int id;
39 const char *name;
40 unsigned int swgroup;
41
42 unsigned int fifo_size;
43
44 struct tegra_smmu_enable smmu;
45 struct tegra_mc_la la;
46};
47
48struct tegra_smmu_swgroup {
Thierry Redinge660df02015-01-23 09:45:35 +010049 const char *name;
Thierry Reding89184652014-04-16 09:24:44 +020050 unsigned int swgroup;
51 unsigned int reg;
52};
53
Thierry Reding2a8102d2017-10-12 16:29:19 +020054struct tegra_smmu_group_soc {
55 const char *name;
56 const unsigned int *swgroups;
57 unsigned int num_swgroups;
58};
59
Thierry Reding89184652014-04-16 09:24:44 +020060struct tegra_smmu_soc {
61 const struct tegra_mc_client *clients;
62 unsigned int num_clients;
63
64 const struct tegra_smmu_swgroup *swgroups;
65 unsigned int num_swgroups;
66
Thierry Reding2a8102d2017-10-12 16:29:19 +020067 const struct tegra_smmu_group_soc *groups;
68 unsigned int num_groups;
69
Thierry Reding89184652014-04-16 09:24:44 +020070 bool supports_round_robin_arbitration;
71 bool supports_request_limit;
72
Thierry Reding11cec152015-08-06 14:20:31 +020073 unsigned int num_tlb_lines;
Thierry Reding89184652014-04-16 09:24:44 +020074 unsigned int num_asids;
Thierry Reding89184652014-04-16 09:24:44 +020075};
76
77struct tegra_mc;
78struct tegra_smmu;
79
80#ifdef CONFIG_TEGRA_IOMMU_SMMU
81struct tegra_smmu *tegra_smmu_probe(struct device *dev,
82 const struct tegra_smmu_soc *soc,
83 struct tegra_mc *mc);
Thierry Redingd1313e72015-01-23 09:49:25 +010084void tegra_smmu_remove(struct tegra_smmu *smmu);
Thierry Reding89184652014-04-16 09:24:44 +020085#else
86static inline struct tegra_smmu *
87tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc,
88 struct tegra_mc *mc)
89{
90 return NULL;
91}
Thierry Redingd1313e72015-01-23 09:49:25 +010092
93static inline void tegra_smmu_remove(struct tegra_smmu *smmu)
94{
95}
Thierry Reding89184652014-04-16 09:24:44 +020096#endif
97
98struct tegra_mc_soc {
99 const struct tegra_mc_client *clients;
100 unsigned int num_clients;
101
Mikko Perttunen3d9dd6f2015-03-12 15:48:02 +0100102 const unsigned long *emem_regs;
Thierry Reding89184652014-04-16 09:24:44 +0200103 unsigned int num_emem_regs;
104
105 unsigned int num_address_bits;
106 unsigned int atom_size;
107
Paul Walmsley3c01cf32015-06-04 19:33:48 +0000108 u8 client_id_mask;
109
Thierry Reding89184652014-04-16 09:24:44 +0200110 const struct tegra_smmu_soc *smmu;
Dmitry Osipenko1c74d5c2018-04-09 22:28:29 +0300111
112 u32 intmask;
Thierry Reding89184652014-04-16 09:24:44 +0200113};
114
115struct tegra_mc {
116 struct device *dev;
117 struct tegra_smmu *smmu;
Dmitry Osipenkoa8d502f2018-04-09 22:28:31 +0300118 void __iomem *regs, *regs2;
Thierry Reding89184652014-04-16 09:24:44 +0200119 struct clk *clk;
120 int irq;
121
122 const struct tegra_mc_soc *soc;
123 unsigned long tick;
Mikko Perttunen3d9dd6f2015-03-12 15:48:02 +0100124
125 struct tegra_mc_timing *timings;
126 unsigned int num_timings;
Thierry Reding89184652014-04-16 09:24:44 +0200127};
128
Mikko Perttunen3d9dd6f2015-03-12 15:48:02 +0100129void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
130unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
131
Thierry Reding89184652014-04-16 09:24:44 +0200132#endif /* __SOC_TEGRA_MC_H__ */