hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013 Realtek Semiconductor Corp. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License |
| 6 | * version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | */ |
| 9 | |
| 10 | #include <linux/init.h> |
| 11 | #include <linux/signal.h> |
| 12 | #include <linux/slab.h> |
| 13 | #include <linux/module.h> |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 14 | #include <linux/netdevice.h> |
| 15 | #include <linux/etherdevice.h> |
| 16 | #include <linux/mii.h> |
| 17 | #include <linux/ethtool.h> |
| 18 | #include <linux/usb.h> |
| 19 | #include <linux/crc32.h> |
| 20 | #include <linux/if_vlan.h> |
| 21 | #include <linux/uaccess.h> |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 22 | #include <linux/list.h> |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 23 | |
| 24 | /* Version Information */ |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 25 | #define DRIVER_VERSION "v1.01.0 (2013/08/12)" |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 26 | #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>" |
| 27 | #define DRIVER_DESC "Realtek RTL8152 Based USB 2.0 Ethernet Adapters" |
| 28 | #define MODULENAME "r8152" |
| 29 | |
| 30 | #define R8152_PHY_ID 32 |
| 31 | |
| 32 | #define PLA_IDR 0xc000 |
| 33 | #define PLA_RCR 0xc010 |
| 34 | #define PLA_RMS 0xc016 |
| 35 | #define PLA_RXFIFO_CTRL0 0xc0a0 |
| 36 | #define PLA_RXFIFO_CTRL1 0xc0a4 |
| 37 | #define PLA_RXFIFO_CTRL2 0xc0a8 |
| 38 | #define PLA_FMC 0xc0b4 |
| 39 | #define PLA_CFG_WOL 0xc0b6 |
| 40 | #define PLA_MAR 0xcd00 |
| 41 | #define PAL_BDC_CR 0xd1a0 |
| 42 | #define PLA_LEDSEL 0xdd90 |
| 43 | #define PLA_LED_FEATURE 0xdd92 |
| 44 | #define PLA_PHYAR 0xde00 |
| 45 | #define PLA_GPHY_INTR_IMR 0xe022 |
| 46 | #define PLA_EEE_CR 0xe040 |
| 47 | #define PLA_EEEP_CR 0xe080 |
| 48 | #define PLA_MAC_PWR_CTRL 0xe0c0 |
| 49 | #define PLA_TCR0 0xe610 |
| 50 | #define PLA_TCR1 0xe612 |
| 51 | #define PLA_TXFIFO_CTRL 0xe618 |
| 52 | #define PLA_RSTTELLY 0xe800 |
| 53 | #define PLA_CR 0xe813 |
| 54 | #define PLA_CRWECR 0xe81c |
| 55 | #define PLA_CONFIG5 0xe822 |
| 56 | #define PLA_PHY_PWR 0xe84c |
| 57 | #define PLA_OOB_CTRL 0xe84f |
| 58 | #define PLA_CPCR 0xe854 |
| 59 | #define PLA_MISC_0 0xe858 |
| 60 | #define PLA_MISC_1 0xe85a |
| 61 | #define PLA_OCP_GPHY_BASE 0xe86c |
| 62 | #define PLA_TELLYCNT 0xe890 |
| 63 | #define PLA_SFF_STS_7 0xe8de |
| 64 | #define PLA_PHYSTATUS 0xe908 |
| 65 | #define PLA_BP_BA 0xfc26 |
| 66 | #define PLA_BP_0 0xfc28 |
| 67 | #define PLA_BP_1 0xfc2a |
| 68 | #define PLA_BP_2 0xfc2c |
| 69 | #define PLA_BP_3 0xfc2e |
| 70 | #define PLA_BP_4 0xfc30 |
| 71 | #define PLA_BP_5 0xfc32 |
| 72 | #define PLA_BP_6 0xfc34 |
| 73 | #define PLA_BP_7 0xfc36 |
| 74 | |
| 75 | #define USB_DEV_STAT 0xb808 |
| 76 | #define USB_USB_CTRL 0xd406 |
| 77 | #define USB_PHY_CTRL 0xd408 |
| 78 | #define USB_TX_AGG 0xd40a |
| 79 | #define USB_RX_BUF_TH 0xd40c |
| 80 | #define USB_USB_TIMER 0xd428 |
| 81 | #define USB_PM_CTRL_STATUS 0xd432 |
| 82 | #define USB_TX_DMA 0xd434 |
| 83 | #define USB_UPS_CTRL 0xd800 |
| 84 | #define USB_BP_BA 0xfc26 |
| 85 | #define USB_BP_0 0xfc28 |
| 86 | #define USB_BP_1 0xfc2a |
| 87 | #define USB_BP_2 0xfc2c |
| 88 | #define USB_BP_3 0xfc2e |
| 89 | #define USB_BP_4 0xfc30 |
| 90 | #define USB_BP_5 0xfc32 |
| 91 | #define USB_BP_6 0xfc34 |
| 92 | #define USB_BP_7 0xfc36 |
| 93 | |
| 94 | /* OCP Registers */ |
| 95 | #define OCP_ALDPS_CONFIG 0x2010 |
| 96 | #define OCP_EEE_CONFIG1 0x2080 |
| 97 | #define OCP_EEE_CONFIG2 0x2092 |
| 98 | #define OCP_EEE_CONFIG3 0x2094 |
| 99 | #define OCP_EEE_AR 0xa41a |
| 100 | #define OCP_EEE_DATA 0xa41c |
| 101 | |
| 102 | /* PLA_RCR */ |
| 103 | #define RCR_AAP 0x00000001 |
| 104 | #define RCR_APM 0x00000002 |
| 105 | #define RCR_AM 0x00000004 |
| 106 | #define RCR_AB 0x00000008 |
| 107 | #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB) |
| 108 | |
| 109 | /* PLA_RXFIFO_CTRL0 */ |
| 110 | #define RXFIFO_THR1_NORMAL 0x00080002 |
| 111 | #define RXFIFO_THR1_OOB 0x01800003 |
| 112 | |
| 113 | /* PLA_RXFIFO_CTRL1 */ |
| 114 | #define RXFIFO_THR2_FULL 0x00000060 |
| 115 | #define RXFIFO_THR2_HIGH 0x00000038 |
| 116 | #define RXFIFO_THR2_OOB 0x0000004a |
| 117 | |
| 118 | /* PLA_RXFIFO_CTRL2 */ |
| 119 | #define RXFIFO_THR3_FULL 0x00000078 |
| 120 | #define RXFIFO_THR3_HIGH 0x00000048 |
| 121 | #define RXFIFO_THR3_OOB 0x0000005a |
| 122 | |
| 123 | /* PLA_TXFIFO_CTRL */ |
| 124 | #define TXFIFO_THR_NORMAL 0x00400008 |
| 125 | |
| 126 | /* PLA_FMC */ |
| 127 | #define FMC_FCR_MCU_EN 0x0001 |
| 128 | |
| 129 | /* PLA_EEEP_CR */ |
| 130 | #define EEEP_CR_EEEP_TX 0x0002 |
| 131 | |
| 132 | /* PLA_TCR0 */ |
| 133 | #define TCR0_TX_EMPTY 0x0800 |
| 134 | #define TCR0_AUTO_FIFO 0x0080 |
| 135 | |
| 136 | /* PLA_TCR1 */ |
| 137 | #define VERSION_MASK 0x7cf0 |
| 138 | |
| 139 | /* PLA_CR */ |
| 140 | #define CR_RST 0x10 |
| 141 | #define CR_RE 0x08 |
| 142 | #define CR_TE 0x04 |
| 143 | |
| 144 | /* PLA_CRWECR */ |
| 145 | #define CRWECR_NORAML 0x00 |
| 146 | #define CRWECR_CONFIG 0xc0 |
| 147 | |
| 148 | /* PLA_OOB_CTRL */ |
| 149 | #define NOW_IS_OOB 0x80 |
| 150 | #define TXFIFO_EMPTY 0x20 |
| 151 | #define RXFIFO_EMPTY 0x10 |
| 152 | #define LINK_LIST_READY 0x02 |
| 153 | #define DIS_MCU_CLROOB 0x01 |
| 154 | #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY) |
| 155 | |
| 156 | /* PLA_MISC_1 */ |
| 157 | #define RXDY_GATED_EN 0x0008 |
| 158 | |
| 159 | /* PLA_SFF_STS_7 */ |
| 160 | #define RE_INIT_LL 0x8000 |
| 161 | #define MCU_BORW_EN 0x4000 |
| 162 | |
| 163 | /* PLA_CPCR */ |
| 164 | #define CPCR_RX_VLAN 0x0040 |
| 165 | |
| 166 | /* PLA_CFG_WOL */ |
| 167 | #define MAGIC_EN 0x0001 |
| 168 | |
| 169 | /* PAL_BDC_CR */ |
| 170 | #define ALDPS_PROXY_MODE 0x0001 |
| 171 | |
| 172 | /* PLA_CONFIG5 */ |
| 173 | #define LAN_WAKE_EN 0x0002 |
| 174 | |
| 175 | /* PLA_LED_FEATURE */ |
| 176 | #define LED_MODE_MASK 0x0700 |
| 177 | |
| 178 | /* PLA_PHY_PWR */ |
| 179 | #define TX_10M_IDLE_EN 0x0080 |
| 180 | #define PFM_PWM_SWITCH 0x0040 |
| 181 | |
| 182 | /* PLA_MAC_PWR_CTRL */ |
| 183 | #define D3_CLK_GATED_EN 0x00004000 |
| 184 | #define MCU_CLK_RATIO 0x07010f07 |
| 185 | #define MCU_CLK_RATIO_MASK 0x0f0f0f0f |
| 186 | |
| 187 | /* PLA_GPHY_INTR_IMR */ |
| 188 | #define GPHY_STS_MSK 0x0001 |
| 189 | #define SPEED_DOWN_MSK 0x0002 |
| 190 | #define SPDWN_RXDV_MSK 0x0004 |
| 191 | #define SPDWN_LINKCHG_MSK 0x0008 |
| 192 | |
| 193 | /* PLA_PHYAR */ |
| 194 | #define PHYAR_FLAG 0x80000000 |
| 195 | |
| 196 | /* PLA_EEE_CR */ |
| 197 | #define EEE_RX_EN 0x0001 |
| 198 | #define EEE_TX_EN 0x0002 |
| 199 | |
| 200 | /* USB_DEV_STAT */ |
| 201 | #define STAT_SPEED_MASK 0x0006 |
| 202 | #define STAT_SPEED_HIGH 0x0000 |
| 203 | #define STAT_SPEED_FULL 0x0001 |
| 204 | |
| 205 | /* USB_TX_AGG */ |
| 206 | #define TX_AGG_MAX_THRESHOLD 0x03 |
| 207 | |
| 208 | /* USB_RX_BUF_TH */ |
| 209 | #define RX_BUF_THR 0x7a120180 |
| 210 | |
| 211 | /* USB_TX_DMA */ |
| 212 | #define TEST_MODE_DISABLE 0x00000001 |
| 213 | #define TX_SIZE_ADJUST1 0x00000100 |
| 214 | |
| 215 | /* USB_UPS_CTRL */ |
| 216 | #define POWER_CUT 0x0100 |
| 217 | |
| 218 | /* USB_PM_CTRL_STATUS */ |
| 219 | #define RWSUME_INDICATE 0x0001 |
| 220 | |
| 221 | /* USB_USB_CTRL */ |
| 222 | #define RX_AGG_DISABLE 0x0010 |
| 223 | |
| 224 | /* OCP_ALDPS_CONFIG */ |
| 225 | #define ENPWRSAVE 0x8000 |
| 226 | #define ENPDNPS 0x0200 |
| 227 | #define LINKENA 0x0100 |
| 228 | #define DIS_SDSAVE 0x0010 |
| 229 | |
| 230 | /* OCP_EEE_CONFIG1 */ |
| 231 | #define RG_TXLPI_MSK_HFDUP 0x8000 |
| 232 | #define RG_MATCLR_EN 0x4000 |
| 233 | #define EEE_10_CAP 0x2000 |
| 234 | #define EEE_NWAY_EN 0x1000 |
| 235 | #define TX_QUIET_EN 0x0200 |
| 236 | #define RX_QUIET_EN 0x0100 |
| 237 | #define SDRISETIME 0x0010 /* bit 4 ~ 6 */ |
| 238 | #define RG_RXLPI_MSK_HFDUP 0x0008 |
| 239 | #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */ |
| 240 | |
| 241 | /* OCP_EEE_CONFIG2 */ |
| 242 | #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */ |
| 243 | #define RG_DACQUIET_EN 0x0400 |
| 244 | #define RG_LDVQUIET_EN 0x0200 |
| 245 | #define RG_CKRSEL 0x0020 |
| 246 | #define RG_EEEPRG_EN 0x0010 |
| 247 | |
| 248 | /* OCP_EEE_CONFIG3 */ |
| 249 | #define FST_SNR_EYE_R 0x1500 /* bit 7 ~ 15 */ |
| 250 | #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */ |
| 251 | #define MSK_PH 0x0006 /* bit 0 ~ 3 */ |
| 252 | |
| 253 | /* OCP_EEE_AR */ |
| 254 | /* bit[15:14] function */ |
| 255 | #define FUN_ADDR 0x0000 |
| 256 | #define FUN_DATA 0x4000 |
| 257 | /* bit[4:0] device addr */ |
| 258 | #define DEVICE_ADDR 0x0007 |
| 259 | |
| 260 | /* OCP_EEE_DATA */ |
| 261 | #define EEE_ADDR 0x003C |
| 262 | #define EEE_DATA 0x0002 |
| 263 | |
| 264 | enum rtl_register_content { |
| 265 | _100bps = 0x08, |
| 266 | _10bps = 0x04, |
| 267 | LINK_STATUS = 0x02, |
| 268 | FULL_DUP = 0x01, |
| 269 | }; |
| 270 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 271 | #define RTL8152_MAX_TX 10 |
| 272 | #define RTL8152_MAX_RX 10 |
| 273 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 274 | #define RTL8152_REQT_READ 0xc0 |
| 275 | #define RTL8152_REQT_WRITE 0x40 |
| 276 | #define RTL8152_REQ_GET_REGS 0x05 |
| 277 | #define RTL8152_REQ_SET_REGS 0x05 |
| 278 | |
| 279 | #define BYTE_EN_DWORD 0xff |
| 280 | #define BYTE_EN_WORD 0x33 |
| 281 | #define BYTE_EN_BYTE 0x11 |
| 282 | #define BYTE_EN_SIX_BYTES 0x3f |
| 283 | #define BYTE_EN_START_MASK 0x0f |
| 284 | #define BYTE_EN_END_MASK 0xf0 |
| 285 | |
| 286 | #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN) |
| 287 | #define RTL8152_TX_TIMEOUT (HZ) |
| 288 | |
| 289 | /* rtl8152 flags */ |
| 290 | enum rtl8152_flags { |
| 291 | RTL8152_UNPLUG = 0, |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 292 | RTL8152_SET_RX_MODE, |
| 293 | WORK_ENABLE |
| 294 | }; |
| 295 | |
| 296 | /* Define these values to match your device */ |
| 297 | #define VENDOR_ID_REALTEK 0x0bda |
| 298 | #define PRODUCT_ID_RTL8152 0x8152 |
| 299 | |
| 300 | #define MCU_TYPE_PLA 0x0100 |
| 301 | #define MCU_TYPE_USB 0x0000 |
| 302 | |
| 303 | struct rx_desc { |
| 304 | u32 opts1; |
| 305 | #define RX_LEN_MASK 0x7fff |
| 306 | u32 opts2; |
| 307 | u32 opts3; |
| 308 | u32 opts4; |
| 309 | u32 opts5; |
| 310 | u32 opts6; |
| 311 | }; |
| 312 | |
| 313 | struct tx_desc { |
| 314 | u32 opts1; |
| 315 | #define TX_FS (1 << 31) /* First segment of a packet */ |
| 316 | #define TX_LS (1 << 30) /* Final segment of a packet */ |
| 317 | #define TX_LEN_MASK 0xffff |
| 318 | u32 opts2; |
| 319 | }; |
| 320 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 321 | struct rx_agg { |
| 322 | struct list_head list; |
| 323 | struct urb *urb; |
| 324 | void *context; |
| 325 | void *buffer; |
| 326 | void *head; |
| 327 | }; |
| 328 | |
| 329 | struct tx_agg { |
| 330 | struct list_head list; |
| 331 | struct urb *urb; |
| 332 | void *context; |
| 333 | void *buffer; |
| 334 | void *head; |
| 335 | u32 skb_num; |
| 336 | u32 skb_len; |
| 337 | }; |
| 338 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 339 | struct r8152 { |
| 340 | unsigned long flags; |
| 341 | struct usb_device *udev; |
| 342 | struct tasklet_struct tl; |
| 343 | struct net_device *netdev; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 344 | struct tx_agg tx_info[RTL8152_MAX_TX]; |
| 345 | struct rx_agg rx_info[RTL8152_MAX_RX]; |
| 346 | struct list_head rx_done, tx_free; |
| 347 | struct sk_buff_head tx_queue; |
| 348 | spinlock_t rx_lock, tx_lock; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 349 | struct delayed_work schedule; |
| 350 | struct mii_if_info mii; |
| 351 | u32 msg_enable; |
| 352 | u16 ocp_base; |
| 353 | u8 version; |
| 354 | u8 speed; |
| 355 | }; |
| 356 | |
| 357 | enum rtl_version { |
| 358 | RTL_VER_UNKNOWN = 0, |
| 359 | RTL_VER_01, |
| 360 | RTL_VER_02 |
| 361 | }; |
| 362 | |
| 363 | /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). |
| 364 | * The RTL chips use a 64 element hash table based on the Ethernet CRC. |
| 365 | */ |
| 366 | static const int multicast_filter_limit = 32; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 367 | static unsigned int rx_buf_sz = 16384; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 368 | |
| 369 | static |
| 370 | int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data) |
| 371 | { |
hayeswang | 31787f5 | 2013-07-31 17:21:25 +0800 | [diff] [blame] | 372 | int ret; |
| 373 | void *tmp; |
| 374 | |
| 375 | tmp = kmalloc(size, GFP_KERNEL); |
| 376 | if (!tmp) |
| 377 | return -ENOMEM; |
| 378 | |
| 379 | ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0), |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 380 | RTL8152_REQ_GET_REGS, RTL8152_REQT_READ, |
hayeswang | 31787f5 | 2013-07-31 17:21:25 +0800 | [diff] [blame] | 381 | value, index, tmp, size, 500); |
| 382 | |
| 383 | memcpy(data, tmp, size); |
| 384 | kfree(tmp); |
| 385 | |
| 386 | return ret; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 387 | } |
| 388 | |
| 389 | static |
| 390 | int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data) |
| 391 | { |
hayeswang | 31787f5 | 2013-07-31 17:21:25 +0800 | [diff] [blame] | 392 | int ret; |
| 393 | void *tmp; |
| 394 | |
| 395 | tmp = kmalloc(size, GFP_KERNEL); |
| 396 | if (!tmp) |
| 397 | return -ENOMEM; |
| 398 | |
| 399 | memcpy(tmp, data, size); |
| 400 | |
| 401 | ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0), |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 402 | RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE, |
hayeswang | 31787f5 | 2013-07-31 17:21:25 +0800 | [diff] [blame] | 403 | value, index, tmp, size, 500); |
| 404 | |
| 405 | kfree(tmp); |
| 406 | return ret; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 407 | } |
| 408 | |
| 409 | static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size, |
| 410 | void *data, u16 type) |
| 411 | { |
| 412 | u16 limit = 64; |
| 413 | int ret = 0; |
| 414 | |
| 415 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
| 416 | return -ENODEV; |
| 417 | |
| 418 | /* both size and indix must be 4 bytes align */ |
| 419 | if ((size & 3) || !size || (index & 3) || !data) |
| 420 | return -EPERM; |
| 421 | |
| 422 | if ((u32)index + (u32)size > 0xffff) |
| 423 | return -EPERM; |
| 424 | |
| 425 | while (size) { |
| 426 | if (size > limit) { |
| 427 | ret = get_registers(tp, index, type, limit, data); |
| 428 | if (ret < 0) |
| 429 | break; |
| 430 | |
| 431 | index += limit; |
| 432 | data += limit; |
| 433 | size -= limit; |
| 434 | } else { |
| 435 | ret = get_registers(tp, index, type, size, data); |
| 436 | if (ret < 0) |
| 437 | break; |
| 438 | |
| 439 | index += size; |
| 440 | data += size; |
| 441 | size = 0; |
| 442 | break; |
| 443 | } |
| 444 | } |
| 445 | |
| 446 | return ret; |
| 447 | } |
| 448 | |
| 449 | static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen, |
| 450 | u16 size, void *data, u16 type) |
| 451 | { |
| 452 | int ret; |
| 453 | u16 byteen_start, byteen_end, byen; |
| 454 | u16 limit = 512; |
| 455 | |
| 456 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
| 457 | return -ENODEV; |
| 458 | |
| 459 | /* both size and indix must be 4 bytes align */ |
| 460 | if ((size & 3) || !size || (index & 3) || !data) |
| 461 | return -EPERM; |
| 462 | |
| 463 | if ((u32)index + (u32)size > 0xffff) |
| 464 | return -EPERM; |
| 465 | |
| 466 | byteen_start = byteen & BYTE_EN_START_MASK; |
| 467 | byteen_end = byteen & BYTE_EN_END_MASK; |
| 468 | |
| 469 | byen = byteen_start | (byteen_start << 4); |
| 470 | ret = set_registers(tp, index, type | byen, 4, data); |
| 471 | if (ret < 0) |
| 472 | goto error1; |
| 473 | |
| 474 | index += 4; |
| 475 | data += 4; |
| 476 | size -= 4; |
| 477 | |
| 478 | if (size) { |
| 479 | size -= 4; |
| 480 | |
| 481 | while (size) { |
| 482 | if (size > limit) { |
| 483 | ret = set_registers(tp, index, |
| 484 | type | BYTE_EN_DWORD, |
| 485 | limit, data); |
| 486 | if (ret < 0) |
| 487 | goto error1; |
| 488 | |
| 489 | index += limit; |
| 490 | data += limit; |
| 491 | size -= limit; |
| 492 | } else { |
| 493 | ret = set_registers(tp, index, |
| 494 | type | BYTE_EN_DWORD, |
| 495 | size, data); |
| 496 | if (ret < 0) |
| 497 | goto error1; |
| 498 | |
| 499 | index += size; |
| 500 | data += size; |
| 501 | size = 0; |
| 502 | break; |
| 503 | } |
| 504 | } |
| 505 | |
| 506 | byen = byteen_end | (byteen_end >> 4); |
| 507 | ret = set_registers(tp, index, type | byen, 4, data); |
| 508 | if (ret < 0) |
| 509 | goto error1; |
| 510 | } |
| 511 | |
| 512 | error1: |
| 513 | return ret; |
| 514 | } |
| 515 | |
| 516 | static inline |
| 517 | int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data) |
| 518 | { |
| 519 | return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA); |
| 520 | } |
| 521 | |
| 522 | static inline |
| 523 | int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data) |
| 524 | { |
| 525 | return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA); |
| 526 | } |
| 527 | |
| 528 | static inline |
| 529 | int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data) |
| 530 | { |
| 531 | return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB); |
| 532 | } |
| 533 | |
| 534 | static inline |
| 535 | int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data) |
| 536 | { |
| 537 | return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB); |
| 538 | } |
| 539 | |
| 540 | static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index) |
| 541 | { |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 542 | __le32 data; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 543 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 544 | generic_ocp_read(tp, index, sizeof(data), &data, type); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 545 | |
| 546 | return __le32_to_cpu(data); |
| 547 | } |
| 548 | |
| 549 | static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data) |
| 550 | { |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 551 | __le32 tmp = __cpu_to_le32(data); |
| 552 | |
| 553 | generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 554 | } |
| 555 | |
| 556 | static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index) |
| 557 | { |
| 558 | u32 data; |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 559 | __le32 tmp; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 560 | u8 shift = index & 2; |
| 561 | |
| 562 | index &= ~3; |
| 563 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 564 | generic_ocp_read(tp, index, sizeof(tmp), &tmp, type); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 565 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 566 | data = __le32_to_cpu(tmp); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 567 | data >>= (shift * 8); |
| 568 | data &= 0xffff; |
| 569 | |
| 570 | return (u16)data; |
| 571 | } |
| 572 | |
| 573 | static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data) |
| 574 | { |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 575 | u32 mask = 0xffff; |
| 576 | __le32 tmp; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 577 | u16 byen = BYTE_EN_WORD; |
| 578 | u8 shift = index & 2; |
| 579 | |
| 580 | data &= mask; |
| 581 | |
| 582 | if (index & 2) { |
| 583 | byen <<= shift; |
| 584 | mask <<= (shift * 8); |
| 585 | data <<= (shift * 8); |
| 586 | index &= ~3; |
| 587 | } |
| 588 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 589 | generic_ocp_read(tp, index, sizeof(tmp), &tmp, type); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 590 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 591 | data |= __le32_to_cpu(tmp) & ~mask; |
| 592 | tmp = __cpu_to_le32(data); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 593 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 594 | generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 595 | } |
| 596 | |
| 597 | static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index) |
| 598 | { |
| 599 | u32 data; |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 600 | __le32 tmp; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 601 | u8 shift = index & 3; |
| 602 | |
| 603 | index &= ~3; |
| 604 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 605 | generic_ocp_read(tp, index, sizeof(tmp), &tmp, type); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 606 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 607 | data = __le32_to_cpu(tmp); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 608 | data >>= (shift * 8); |
| 609 | data &= 0xff; |
| 610 | |
| 611 | return (u8)data; |
| 612 | } |
| 613 | |
| 614 | static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data) |
| 615 | { |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 616 | u32 mask = 0xff; |
| 617 | __le32 tmp; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 618 | u16 byen = BYTE_EN_BYTE; |
| 619 | u8 shift = index & 3; |
| 620 | |
| 621 | data &= mask; |
| 622 | |
| 623 | if (index & 3) { |
| 624 | byen <<= shift; |
| 625 | mask <<= (shift * 8); |
| 626 | data <<= (shift * 8); |
| 627 | index &= ~3; |
| 628 | } |
| 629 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 630 | generic_ocp_read(tp, index, sizeof(tmp), &tmp, type); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 631 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 632 | data |= __le32_to_cpu(tmp) & ~mask; |
| 633 | tmp = __cpu_to_le32(data); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 634 | |
hayeswang | c8826de | 2013-07-31 17:21:26 +0800 | [diff] [blame] | 635 | generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 636 | } |
| 637 | |
| 638 | static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value) |
| 639 | { |
| 640 | u32 ocp_data; |
| 641 | int i; |
| 642 | |
| 643 | ocp_data = PHYAR_FLAG | ((reg_addr & 0x1f) << 16) | |
| 644 | (value & 0xffff); |
| 645 | |
| 646 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data); |
| 647 | |
| 648 | for (i = 20; i > 0; i--) { |
| 649 | udelay(25); |
| 650 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR); |
| 651 | if (!(ocp_data & PHYAR_FLAG)) |
| 652 | break; |
| 653 | } |
| 654 | udelay(20); |
| 655 | } |
| 656 | |
| 657 | static int r8152_mdio_read(struct r8152 *tp, u32 reg_addr) |
| 658 | { |
| 659 | u32 ocp_data; |
| 660 | int i; |
| 661 | |
| 662 | ocp_data = (reg_addr & 0x1f) << 16; |
| 663 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data); |
| 664 | |
| 665 | for (i = 20; i > 0; i--) { |
| 666 | udelay(25); |
| 667 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR); |
| 668 | if (ocp_data & PHYAR_FLAG) |
| 669 | break; |
| 670 | } |
| 671 | udelay(20); |
| 672 | |
| 673 | if (!(ocp_data & PHYAR_FLAG)) |
| 674 | return -EAGAIN; |
| 675 | |
| 676 | return (u16)(ocp_data & 0xffff); |
| 677 | } |
| 678 | |
| 679 | static int read_mii_word(struct net_device *netdev, int phy_id, int reg) |
| 680 | { |
| 681 | struct r8152 *tp = netdev_priv(netdev); |
| 682 | |
| 683 | if (phy_id != R8152_PHY_ID) |
| 684 | return -EINVAL; |
| 685 | |
| 686 | return r8152_mdio_read(tp, reg); |
| 687 | } |
| 688 | |
| 689 | static |
| 690 | void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val) |
| 691 | { |
| 692 | struct r8152 *tp = netdev_priv(netdev); |
| 693 | |
| 694 | if (phy_id != R8152_PHY_ID) |
| 695 | return; |
| 696 | |
| 697 | r8152_mdio_write(tp, reg, val); |
| 698 | } |
| 699 | |
| 700 | static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data) |
| 701 | { |
| 702 | u16 ocp_base, ocp_index; |
| 703 | |
| 704 | ocp_base = addr & 0xf000; |
| 705 | if (ocp_base != tp->ocp_base) { |
| 706 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base); |
| 707 | tp->ocp_base = ocp_base; |
| 708 | } |
| 709 | |
| 710 | ocp_index = (addr & 0x0fff) | 0xb000; |
| 711 | ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data); |
| 712 | } |
| 713 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 714 | static |
| 715 | int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags); |
| 716 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 717 | static inline void set_ethernet_addr(struct r8152 *tp) |
| 718 | { |
| 719 | struct net_device *dev = tp->netdev; |
hayeswang | 31787f5 | 2013-07-31 17:21:25 +0800 | [diff] [blame] | 720 | u8 node_id[8] = {0}; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 721 | |
hayeswang | 31787f5 | 2013-07-31 17:21:25 +0800 | [diff] [blame] | 722 | if (pla_ocp_read(tp, PLA_IDR, sizeof(node_id), node_id) < 0) |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 723 | netif_notice(tp, probe, dev, "inet addr fail\n"); |
| 724 | else { |
| 725 | memcpy(dev->dev_addr, node_id, dev->addr_len); |
| 726 | memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
| 727 | } |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 728 | } |
| 729 | |
| 730 | static int rtl8152_set_mac_address(struct net_device *netdev, void *p) |
| 731 | { |
| 732 | struct r8152 *tp = netdev_priv(netdev); |
| 733 | struct sockaddr *addr = p; |
| 734 | |
| 735 | if (!is_valid_ether_addr(addr->sa_data)) |
| 736 | return -EADDRNOTAVAIL; |
| 737 | |
| 738 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
| 739 | |
| 740 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG); |
| 741 | pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data); |
| 742 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML); |
| 743 | |
| 744 | return 0; |
| 745 | } |
| 746 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 747 | static struct net_device_stats *rtl8152_get_stats(struct net_device *dev) |
| 748 | { |
| 749 | return &dev->stats; |
| 750 | } |
| 751 | |
| 752 | static void read_bulk_callback(struct urb *urb) |
| 753 | { |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 754 | struct net_device *netdev; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 755 | unsigned long lockflags; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 756 | int status = urb->status; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 757 | struct rx_agg *agg; |
| 758 | struct r8152 *tp; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 759 | int result; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 760 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 761 | agg = urb->context; |
| 762 | if (!agg) |
| 763 | return; |
| 764 | |
| 765 | tp = agg->context; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 766 | if (!tp) |
| 767 | return; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 768 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 769 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
| 770 | return; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 771 | |
| 772 | if (!test_bit(WORK_ENABLE, &tp->flags)) |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 773 | return; |
| 774 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 775 | netdev = tp->netdev; |
| 776 | if (!netif_carrier_ok(netdev)) |
| 777 | return; |
| 778 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 779 | switch (status) { |
| 780 | case 0: |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 781 | if (urb->actual_length < ETH_ZLEN) |
| 782 | break; |
| 783 | |
| 784 | spin_lock_irqsave(&tp->rx_lock, lockflags); |
| 785 | list_add_tail(&agg->list, &tp->rx_done); |
| 786 | spin_unlock_irqrestore(&tp->rx_lock, lockflags); |
| 787 | tasklet_schedule(&tp->tl); |
| 788 | return; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 789 | case -ESHUTDOWN: |
| 790 | set_bit(RTL8152_UNPLUG, &tp->flags); |
| 791 | netif_device_detach(tp->netdev); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 792 | return; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 793 | case -ENOENT: |
| 794 | return; /* the urb is in unlink state */ |
| 795 | case -ETIME: |
| 796 | pr_warn_ratelimited("may be reset is needed?..\n"); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 797 | break; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 798 | default: |
| 799 | pr_warn_ratelimited("Rx status %d\n", status); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 800 | break; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 801 | } |
| 802 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 803 | result = r8152_submit_rx(tp, agg, GFP_ATOMIC); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 804 | if (result == -ENODEV) { |
| 805 | netif_device_detach(tp->netdev); |
| 806 | } else if (result) { |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 807 | spin_lock_irqsave(&tp->rx_lock, lockflags); |
| 808 | list_add_tail(&agg->list, &tp->rx_done); |
| 809 | spin_unlock_irqrestore(&tp->rx_lock, lockflags); |
| 810 | tasklet_schedule(&tp->tl); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 811 | } |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 812 | } |
| 813 | |
| 814 | static void write_bulk_callback(struct urb *urb) |
| 815 | { |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 816 | struct net_device_stats *stats; |
| 817 | unsigned long lockflags; |
| 818 | struct tx_agg *agg; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 819 | struct r8152 *tp; |
| 820 | int status = urb->status; |
| 821 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 822 | agg = urb->context; |
| 823 | if (!agg) |
| 824 | return; |
| 825 | |
| 826 | tp = agg->context; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 827 | if (!tp) |
| 828 | return; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 829 | |
| 830 | stats = rtl8152_get_stats(tp->netdev); |
| 831 | if (status) { |
| 832 | pr_warn_ratelimited("Tx status %d\n", status); |
| 833 | stats->tx_errors += agg->skb_num; |
| 834 | } else { |
| 835 | stats->tx_packets += agg->skb_num; |
| 836 | stats->tx_bytes += agg->skb_len; |
| 837 | } |
| 838 | |
| 839 | spin_lock_irqsave(&tp->tx_lock, lockflags); |
| 840 | list_add_tail(&agg->list, &tp->tx_free); |
| 841 | spin_unlock_irqrestore(&tp->tx_lock, lockflags); |
| 842 | |
| 843 | if (!netif_carrier_ok(tp->netdev)) |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 844 | return; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 845 | |
| 846 | if (!test_bit(WORK_ENABLE, &tp->flags)) |
| 847 | return; |
| 848 | |
| 849 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
| 850 | return; |
| 851 | |
| 852 | if (!skb_queue_empty(&tp->tx_queue)) |
| 853 | tasklet_schedule(&tp->tl); |
| 854 | } |
| 855 | |
| 856 | static inline void *rx_agg_align(void *data) |
| 857 | { |
| 858 | return (void *)ALIGN((uintptr_t)data, 8); |
| 859 | } |
| 860 | |
| 861 | static inline void *tx_agg_align(void *data) |
| 862 | { |
| 863 | return (void *)ALIGN((uintptr_t)data, 4); |
| 864 | } |
| 865 | |
| 866 | static void free_all_mem(struct r8152 *tp) |
| 867 | { |
| 868 | int i; |
| 869 | |
| 870 | for (i = 0; i < RTL8152_MAX_RX; i++) { |
| 871 | if (tp->rx_info[i].urb) { |
| 872 | usb_free_urb(tp->rx_info[i].urb); |
| 873 | tp->rx_info[i].urb = NULL; |
| 874 | } |
| 875 | |
| 876 | if (tp->rx_info[i].buffer) { |
| 877 | kfree(tp->rx_info[i].buffer); |
| 878 | tp->rx_info[i].buffer = NULL; |
| 879 | tp->rx_info[i].head = NULL; |
| 880 | } |
| 881 | } |
| 882 | |
| 883 | for (i = 0; i < RTL8152_MAX_TX; i++) { |
| 884 | if (tp->tx_info[i].urb) { |
| 885 | usb_free_urb(tp->tx_info[i].urb); |
| 886 | tp->tx_info[i].urb = NULL; |
| 887 | } |
| 888 | |
| 889 | if (tp->tx_info[i].buffer) { |
| 890 | kfree(tp->tx_info[i].buffer); |
| 891 | tp->tx_info[i].buffer = NULL; |
| 892 | tp->tx_info[i].head = NULL; |
| 893 | } |
| 894 | } |
| 895 | } |
| 896 | |
| 897 | static int alloc_all_mem(struct r8152 *tp) |
| 898 | { |
| 899 | struct net_device *netdev = tp->netdev; |
| 900 | struct urb *urb; |
| 901 | int node, i; |
| 902 | u8 *buf; |
| 903 | |
| 904 | node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1; |
| 905 | |
| 906 | spin_lock_init(&tp->rx_lock); |
| 907 | spin_lock_init(&tp->tx_lock); |
| 908 | INIT_LIST_HEAD(&tp->rx_done); |
| 909 | INIT_LIST_HEAD(&tp->tx_free); |
| 910 | skb_queue_head_init(&tp->tx_queue); |
| 911 | |
| 912 | for (i = 0; i < RTL8152_MAX_RX; i++) { |
| 913 | buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node); |
| 914 | if (!buf) |
| 915 | goto err1; |
| 916 | |
| 917 | if (buf != rx_agg_align(buf)) { |
| 918 | kfree(buf); |
| 919 | buf = kmalloc_node(rx_buf_sz + 8, GFP_KERNEL, node); |
| 920 | if (!buf) |
| 921 | goto err1; |
| 922 | } |
| 923 | |
| 924 | urb = usb_alloc_urb(0, GFP_KERNEL); |
| 925 | if (!urb) { |
| 926 | kfree(buf); |
| 927 | goto err1; |
| 928 | } |
| 929 | |
| 930 | INIT_LIST_HEAD(&tp->rx_info[i].list); |
| 931 | tp->rx_info[i].context = tp; |
| 932 | tp->rx_info[i].urb = urb; |
| 933 | tp->rx_info[i].buffer = buf; |
| 934 | tp->rx_info[i].head = rx_agg_align(buf); |
| 935 | } |
| 936 | |
| 937 | for (i = 0; i < RTL8152_MAX_TX; i++) { |
| 938 | buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node); |
| 939 | if (!buf) |
| 940 | goto err1; |
| 941 | |
| 942 | if (buf != tx_agg_align(buf)) { |
| 943 | kfree(buf); |
| 944 | buf = kmalloc_node(rx_buf_sz + 4, GFP_KERNEL, node); |
| 945 | if (!buf) |
| 946 | goto err1; |
| 947 | } |
| 948 | |
| 949 | urb = usb_alloc_urb(0, GFP_KERNEL); |
| 950 | if (!urb) { |
| 951 | kfree(buf); |
| 952 | goto err1; |
| 953 | } |
| 954 | |
| 955 | INIT_LIST_HEAD(&tp->tx_info[i].list); |
| 956 | tp->tx_info[i].context = tp; |
| 957 | tp->tx_info[i].urb = urb; |
| 958 | tp->tx_info[i].buffer = buf; |
| 959 | tp->tx_info[i].head = tx_agg_align(buf); |
| 960 | |
| 961 | list_add_tail(&tp->tx_info[i].list, &tp->tx_free); |
| 962 | } |
| 963 | |
| 964 | return 0; |
| 965 | |
| 966 | err1: |
| 967 | free_all_mem(tp); |
| 968 | return -ENOMEM; |
| 969 | } |
| 970 | |
| 971 | static void rx_bottom(struct r8152 *tp) |
| 972 | { |
| 973 | struct net_device_stats *stats; |
| 974 | struct net_device *netdev; |
| 975 | struct rx_agg *agg; |
| 976 | struct rx_desc *rx_desc; |
| 977 | unsigned long lockflags; |
| 978 | struct list_head *cursor, *next; |
| 979 | struct sk_buff *skb; |
| 980 | struct urb *urb; |
| 981 | unsigned pkt_len; |
| 982 | int len_used; |
| 983 | u8 *rx_data; |
| 984 | int ret; |
| 985 | |
| 986 | netdev = tp->netdev; |
| 987 | |
| 988 | stats = rtl8152_get_stats(netdev); |
| 989 | |
| 990 | spin_lock_irqsave(&tp->rx_lock, lockflags); |
| 991 | list_for_each_safe(cursor, next, &tp->rx_done) { |
| 992 | list_del_init(cursor); |
| 993 | spin_unlock_irqrestore(&tp->rx_lock, lockflags); |
| 994 | |
| 995 | agg = list_entry(cursor, struct rx_agg, list); |
| 996 | urb = agg->urb; |
| 997 | if (urb->actual_length < ETH_ZLEN) { |
| 998 | ret = r8152_submit_rx(tp, agg, GFP_ATOMIC); |
| 999 | spin_lock_irqsave(&tp->rx_lock, lockflags); |
| 1000 | if (ret && ret != -ENODEV) { |
| 1001 | list_add_tail(&agg->list, next); |
| 1002 | tasklet_schedule(&tp->tl); |
| 1003 | } |
| 1004 | continue; |
| 1005 | } |
| 1006 | |
| 1007 | len_used = 0; |
| 1008 | rx_desc = agg->head; |
| 1009 | rx_data = agg->head; |
| 1010 | pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK; |
| 1011 | len_used += sizeof(struct rx_desc) + pkt_len; |
| 1012 | |
| 1013 | while (urb->actual_length >= len_used) { |
| 1014 | if (pkt_len < ETH_ZLEN) |
| 1015 | break; |
| 1016 | |
| 1017 | pkt_len -= 4; /* CRC */ |
| 1018 | rx_data += sizeof(struct rx_desc); |
| 1019 | |
| 1020 | skb = netdev_alloc_skb_ip_align(netdev, pkt_len); |
| 1021 | if (!skb) { |
| 1022 | stats->rx_dropped++; |
| 1023 | break; |
| 1024 | } |
| 1025 | memcpy(skb->data, rx_data, pkt_len); |
| 1026 | skb_put(skb, pkt_len); |
| 1027 | skb->protocol = eth_type_trans(skb, netdev); |
| 1028 | netif_rx(skb); |
| 1029 | stats->rx_packets++; |
| 1030 | stats->rx_bytes += pkt_len; |
| 1031 | |
| 1032 | rx_data = rx_agg_align(rx_data + pkt_len + 4); |
| 1033 | rx_desc = (struct rx_desc *)rx_data; |
| 1034 | pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK; |
| 1035 | len_used = (int)(rx_data - (u8 *)agg->head); |
| 1036 | len_used += sizeof(struct rx_desc) + pkt_len; |
| 1037 | } |
| 1038 | |
| 1039 | ret = r8152_submit_rx(tp, agg, GFP_ATOMIC); |
| 1040 | spin_lock_irqsave(&tp->rx_lock, lockflags); |
| 1041 | if (ret && ret != -ENODEV) { |
| 1042 | list_add_tail(&agg->list, next); |
| 1043 | tasklet_schedule(&tp->tl); |
| 1044 | } |
| 1045 | } |
| 1046 | spin_unlock_irqrestore(&tp->rx_lock, lockflags); |
| 1047 | } |
| 1048 | |
| 1049 | static void tx_bottom(struct r8152 *tp) |
| 1050 | { |
| 1051 | struct net_device_stats *stats; |
| 1052 | struct net_device *netdev; |
| 1053 | struct tx_agg *agg; |
| 1054 | unsigned long lockflags; |
| 1055 | u32 remain, total; |
| 1056 | u8 *tx_data; |
| 1057 | int res; |
| 1058 | |
| 1059 | netdev = tp->netdev; |
| 1060 | |
| 1061 | next_agg: |
| 1062 | agg = NULL; |
| 1063 | spin_lock_irqsave(&tp->tx_lock, lockflags); |
| 1064 | if (!skb_queue_empty(&tp->tx_queue) && !list_empty(&tp->tx_free)) { |
| 1065 | struct list_head *cursor; |
| 1066 | |
| 1067 | cursor = tp->tx_free.next; |
| 1068 | list_del_init(cursor); |
| 1069 | agg = list_entry(cursor, struct tx_agg, list); |
| 1070 | } |
| 1071 | spin_unlock_irqrestore(&tp->tx_lock, lockflags); |
| 1072 | |
| 1073 | if (!agg) |
| 1074 | return; |
| 1075 | |
| 1076 | tx_data = agg->head; |
| 1077 | agg->skb_num = agg->skb_len = 0; |
| 1078 | remain = rx_buf_sz - sizeof(struct tx_desc); |
| 1079 | total = 0; |
| 1080 | |
| 1081 | while (remain >= ETH_ZLEN) { |
| 1082 | struct tx_desc *tx_desc; |
| 1083 | struct sk_buff *skb; |
| 1084 | unsigned int len; |
| 1085 | |
| 1086 | skb = skb_dequeue(&tp->tx_queue); |
| 1087 | if (!skb) |
| 1088 | break; |
| 1089 | |
| 1090 | len = skb->len; |
| 1091 | if (remain < len) { |
| 1092 | skb_queue_head(&tp->tx_queue, skb); |
| 1093 | break; |
| 1094 | } |
| 1095 | |
| 1096 | tx_data = tx_agg_align(tx_data); |
| 1097 | tx_desc = (struct tx_desc *)tx_data; |
| 1098 | tx_data += sizeof(*tx_desc); |
| 1099 | |
| 1100 | tx_desc->opts1 = cpu_to_le32((skb->len & TX_LEN_MASK) | TX_FS | |
| 1101 | TX_LS); |
| 1102 | memcpy(tx_data, skb->data, len); |
| 1103 | agg->skb_num++; |
| 1104 | agg->skb_len += len; |
| 1105 | dev_kfree_skb_any(skb); |
| 1106 | |
| 1107 | tx_data += len; |
| 1108 | remain = rx_buf_sz - sizeof(*tx_desc) - |
| 1109 | (u32)(tx_agg_align(tx_data) - agg->head); |
| 1110 | } |
| 1111 | |
| 1112 | usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2), |
| 1113 | agg->head, (int)(tx_data - (u8 *)agg->head), |
| 1114 | (usb_complete_t)write_bulk_callback, agg); |
| 1115 | res = usb_submit_urb(agg->urb, GFP_ATOMIC); |
| 1116 | |
| 1117 | stats = rtl8152_get_stats(netdev); |
| 1118 | |
| 1119 | if (res) { |
| 1120 | /* Can we get/handle EPIPE here? */ |
| 1121 | if (res == -ENODEV) { |
| 1122 | netif_device_detach(netdev); |
| 1123 | } else { |
| 1124 | netif_warn(tp, tx_err, netdev, |
| 1125 | "failed tx_urb %d\n", res); |
| 1126 | stats->tx_dropped += agg->skb_num; |
| 1127 | spin_lock_irqsave(&tp->tx_lock, lockflags); |
| 1128 | list_add_tail(&agg->list, &tp->tx_free); |
| 1129 | spin_unlock_irqrestore(&tp->tx_lock, lockflags); |
| 1130 | } |
| 1131 | return; |
| 1132 | } |
| 1133 | goto next_agg; |
| 1134 | } |
| 1135 | |
| 1136 | static void bottom_half(unsigned long data) |
| 1137 | { |
| 1138 | struct r8152 *tp; |
| 1139 | |
| 1140 | tp = (struct r8152 *)data; |
| 1141 | |
| 1142 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
| 1143 | return; |
| 1144 | |
| 1145 | if (!test_bit(WORK_ENABLE, &tp->flags)) |
| 1146 | return; |
| 1147 | |
| 1148 | if (!netif_carrier_ok(tp->netdev)) |
| 1149 | return; |
| 1150 | |
| 1151 | rx_bottom(tp); |
| 1152 | tx_bottom(tp); |
| 1153 | } |
| 1154 | |
| 1155 | static |
| 1156 | int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags) |
| 1157 | { |
| 1158 | usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1), |
| 1159 | agg->head, rx_buf_sz, |
| 1160 | (usb_complete_t)read_bulk_callback, agg); |
| 1161 | |
| 1162 | return usb_submit_urb(agg->urb, mem_flags); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1163 | } |
| 1164 | |
| 1165 | static void rtl8152_tx_timeout(struct net_device *netdev) |
| 1166 | { |
| 1167 | struct r8152 *tp = netdev_priv(netdev); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1168 | int i; |
| 1169 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1170 | netif_warn(tp, tx_err, netdev, "Tx timeout.\n"); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1171 | for (i = 0; i < RTL8152_MAX_TX; i++) |
| 1172 | usb_unlink_urb(tp->tx_info[i].urb); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1173 | } |
| 1174 | |
| 1175 | static void rtl8152_set_rx_mode(struct net_device *netdev) |
| 1176 | { |
| 1177 | struct r8152 *tp = netdev_priv(netdev); |
| 1178 | |
| 1179 | if (tp->speed & LINK_STATUS) |
| 1180 | set_bit(RTL8152_SET_RX_MODE, &tp->flags); |
| 1181 | } |
| 1182 | |
| 1183 | static void _rtl8152_set_rx_mode(struct net_device *netdev) |
| 1184 | { |
| 1185 | struct r8152 *tp = netdev_priv(netdev); |
hayeswang | 31787f5 | 2013-07-31 17:21:25 +0800 | [diff] [blame] | 1186 | u32 mc_filter[2]; /* Multicast hash filter */ |
| 1187 | __le32 tmp[2]; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1188 | u32 ocp_data; |
| 1189 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1190 | clear_bit(RTL8152_SET_RX_MODE, &tp->flags); |
| 1191 | netif_stop_queue(netdev); |
| 1192 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR); |
| 1193 | ocp_data &= ~RCR_ACPT_ALL; |
| 1194 | ocp_data |= RCR_AB | RCR_APM; |
| 1195 | |
| 1196 | if (netdev->flags & IFF_PROMISC) { |
| 1197 | /* Unconditionally log net taps. */ |
| 1198 | netif_notice(tp, link, netdev, "Promiscuous mode enabled\n"); |
| 1199 | ocp_data |= RCR_AM | RCR_AAP; |
| 1200 | mc_filter[1] = mc_filter[0] = 0xffffffff; |
| 1201 | } else if ((netdev_mc_count(netdev) > multicast_filter_limit) || |
| 1202 | (netdev->flags & IFF_ALLMULTI)) { |
| 1203 | /* Too many to filter perfectly -- accept all multicasts. */ |
| 1204 | ocp_data |= RCR_AM; |
| 1205 | mc_filter[1] = mc_filter[0] = 0xffffffff; |
| 1206 | } else { |
| 1207 | struct netdev_hw_addr *ha; |
| 1208 | |
| 1209 | mc_filter[1] = mc_filter[0] = 0; |
| 1210 | netdev_for_each_mc_addr(ha, netdev) { |
| 1211 | int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26; |
| 1212 | mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); |
| 1213 | ocp_data |= RCR_AM; |
| 1214 | } |
| 1215 | } |
| 1216 | |
hayeswang | 31787f5 | 2013-07-31 17:21:25 +0800 | [diff] [blame] | 1217 | tmp[0] = __cpu_to_le32(swab32(mc_filter[1])); |
| 1218 | tmp[1] = __cpu_to_le32(swab32(mc_filter[0])); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1219 | |
hayeswang | 31787f5 | 2013-07-31 17:21:25 +0800 | [diff] [blame] | 1220 | pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1221 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); |
| 1222 | netif_wake_queue(netdev); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1223 | } |
| 1224 | |
| 1225 | static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb, |
| 1226 | struct net_device *netdev) |
| 1227 | { |
| 1228 | struct r8152 *tp = netdev_priv(netdev); |
| 1229 | struct net_device_stats *stats = rtl8152_get_stats(netdev); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1230 | unsigned long lockflags; |
| 1231 | struct tx_agg *agg = NULL; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1232 | struct tx_desc *tx_desc; |
hayeswang | 3ff25e3 | 2013-07-12 16:26:15 +0800 | [diff] [blame] | 1233 | unsigned int len; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1234 | u8 *tx_data; |
hayeswang | 3ff25e3 | 2013-07-12 16:26:15 +0800 | [diff] [blame] | 1235 | int res; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1236 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1237 | skb_tx_timestamp(skb); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1238 | |
| 1239 | spin_lock_irqsave(&tp->tx_lock, lockflags); |
| 1240 | if (!list_empty(&tp->tx_free) && skb_queue_empty(&tp->tx_queue)) { |
| 1241 | struct list_head *cursor; |
| 1242 | |
| 1243 | cursor = tp->tx_free.next; |
| 1244 | list_del_init(cursor); |
| 1245 | agg = list_entry(cursor, struct tx_agg, list); |
| 1246 | } |
| 1247 | spin_unlock_irqrestore(&tp->tx_lock, lockflags); |
| 1248 | |
| 1249 | if (!agg) { |
| 1250 | skb_queue_tail(&tp->tx_queue, skb); |
| 1251 | return NETDEV_TX_OK; |
| 1252 | } |
| 1253 | |
| 1254 | tx_desc = (struct tx_desc *)agg->head; |
| 1255 | tx_data = agg->head + sizeof(*tx_desc); |
| 1256 | agg->skb_num = agg->skb_len = 0; |
| 1257 | |
| 1258 | len = skb->len; |
| 1259 | tx_desc->opts1 = cpu_to_le32((skb->len & TX_LEN_MASK) | TX_FS | TX_LS); |
| 1260 | memcpy(tx_data, skb->data, len); |
| 1261 | dev_kfree_skb_any(skb); |
| 1262 | agg->skb_num++; |
| 1263 | agg->skb_len += len; |
| 1264 | usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2), |
| 1265 | agg->head, len + sizeof(*tx_desc), |
| 1266 | (usb_complete_t)write_bulk_callback, agg); |
| 1267 | res = usb_submit_urb(agg->urb, GFP_ATOMIC); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1268 | if (res) { |
| 1269 | /* Can we get/handle EPIPE here? */ |
| 1270 | if (res == -ENODEV) { |
| 1271 | netif_device_detach(tp->netdev); |
| 1272 | } else { |
| 1273 | netif_warn(tp, tx_err, netdev, |
| 1274 | "failed tx_urb %d\n", res); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1275 | stats->tx_dropped++; |
| 1276 | spin_lock_irqsave(&tp->tx_lock, lockflags); |
| 1277 | list_add_tail(&agg->list, &tp->tx_free); |
| 1278 | spin_unlock_irqrestore(&tp->tx_lock, lockflags); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1279 | } |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1280 | } |
| 1281 | |
| 1282 | return NETDEV_TX_OK; |
| 1283 | } |
| 1284 | |
| 1285 | static void r8152b_reset_packet_filter(struct r8152 *tp) |
| 1286 | { |
| 1287 | u32 ocp_data; |
| 1288 | |
| 1289 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC); |
| 1290 | ocp_data &= ~FMC_FCR_MCU_EN; |
| 1291 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data); |
| 1292 | ocp_data |= FMC_FCR_MCU_EN; |
| 1293 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data); |
| 1294 | } |
| 1295 | |
| 1296 | static void rtl8152_nic_reset(struct r8152 *tp) |
| 1297 | { |
| 1298 | int i; |
| 1299 | |
| 1300 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST); |
| 1301 | |
| 1302 | for (i = 0; i < 1000; i++) { |
| 1303 | if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST)) |
| 1304 | break; |
| 1305 | udelay(100); |
| 1306 | } |
| 1307 | } |
| 1308 | |
| 1309 | static inline u8 rtl8152_get_speed(struct r8152 *tp) |
| 1310 | { |
| 1311 | return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS); |
| 1312 | } |
| 1313 | |
| 1314 | static int rtl8152_enable(struct r8152 *tp) |
| 1315 | { |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1316 | u32 ocp_data; |
| 1317 | int i, ret; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1318 | u8 speed; |
| 1319 | |
| 1320 | speed = rtl8152_get_speed(tp); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1321 | if (speed & _10bps) { |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1322 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1323 | ocp_data |= EEEP_CR_EEEP_TX; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1324 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data); |
| 1325 | } else { |
| 1326 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1327 | ocp_data &= ~EEEP_CR_EEEP_TX; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1328 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data); |
| 1329 | } |
| 1330 | |
| 1331 | r8152b_reset_packet_filter(tp); |
| 1332 | |
| 1333 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR); |
| 1334 | ocp_data |= CR_RE | CR_TE; |
| 1335 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data); |
| 1336 | |
| 1337 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1); |
| 1338 | ocp_data &= ~RXDY_GATED_EN; |
| 1339 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data); |
| 1340 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1341 | INIT_LIST_HEAD(&tp->rx_done); |
| 1342 | ret = 0; |
| 1343 | for (i = 0; i < RTL8152_MAX_RX; i++) { |
| 1344 | INIT_LIST_HEAD(&tp->rx_info[i].list); |
| 1345 | ret |= r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL); |
| 1346 | } |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1347 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1348 | return ret; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1349 | } |
| 1350 | |
| 1351 | static void rtl8152_disable(struct r8152 *tp) |
| 1352 | { |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1353 | struct net_device_stats *stats = rtl8152_get_stats(tp->netdev); |
| 1354 | struct sk_buff *skb; |
| 1355 | u32 ocp_data; |
| 1356 | int i; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1357 | |
| 1358 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR); |
| 1359 | ocp_data &= ~RCR_ACPT_ALL; |
| 1360 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); |
| 1361 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1362 | while ((skb = skb_dequeue(&tp->tx_queue))) { |
| 1363 | dev_kfree_skb(skb); |
| 1364 | stats->tx_dropped++; |
| 1365 | } |
| 1366 | |
| 1367 | for (i = 0; i < RTL8152_MAX_TX; i++) |
| 1368 | usb_kill_urb(tp->tx_info[i].urb); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1369 | |
| 1370 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1); |
| 1371 | ocp_data |= RXDY_GATED_EN; |
| 1372 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data); |
| 1373 | |
| 1374 | for (i = 0; i < 1000; i++) { |
| 1375 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); |
| 1376 | if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY) |
| 1377 | break; |
| 1378 | mdelay(1); |
| 1379 | } |
| 1380 | |
| 1381 | for (i = 0; i < 1000; i++) { |
| 1382 | if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY) |
| 1383 | break; |
| 1384 | mdelay(1); |
| 1385 | } |
| 1386 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1387 | for (i = 0; i < RTL8152_MAX_RX; i++) |
| 1388 | usb_kill_urb(tp->rx_info[i].urb); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1389 | |
| 1390 | rtl8152_nic_reset(tp); |
| 1391 | } |
| 1392 | |
| 1393 | static void r8152b_exit_oob(struct r8152 *tp) |
| 1394 | { |
| 1395 | u32 ocp_data; |
| 1396 | int i; |
| 1397 | |
| 1398 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR); |
| 1399 | ocp_data &= ~RCR_ACPT_ALL; |
| 1400 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); |
| 1401 | |
| 1402 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1); |
| 1403 | ocp_data |= RXDY_GATED_EN; |
| 1404 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data); |
| 1405 | |
| 1406 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML); |
| 1407 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00); |
| 1408 | |
| 1409 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); |
| 1410 | ocp_data &= ~NOW_IS_OOB; |
| 1411 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); |
| 1412 | |
| 1413 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); |
| 1414 | ocp_data &= ~MCU_BORW_EN; |
| 1415 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data); |
| 1416 | |
| 1417 | for (i = 0; i < 1000; i++) { |
| 1418 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); |
| 1419 | if (ocp_data & LINK_LIST_READY) |
| 1420 | break; |
| 1421 | mdelay(1); |
| 1422 | } |
| 1423 | |
| 1424 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); |
| 1425 | ocp_data |= RE_INIT_LL; |
| 1426 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data); |
| 1427 | |
| 1428 | for (i = 0; i < 1000; i++) { |
| 1429 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); |
| 1430 | if (ocp_data & LINK_LIST_READY) |
| 1431 | break; |
| 1432 | mdelay(1); |
| 1433 | } |
| 1434 | |
| 1435 | rtl8152_nic_reset(tp); |
| 1436 | |
| 1437 | /* rx share fifo credit full threshold */ |
| 1438 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL); |
| 1439 | |
| 1440 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_DEV_STAT); |
| 1441 | ocp_data &= STAT_SPEED_MASK; |
| 1442 | if (ocp_data == STAT_SPEED_FULL) { |
| 1443 | /* rx share fifo credit near full threshold */ |
| 1444 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, |
| 1445 | RXFIFO_THR2_FULL); |
| 1446 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, |
| 1447 | RXFIFO_THR3_FULL); |
| 1448 | } else { |
| 1449 | /* rx share fifo credit near full threshold */ |
| 1450 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, |
| 1451 | RXFIFO_THR2_HIGH); |
| 1452 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, |
| 1453 | RXFIFO_THR3_HIGH); |
| 1454 | } |
| 1455 | |
| 1456 | /* TX share fifo free credit full threshold */ |
| 1457 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL); |
| 1458 | |
| 1459 | ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD); |
| 1460 | ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_BUF_THR); |
| 1461 | ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA, |
| 1462 | TEST_MODE_DISABLE | TX_SIZE_ADJUST1); |
| 1463 | |
| 1464 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR); |
| 1465 | ocp_data &= ~CPCR_RX_VLAN; |
| 1466 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data); |
| 1467 | |
| 1468 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS); |
| 1469 | |
| 1470 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0); |
| 1471 | ocp_data |= TCR0_AUTO_FIFO; |
| 1472 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data); |
| 1473 | } |
| 1474 | |
| 1475 | static void r8152b_enter_oob(struct r8152 *tp) |
| 1476 | { |
| 1477 | u32 ocp_data; |
| 1478 | int i; |
| 1479 | |
| 1480 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); |
| 1481 | ocp_data &= ~NOW_IS_OOB; |
| 1482 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); |
| 1483 | |
| 1484 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB); |
| 1485 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB); |
| 1486 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB); |
| 1487 | |
| 1488 | rtl8152_disable(tp); |
| 1489 | |
| 1490 | for (i = 0; i < 1000; i++) { |
| 1491 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); |
| 1492 | if (ocp_data & LINK_LIST_READY) |
| 1493 | break; |
| 1494 | mdelay(1); |
| 1495 | } |
| 1496 | |
| 1497 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); |
| 1498 | ocp_data |= RE_INIT_LL; |
| 1499 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data); |
| 1500 | |
| 1501 | for (i = 0; i < 1000; i++) { |
| 1502 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); |
| 1503 | if (ocp_data & LINK_LIST_READY) |
| 1504 | break; |
| 1505 | mdelay(1); |
| 1506 | } |
| 1507 | |
| 1508 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS); |
| 1509 | |
| 1510 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL); |
| 1511 | ocp_data |= MAGIC_EN; |
| 1512 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data); |
| 1513 | |
| 1514 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR); |
| 1515 | ocp_data |= CPCR_RX_VLAN; |
| 1516 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data); |
| 1517 | |
| 1518 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR); |
| 1519 | ocp_data |= ALDPS_PROXY_MODE; |
| 1520 | ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data); |
| 1521 | |
| 1522 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); |
| 1523 | ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB; |
| 1524 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); |
| 1525 | |
| 1526 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5, LAN_WAKE_EN); |
| 1527 | |
| 1528 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1); |
| 1529 | ocp_data &= ~RXDY_GATED_EN; |
| 1530 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data); |
| 1531 | |
| 1532 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR); |
| 1533 | ocp_data |= RCR_APM | RCR_AM | RCR_AB; |
| 1534 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); |
| 1535 | } |
| 1536 | |
| 1537 | static void r8152b_disable_aldps(struct r8152 *tp) |
| 1538 | { |
| 1539 | ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE); |
| 1540 | msleep(20); |
| 1541 | } |
| 1542 | |
| 1543 | static inline void r8152b_enable_aldps(struct r8152 *tp) |
| 1544 | { |
| 1545 | ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS | |
| 1546 | LINKENA | DIS_SDSAVE); |
| 1547 | } |
| 1548 | |
| 1549 | static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex) |
| 1550 | { |
| 1551 | u16 bmcr, anar; |
| 1552 | int ret = 0; |
| 1553 | |
| 1554 | cancel_delayed_work_sync(&tp->schedule); |
| 1555 | anar = r8152_mdio_read(tp, MII_ADVERTISE); |
| 1556 | anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | |
| 1557 | ADVERTISE_100HALF | ADVERTISE_100FULL); |
| 1558 | |
| 1559 | if (autoneg == AUTONEG_DISABLE) { |
| 1560 | if (speed == SPEED_10) { |
| 1561 | bmcr = 0; |
| 1562 | anar |= ADVERTISE_10HALF | ADVERTISE_10FULL; |
| 1563 | } else if (speed == SPEED_100) { |
| 1564 | bmcr = BMCR_SPEED100; |
| 1565 | anar |= ADVERTISE_100HALF | ADVERTISE_100FULL; |
| 1566 | } else { |
| 1567 | ret = -EINVAL; |
| 1568 | goto out; |
| 1569 | } |
| 1570 | |
| 1571 | if (duplex == DUPLEX_FULL) |
| 1572 | bmcr |= BMCR_FULLDPLX; |
| 1573 | } else { |
| 1574 | if (speed == SPEED_10) { |
| 1575 | if (duplex == DUPLEX_FULL) |
| 1576 | anar |= ADVERTISE_10HALF | ADVERTISE_10FULL; |
| 1577 | else |
| 1578 | anar |= ADVERTISE_10HALF; |
| 1579 | } else if (speed == SPEED_100) { |
| 1580 | if (duplex == DUPLEX_FULL) { |
| 1581 | anar |= ADVERTISE_10HALF | ADVERTISE_10FULL; |
| 1582 | anar |= ADVERTISE_100HALF | ADVERTISE_100FULL; |
| 1583 | } else { |
| 1584 | anar |= ADVERTISE_10HALF; |
| 1585 | anar |= ADVERTISE_100HALF; |
| 1586 | } |
| 1587 | } else { |
| 1588 | ret = -EINVAL; |
| 1589 | goto out; |
| 1590 | } |
| 1591 | |
| 1592 | bmcr = BMCR_ANENABLE | BMCR_ANRESTART; |
| 1593 | } |
| 1594 | |
| 1595 | r8152_mdio_write(tp, MII_ADVERTISE, anar); |
| 1596 | r8152_mdio_write(tp, MII_BMCR, bmcr); |
| 1597 | |
| 1598 | out: |
| 1599 | schedule_delayed_work(&tp->schedule, 5 * HZ); |
| 1600 | |
| 1601 | return ret; |
| 1602 | } |
| 1603 | |
| 1604 | static void rtl8152_down(struct r8152 *tp) |
| 1605 | { |
| 1606 | u32 ocp_data; |
| 1607 | |
| 1608 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL); |
| 1609 | ocp_data &= ~POWER_CUT; |
| 1610 | ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data); |
| 1611 | |
| 1612 | r8152b_disable_aldps(tp); |
| 1613 | r8152b_enter_oob(tp); |
| 1614 | r8152b_enable_aldps(tp); |
| 1615 | } |
| 1616 | |
| 1617 | static void set_carrier(struct r8152 *tp) |
| 1618 | { |
| 1619 | struct net_device *netdev = tp->netdev; |
| 1620 | u8 speed; |
| 1621 | |
| 1622 | speed = rtl8152_get_speed(tp); |
| 1623 | |
| 1624 | if (speed & LINK_STATUS) { |
| 1625 | if (!(tp->speed & LINK_STATUS)) { |
| 1626 | rtl8152_enable(tp); |
| 1627 | set_bit(RTL8152_SET_RX_MODE, &tp->flags); |
| 1628 | netif_carrier_on(netdev); |
| 1629 | } |
| 1630 | } else { |
| 1631 | if (tp->speed & LINK_STATUS) { |
| 1632 | netif_carrier_off(netdev); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1633 | tasklet_disable(&tp->tl); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1634 | rtl8152_disable(tp); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1635 | tasklet_enable(&tp->tl); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1636 | } |
| 1637 | } |
| 1638 | tp->speed = speed; |
| 1639 | } |
| 1640 | |
| 1641 | static void rtl_work_func_t(struct work_struct *work) |
| 1642 | { |
| 1643 | struct r8152 *tp = container_of(work, struct r8152, schedule.work); |
| 1644 | |
| 1645 | if (!test_bit(WORK_ENABLE, &tp->flags)) |
| 1646 | goto out1; |
| 1647 | |
| 1648 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
| 1649 | goto out1; |
| 1650 | |
| 1651 | set_carrier(tp); |
| 1652 | |
| 1653 | if (test_bit(RTL8152_SET_RX_MODE, &tp->flags)) |
| 1654 | _rtl8152_set_rx_mode(tp->netdev); |
| 1655 | |
| 1656 | schedule_delayed_work(&tp->schedule, HZ); |
| 1657 | |
| 1658 | out1: |
| 1659 | return; |
| 1660 | } |
| 1661 | |
| 1662 | static int rtl8152_open(struct net_device *netdev) |
| 1663 | { |
| 1664 | struct r8152 *tp = netdev_priv(netdev); |
| 1665 | int res = 0; |
| 1666 | |
| 1667 | tp->speed = rtl8152_get_speed(tp); |
| 1668 | if (tp->speed & LINK_STATUS) { |
| 1669 | res = rtl8152_enable(tp); |
| 1670 | if (res) { |
| 1671 | if (res == -ENODEV) |
| 1672 | netif_device_detach(tp->netdev); |
| 1673 | |
| 1674 | netif_err(tp, ifup, netdev, |
| 1675 | "rtl8152_open failed: %d\n", res); |
| 1676 | return res; |
| 1677 | } |
| 1678 | |
| 1679 | netif_carrier_on(netdev); |
| 1680 | } else { |
| 1681 | netif_stop_queue(netdev); |
| 1682 | netif_carrier_off(netdev); |
| 1683 | } |
| 1684 | |
| 1685 | rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL); |
| 1686 | netif_start_queue(netdev); |
| 1687 | set_bit(WORK_ENABLE, &tp->flags); |
| 1688 | schedule_delayed_work(&tp->schedule, 0); |
| 1689 | |
| 1690 | return res; |
| 1691 | } |
| 1692 | |
| 1693 | static int rtl8152_close(struct net_device *netdev) |
| 1694 | { |
| 1695 | struct r8152 *tp = netdev_priv(netdev); |
| 1696 | int res = 0; |
| 1697 | |
| 1698 | clear_bit(WORK_ENABLE, &tp->flags); |
| 1699 | cancel_delayed_work_sync(&tp->schedule); |
| 1700 | netif_stop_queue(netdev); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1701 | tasklet_disable(&tp->tl); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1702 | rtl8152_disable(tp); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1703 | tasklet_enable(&tp->tl); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1704 | |
| 1705 | return res; |
| 1706 | } |
| 1707 | |
| 1708 | static void rtl_clear_bp(struct r8152 *tp) |
| 1709 | { |
| 1710 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0); |
| 1711 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_2, 0); |
| 1712 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_4, 0); |
| 1713 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_6, 0); |
| 1714 | ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_0, 0); |
| 1715 | ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_2, 0); |
| 1716 | ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_4, 0); |
| 1717 | ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_6, 0); |
| 1718 | mdelay(3); |
| 1719 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0); |
| 1720 | ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0); |
| 1721 | } |
| 1722 | |
| 1723 | static void r8152b_enable_eee(struct r8152 *tp) |
| 1724 | { |
| 1725 | u32 ocp_data; |
| 1726 | |
| 1727 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR); |
| 1728 | ocp_data |= EEE_RX_EN | EEE_TX_EN; |
| 1729 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data); |
| 1730 | ocp_reg_write(tp, OCP_EEE_CONFIG1, RG_TXLPI_MSK_HFDUP | RG_MATCLR_EN | |
| 1731 | EEE_10_CAP | EEE_NWAY_EN | |
| 1732 | TX_QUIET_EN | RX_QUIET_EN | |
| 1733 | SDRISETIME | RG_RXLPI_MSK_HFDUP | |
| 1734 | SDFALLTIME); |
| 1735 | ocp_reg_write(tp, OCP_EEE_CONFIG2, RG_LPIHYS_NUM | RG_DACQUIET_EN | |
| 1736 | RG_LDVQUIET_EN | RG_CKRSEL | |
| 1737 | RG_EEEPRG_EN); |
| 1738 | ocp_reg_write(tp, OCP_EEE_CONFIG3, FST_SNR_EYE_R | RG_LFS_SEL | MSK_PH); |
| 1739 | ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | DEVICE_ADDR); |
| 1740 | ocp_reg_write(tp, OCP_EEE_DATA, EEE_ADDR); |
| 1741 | ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | DEVICE_ADDR); |
| 1742 | ocp_reg_write(tp, OCP_EEE_DATA, EEE_DATA); |
| 1743 | ocp_reg_write(tp, OCP_EEE_AR, 0x0000); |
| 1744 | } |
| 1745 | |
| 1746 | static void r8152b_enable_fc(struct r8152 *tp) |
| 1747 | { |
| 1748 | u16 anar; |
| 1749 | |
| 1750 | anar = r8152_mdio_read(tp, MII_ADVERTISE); |
| 1751 | anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 1752 | r8152_mdio_write(tp, MII_ADVERTISE, anar); |
| 1753 | } |
| 1754 | |
| 1755 | static void r8152b_hw_phy_cfg(struct r8152 *tp) |
| 1756 | { |
| 1757 | r8152_mdio_write(tp, MII_BMCR, BMCR_ANENABLE); |
| 1758 | r8152b_disable_aldps(tp); |
| 1759 | } |
| 1760 | |
| 1761 | static void r8152b_init(struct r8152 *tp) |
| 1762 | { |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1763 | u32 ocp_data; |
| 1764 | int i; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1765 | |
| 1766 | rtl_clear_bp(tp); |
| 1767 | |
| 1768 | if (tp->version == RTL_VER_01) { |
| 1769 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE); |
| 1770 | ocp_data &= ~LED_MODE_MASK; |
| 1771 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data); |
| 1772 | } |
| 1773 | |
| 1774 | r8152b_hw_phy_cfg(tp); |
| 1775 | |
| 1776 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL); |
| 1777 | ocp_data &= ~POWER_CUT; |
| 1778 | ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data); |
| 1779 | |
| 1780 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS); |
| 1781 | ocp_data &= ~RWSUME_INDICATE; |
| 1782 | ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data); |
| 1783 | |
| 1784 | r8152b_exit_oob(tp); |
| 1785 | |
| 1786 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR); |
| 1787 | ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH; |
| 1788 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data); |
| 1789 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL); |
| 1790 | ocp_data &= ~MCU_CLK_RATIO_MASK; |
| 1791 | ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN; |
| 1792 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data); |
| 1793 | ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK | |
| 1794 | SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK; |
| 1795 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data); |
| 1796 | |
| 1797 | r8152b_enable_eee(tp); |
| 1798 | r8152b_enable_aldps(tp); |
| 1799 | r8152b_enable_fc(tp); |
| 1800 | |
| 1801 | r8152_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE | |
| 1802 | BMCR_ANRESTART); |
| 1803 | for (i = 0; i < 100; i++) { |
| 1804 | udelay(100); |
| 1805 | if (!(r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET)) |
| 1806 | break; |
| 1807 | } |
| 1808 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1809 | /* enable rx aggregation */ |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1810 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1811 | ocp_data &= ~RX_AGG_DISABLE; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1812 | ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); |
| 1813 | } |
| 1814 | |
| 1815 | static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message) |
| 1816 | { |
| 1817 | struct r8152 *tp = usb_get_intfdata(intf); |
| 1818 | |
| 1819 | netif_device_detach(tp->netdev); |
| 1820 | |
| 1821 | if (netif_running(tp->netdev)) { |
| 1822 | clear_bit(WORK_ENABLE, &tp->flags); |
| 1823 | cancel_delayed_work_sync(&tp->schedule); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1824 | tasklet_disable(&tp->tl); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1825 | } |
| 1826 | |
| 1827 | rtl8152_down(tp); |
| 1828 | |
| 1829 | return 0; |
| 1830 | } |
| 1831 | |
| 1832 | static int rtl8152_resume(struct usb_interface *intf) |
| 1833 | { |
| 1834 | struct r8152 *tp = usb_get_intfdata(intf); |
| 1835 | |
| 1836 | r8152b_init(tp); |
| 1837 | netif_device_attach(tp->netdev); |
| 1838 | if (netif_running(tp->netdev)) { |
| 1839 | rtl8152_enable(tp); |
| 1840 | set_bit(WORK_ENABLE, &tp->flags); |
| 1841 | set_bit(RTL8152_SET_RX_MODE, &tp->flags); |
| 1842 | schedule_delayed_work(&tp->schedule, 0); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1843 | tasklet_enable(&tp->tl); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1844 | } |
| 1845 | |
| 1846 | return 0; |
| 1847 | } |
| 1848 | |
| 1849 | static void rtl8152_get_drvinfo(struct net_device *netdev, |
| 1850 | struct ethtool_drvinfo *info) |
| 1851 | { |
| 1852 | struct r8152 *tp = netdev_priv(netdev); |
| 1853 | |
| 1854 | strncpy(info->driver, MODULENAME, ETHTOOL_BUSINFO_LEN); |
| 1855 | strncpy(info->version, DRIVER_VERSION, ETHTOOL_BUSINFO_LEN); |
| 1856 | usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info)); |
| 1857 | } |
| 1858 | |
| 1859 | static |
| 1860 | int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd) |
| 1861 | { |
| 1862 | struct r8152 *tp = netdev_priv(netdev); |
| 1863 | |
| 1864 | if (!tp->mii.mdio_read) |
| 1865 | return -EOPNOTSUPP; |
| 1866 | |
| 1867 | return mii_ethtool_gset(&tp->mii, cmd); |
| 1868 | } |
| 1869 | |
| 1870 | static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 1871 | { |
| 1872 | struct r8152 *tp = netdev_priv(dev); |
| 1873 | |
| 1874 | return rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex); |
| 1875 | } |
| 1876 | |
| 1877 | static struct ethtool_ops ops = { |
| 1878 | .get_drvinfo = rtl8152_get_drvinfo, |
| 1879 | .get_settings = rtl8152_get_settings, |
| 1880 | .set_settings = rtl8152_set_settings, |
| 1881 | .get_link = ethtool_op_get_link, |
| 1882 | }; |
| 1883 | |
| 1884 | static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) |
| 1885 | { |
| 1886 | struct r8152 *tp = netdev_priv(netdev); |
| 1887 | struct mii_ioctl_data *data = if_mii(rq); |
| 1888 | int res = 0; |
| 1889 | |
| 1890 | switch (cmd) { |
| 1891 | case SIOCGMIIPHY: |
| 1892 | data->phy_id = R8152_PHY_ID; /* Internal PHY */ |
| 1893 | break; |
| 1894 | |
| 1895 | case SIOCGMIIREG: |
| 1896 | data->val_out = r8152_mdio_read(tp, data->reg_num); |
| 1897 | break; |
| 1898 | |
| 1899 | case SIOCSMIIREG: |
| 1900 | if (!capable(CAP_NET_ADMIN)) { |
| 1901 | res = -EPERM; |
| 1902 | break; |
| 1903 | } |
| 1904 | r8152_mdio_write(tp, data->reg_num, data->val_in); |
| 1905 | break; |
| 1906 | |
| 1907 | default: |
| 1908 | res = -EOPNOTSUPP; |
| 1909 | } |
| 1910 | |
| 1911 | return res; |
| 1912 | } |
| 1913 | |
| 1914 | static const struct net_device_ops rtl8152_netdev_ops = { |
| 1915 | .ndo_open = rtl8152_open, |
| 1916 | .ndo_stop = rtl8152_close, |
| 1917 | .ndo_do_ioctl = rtl8152_ioctl, |
| 1918 | .ndo_start_xmit = rtl8152_start_xmit, |
| 1919 | .ndo_tx_timeout = rtl8152_tx_timeout, |
| 1920 | .ndo_set_rx_mode = rtl8152_set_rx_mode, |
| 1921 | .ndo_set_mac_address = rtl8152_set_mac_address, |
| 1922 | |
| 1923 | .ndo_change_mtu = eth_change_mtu, |
| 1924 | .ndo_validate_addr = eth_validate_addr, |
| 1925 | }; |
| 1926 | |
| 1927 | static void r8152b_get_version(struct r8152 *tp) |
| 1928 | { |
| 1929 | u32 ocp_data; |
| 1930 | u16 version; |
| 1931 | |
| 1932 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1); |
| 1933 | version = (u16)(ocp_data & VERSION_MASK); |
| 1934 | |
| 1935 | switch (version) { |
| 1936 | case 0x4c00: |
| 1937 | tp->version = RTL_VER_01; |
| 1938 | break; |
| 1939 | case 0x4c10: |
| 1940 | tp->version = RTL_VER_02; |
| 1941 | break; |
| 1942 | default: |
| 1943 | netif_info(tp, probe, tp->netdev, |
| 1944 | "Unknown version 0x%04x\n", version); |
| 1945 | break; |
| 1946 | } |
| 1947 | } |
| 1948 | |
| 1949 | static int rtl8152_probe(struct usb_interface *intf, |
| 1950 | const struct usb_device_id *id) |
| 1951 | { |
| 1952 | struct usb_device *udev = interface_to_usbdev(intf); |
| 1953 | struct r8152 *tp; |
| 1954 | struct net_device *netdev; |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1955 | int ret; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1956 | |
| 1957 | if (udev->actconfig->desc.bConfigurationValue != 1) { |
| 1958 | usb_driver_set_configuration(udev, 1); |
| 1959 | return -ENODEV; |
| 1960 | } |
| 1961 | |
| 1962 | netdev = alloc_etherdev(sizeof(struct r8152)); |
| 1963 | if (!netdev) { |
| 1964 | dev_err(&intf->dev, "Out of memory"); |
| 1965 | return -ENOMEM; |
| 1966 | } |
| 1967 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1968 | SET_NETDEV_DEV(netdev, &intf->dev); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1969 | tp = netdev_priv(netdev); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1970 | memset(tp, 0, sizeof(*tp)); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1971 | tp->msg_enable = 0x7FFF; |
| 1972 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1973 | tasklet_init(&tp->tl, bottom_half, (unsigned long)tp); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1974 | INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t); |
| 1975 | |
| 1976 | tp->udev = udev; |
| 1977 | tp->netdev = netdev; |
| 1978 | netdev->netdev_ops = &rtl8152_netdev_ops; |
| 1979 | netdev->watchdog_timeo = RTL8152_TX_TIMEOUT; |
| 1980 | netdev->features &= ~NETIF_F_IP_CSUM; |
| 1981 | SET_ETHTOOL_OPS(netdev, &ops); |
| 1982 | tp->speed = 0; |
| 1983 | |
| 1984 | tp->mii.dev = netdev; |
| 1985 | tp->mii.mdio_read = read_mii_word; |
| 1986 | tp->mii.mdio_write = write_mii_word; |
| 1987 | tp->mii.phy_id_mask = 0x3f; |
| 1988 | tp->mii.reg_num_mask = 0x1f; |
| 1989 | tp->mii.phy_id = R8152_PHY_ID; |
| 1990 | tp->mii.supports_gmii = 0; |
| 1991 | |
| 1992 | r8152b_get_version(tp); |
| 1993 | r8152b_init(tp); |
| 1994 | set_ethernet_addr(tp); |
| 1995 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 1996 | ret = alloc_all_mem(tp); |
| 1997 | if (ret) |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1998 | goto out; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 1999 | |
| 2000 | usb_set_intfdata(intf, tp); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2001 | |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 2002 | ret = register_netdev(netdev); |
| 2003 | if (ret != 0) { |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2004 | netif_err(tp, probe, netdev, "couldn't register the device"); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 2005 | goto out1; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2006 | } |
| 2007 | |
| 2008 | netif_info(tp, probe, netdev, "%s", DRIVER_VERSION); |
| 2009 | |
| 2010 | return 0; |
| 2011 | |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2012 | out1: |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 2013 | usb_set_intfdata(intf, NULL); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2014 | out: |
| 2015 | free_netdev(netdev); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 2016 | return ret; |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2017 | } |
| 2018 | |
| 2019 | static void rtl8152_unload(struct r8152 *tp) |
| 2020 | { |
| 2021 | u32 ocp_data; |
| 2022 | |
| 2023 | if (tp->version != RTL_VER_01) { |
| 2024 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL); |
| 2025 | ocp_data |= POWER_CUT; |
| 2026 | ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data); |
| 2027 | } |
| 2028 | |
| 2029 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS); |
| 2030 | ocp_data &= ~RWSUME_INDICATE; |
| 2031 | ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data); |
| 2032 | } |
| 2033 | |
| 2034 | static void rtl8152_disconnect(struct usb_interface *intf) |
| 2035 | { |
| 2036 | struct r8152 *tp = usb_get_intfdata(intf); |
| 2037 | |
| 2038 | usb_set_intfdata(intf, NULL); |
| 2039 | if (tp) { |
| 2040 | set_bit(RTL8152_UNPLUG, &tp->flags); |
| 2041 | tasklet_kill(&tp->tl); |
| 2042 | unregister_netdev(tp->netdev); |
| 2043 | rtl8152_unload(tp); |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 2044 | free_all_mem(tp); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2045 | free_netdev(tp->netdev); |
| 2046 | } |
| 2047 | } |
| 2048 | |
| 2049 | /* table of devices that work with this driver */ |
| 2050 | static struct usb_device_id rtl8152_table[] = { |
| 2051 | {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)}, |
| 2052 | {} |
| 2053 | }; |
| 2054 | |
| 2055 | MODULE_DEVICE_TABLE(usb, rtl8152_table); |
| 2056 | |
| 2057 | static struct usb_driver rtl8152_driver = { |
| 2058 | .name = MODULENAME, |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 2059 | .id_table = rtl8152_table, |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2060 | .probe = rtl8152_probe, |
| 2061 | .disconnect = rtl8152_disconnect, |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2062 | .suspend = rtl8152_suspend, |
hayeswang | ebc2ec48 | 2013-08-14 20:54:38 +0800 | [diff] [blame^] | 2063 | .resume = rtl8152_resume, |
| 2064 | .reset_resume = rtl8152_resume, |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2065 | }; |
| 2066 | |
Sachin Kamat | b4236daa | 2013-05-16 17:48:08 +0000 | [diff] [blame] | 2067 | module_usb_driver(rtl8152_driver); |
hayeswang | ac718b6 | 2013-05-02 16:01:25 +0000 | [diff] [blame] | 2068 | |
| 2069 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 2070 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 2071 | MODULE_LICENSE("GPL"); |