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Esben Haabendal8425c412019-04-30 09:17:49 +02001/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __LINUX_XILINX_LL_TEMAC_H
3#define __LINUX_XILINX_LL_TEMAC_H
4
5#include <linux/if_ether.h>
6#include <linux/phy.h>
7
8struct ll_temac_platform_data {
9 bool txcsum; /* Enable/disable TX checksum */
10 bool rxcsum; /* Enable/disable RX checksum */
11 u8 mac_addr[ETH_ALEN]; /* MAC address (6 bytes) */
12 /* Clock frequency for input to MDIO clock generator */
13 u32 mdio_clk_freq;
14 unsigned long long mdio_bus_id; /* Unique id for MDIO bus */
15 int phy_addr; /* Address of the PHY to connect to */
16 phy_interface_t phy_interface; /* PHY interface mode */
Esben Haabendala3246dc2019-04-30 09:17:51 +020017 bool reg_little_endian; /* Little endian TEMAC register access */
18 bool dma_little_endian; /* Little endian DMA register access */
Esben Haabendalf14f5c12019-04-30 09:17:54 +020019 /* Pre-initialized mutex to use for synchronizing indirect
20 * register access. When using both interfaces of a single
21 * TEMAC IP block, the same mutex should be passed here, as
22 * they share the same DCR bus bridge.
23 */
24 struct mutex *indirect_mutex;
Esben Haabendal8425c412019-04-30 09:17:49 +020025};
26
27#endif /* __LINUX_XILINX_LL_TEMAC_H */