dts: arm64: add t6d device tree support [1/1]
PD#SWPL-184920
Problem:
t6d arm64 bringup
Solution:
add t6d device tree
Verify:
t6d br301
Change-Id: I82609f88eb4cfd262056b3b0048494e8f54a876d
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
diff --git a/arch/arm/boot/dts/amlogic/t6d_t950d5_br301_1.5g.dts b/arch/arm/boot/dts/amlogic/t6d_t950d5_br301_1.5g.dts
index 376a168..5395a4e 100644
--- a/arch/arm/boot/dts/amlogic/t6d_t950d5_br301_1.5g.dts
+++ b/arch/arm/boot/dts/amlogic/t6d_t950d5_br301_1.5g.dts
@@ -4,6 +4,7 @@
*/
/dts-v1/;
+
#include "mesont6d.dtsi"
#include "mesont6d_drm.dtsi"
#include "firmware_ab.dtsi"
@@ -600,7 +601,7 @@
};
tdmbcodec: codec {
prefix-names = "AMP";
- sound-dai = </*&ad82128*/ &acodec>;
+ sound-dai = </*&ad82120b*/ &acodec>;
};
};
@@ -953,6 +954,28 @@
};
};
+&spi_nfc {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spinf_pins>;
+ spi-nand@0 {
+ compatible = "spi-nand";
+ status = "disabled";
+ reg = <0>;
+ spi-max-frequency = <83000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+ spi-nor@0 {
+ compatible = "spi-nor";
+ status = "disabled";
+ reg = <0>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <83000000>;
+ };
+};
+
&periphs_pinctrl {
/*backlight*/
bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
@@ -1004,59 +1027,6 @@
};
};
-&mtd_nand {
- status = "disabled"; /* disabled as default */
- #address-cells = <1>;
- #size-cells = <0>;
-
- pinctrl-names = "nand_norb_mod","nand_cs_only";
- pinctrl-0 = <&all_nand_pins>;
- pinctrl-1 = <&nand_cs_pins>;
- bl_mode = <1>;
- fip_copies = <4>;
- fip_size = <0x200000>;
- ship_bad_block = <1>;
- disa_irq_flag = <1>;
- nand@bootloader {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- nand-ecc-maximize;
- partition@0 {
- label = "bl2";
- reg = <0x0 0x00000000>;
- };
- };
- nand@normal {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- nand-ecc-maximize;
- };
-};
-
-&spi_nfc {
- status = "disabled";
- pinctrl-names = "default";
- pinctrl-0 = <&spinf_pins>;
- spi-nand@0 {
- compatible = "spi-nand";
- status = "disabled";
- reg = <0>;
- spi-max-frequency = <83000000>;
- spi-tx-bus-width = <4>;
- spi-rx-bus-width = <4>;
- };
- spi-nor@0 {
- compatible = "spi-nor";
- status = "disabled";
- reg = <0>;
- spi-tx-bus-width = <4>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <83000000>;
- };
-};
-
&i2c2 {
status = "okay";
clock-frequency = <100000>;
diff --git a/arch/arm/boot/dts/amlogic/t6d_t950d5_br301_1g.dts b/arch/arm/boot/dts/amlogic/t6d_t950d5_br301_1g.dts
index ef1ba10..530375e 100644
--- a/arch/arm/boot/dts/amlogic/t6d_t950d5_br301_1g.dts
+++ b/arch/arm/boot/dts/amlogic/t6d_t950d5_br301_1g.dts
@@ -10,6 +10,7 @@
#include "firmware_ab.dtsi"
#include "mesont6d-panel.dtsi"
#include "mesont6d_audio.dtsi"
+
/ {
amlogic-dt-id = "t6d_t950d5_br301-1g";
compatible = "t6d_t950d5_br301-1g";
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 8281f20..a465f93 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -117,3 +117,5 @@
dtb-y += s6_s905x5_bl208.dtb
dtb-y += s6_s905x5_bl209.dtb
dtb-y += s6_s905x5_bn201.dtb
+dtb-y += t6d_t950d5_br301_1g.dtb
+dtb-y += t6d_t950d5_br301_1.5g.dtb
diff --git a/arch/arm64/boot/dts/amlogic/mesont6d-panel.dtsi b/arch/arm64/boot/dts/amlogic/mesont6d-panel.dtsi
new file mode 100644
index 0000000..83db38e
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/mesont6d-panel.dtsi
@@ -0,0 +1,208 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+/ {
+ lcd_resman {
+ compatible = "amlogic, lcd-resman";
+ status = "okay";
+ memory-region = <&lcd_cma_reserved>;
+ memory-region-names = "lcd_cma_reserved";
+ };
+
+ lcd:lcd {
+ compatible = "amlogic, lcd-t6d";
+ status = "okay";
+ index = <0>;
+ pxp = <0>;
+ mode = "tv";
+ fr_auto_policy = <1>; /* 0=disable, 1=enable */
+ key_valid = <1>;
+ reg = <0x0 0xfe3b0000 0x0 0xd000 /* tcon */
+ 0x0 0xfe004000 0x0 0x70 /* periphs */
+ 0x0 0xfe002000 0x0 0xa0>; /* reset */
+ interrupts = <0 197 1>;
+ interrupt-names = "vsync";
+ pinctrl-names = "tcon_mlvds","tcon_mlvds_off";
+ pinctrl-0 = <&lcd_tcon_mlvds_pins>;
+ pinctrl-1 = <&lcd_tcon_mlvds_off_pins>;
+
+ /* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */
+ /* power index:(gpios_index, or extern_index, 0xff=invalid) */
+ /* power value:(0=output low, 1=output high, 2=input) */
+ /* power delay:(unit in ms) */
+ /*
+ * lcd_cpu-gpios = <&gpio GPIOY_0 GPIO_ACTIVE_HIGH
+ * &gpio GPIOY_4 GPIO_ACTIVE_HIGH
+ * &gpio GPIOY_6 GPIO_ACTIVE_HIGH>;
+ * lcd_cpu_gpio_names = "GPIOY_0","GPIOY_4","GPIOY_6";
+ */
+ lcd_cpu-gpios = <&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
+ lcd_cpu_gpio_names = "GPIOH_7";
+
+ config_check_glb = <1>;
+ display_timing_req_min = <1 /*alert_level: 0:disable, 1:warning, 2:fatal error*/
+ 45 /*hsw+hbp*/
+ 0 /*hfp, 0 for no need*/
+ 20 /*vsw+vbp*/
+ 15>; /*vfp*/
+
+ lvds_0{
+ model_name = "1080p-vfreq";
+ interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 1920 1080 /*h_active, v_active*/
+ 2200 1125 /*h_period, v_period*/
+ 8 /*lcd_bits */
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 2132 2650 /*h_period_min,max*/
+ 1120 1480 /*v_period_min,max*/
+ 120000000 160000000>; /*pclk_min,max*/
+ lcd_timing = <
+ 44 148 0 /*hs_width, hs_bp, hs_pol*/
+ 5 20 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 2 /*fr_adj_type: 0=clk, 1=htotal, 2=vtotal, 3=auto, 4=hdmi */
+ 0 /*clk_ss: [0:7]:level, [8:11]:freq, [12:15]: mode*/
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ lvds_attr = <
+ 1 /*lvds_repack*/
+ 1 /*dual_port*/
+ 0 /*pn_swap*/
+ 0 /*port_swap*/
+ 0>; /*lane_reverse*/
+ phy_attr=<0x3 0>; /*vswing_level, preem_level*/
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 0 1 50 /*panel power*/
+ 2 0 0 0 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 10 /*signal disable*/
+ 0 0 0 500 /*panel power*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <0>;
+ };
+ };
+
+ lcd_extern {
+ compatible = "amlogic, lcd_extern";
+ status = "okay";
+ index = <0>;
+ key_valid = <1>;
+ i2c_bus = "i2c_bus_2";
+
+ extern_0 {
+ index = <0>;
+ extern_name = "ext_default";
+ status = "okay";
+ type = <0>; /*0=i2c, 1=spi, 2=mipi*/
+ i2c_address = <0x33>; /*7bit i2c_addr*/
+ i2c_address2 = <0xff>;
+ cmd_size = <0xff>; /*dynamic cmd_size*/
+
+ /* init on/off:
+ * fixed cmd_size: (type, value...);
+ * cmd_size include all data.
+ * dynamic cmd_size: (type, cmd_size, value...);
+ * cmd_size include value.
+ */
+ /* type: 0x00=cmd with delay(bit[3:0]=1 for address2),
+ * 0xc0=cmd(bit[3:0]=1 for address2),
+ * 0xf0=gpio,
+ * 0xfd=delay,
+ * 0xff=ending
+ */
+ /* value: i2c or spi cmd, or gpio index & level */
+ /* delay: unit ms */
+ init_on = <
+ 0xc0 43 0x00
+ 0x48 0x19 0xa4 0x00 0x00 0x23 0xfc 0x66 0xfb 0x2b 0x28 0x00
+ 0x10 0x10 0x07 0x07 0x3e 0xc3 0xd3 0x33 0xa2 0xde 0x2b 0x02
+ 0x3d 0x21 0xa1 0xbf 0x1a 0x71 0x33 0x0f 0xd0 0xa1 0x01 0x70
+ 0x0e 0x1a 0x11 0xb5 0xcd 0xf9
+ 0xff 0>; /*ending*/
+ init_off = <0xff 0>; /*ending*/
+ };
+ };
+
+ backlight{
+ compatible = "amlogic, backlight-t6d";
+ status = "okay";
+ index = <0>;
+ key_valid = <1>;
+ pinctrl-names = "pwm_on","pwm_vs_on",
+ "pwm_off";
+ pinctrl-0 = <&pwm_d_pins6>;
+ pinctrl-1 = <&bl_pwm_vs_on_pins>;
+ pinctrl-2 = <&bl_pwm_off_pins>;
+ pinctrl_version = <2>; /* for uboot */
+ interrupts-extended = <&gic 0 197 1>,<&gpio_intc 121 1>;
+ interrupt-names = "vsync","ldim_pwm_vs";
+ bl_pwm_config = <&bl_pwm_conf>;
+ //memory-region = <&ldc_mem_reserved>;
+
+ /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
+ /* power index:(point gpios_index, 0xff=invalid) */
+ /* power value:(0=output low, 1=output high, 2=input) */
+ /* power delay:(unit in ms) */
+ bl-gpios = <&gpio GPIOH_13 GPIO_ACTIVE_HIGH
+ &gpio GPIOH_12 GPIO_ACTIVE_HIGH>;
+ bl_gpio_names = "GPIOH_13","GPIOH_12";
+
+ backlight_0{
+ index = <0>;
+ bl_name = "backlight_pwm";
+ bl_level_default_uboot_kernel = <100 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/
+ bl_power_attr = <0 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 200 200>; /*on_delay(ms), off_delay(ms)*/
+ bl_pwm_port = "PWM_D";
+ bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positive)*/
+ 180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 100 25>; /*duty_max(%), duty_min(%)*/
+ bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/
+ 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
+ en_sequence_reverse = <0>; /* 1 for reverse */
+ };
+ backlight_1{
+ index = <1>;
+ bl_name = "backlight_pwm_vs";
+ bl_level_default_uboot_kernel = <100 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/
+ bl_power_attr = <0 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 200 200>; /* on_delay(ms), off_delay(ms)*/
+ bl_pwm_port = "PWM_VS";
+ bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positive)*/
+ 2 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 100 25>; /*duty_max(%), duty_min(%)*/
+ bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/
+ 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
+ en_sequence_reverse = <0>; /* 1 for reverse */
+ };
+
+ };
+
+ bl_pwm_conf:bl_pwm_conf{
+ pwm_channel_0 {
+ pwm_port = "PWM_D";
+ pwms = <&pwm_d MESON_PWM_0 30040 0>;
+ };
+
+ };
+};
+
+&pwm_d {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/mesont6d.dtsi b/arch/arm64/boot/dts/amlogic/mesont6d.dtsi
new file mode 100644
index 0000000..055a091
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/mesont6d.dtsi
@@ -0,0 +1,2746 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/amlogic,meson-t6d-reset.h>
+#include <dt-bindings/clock/t6d-clkc.h>
+#include <dt-bindings/clock/t6d-scmi-clkc.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/meson-t6d-gpio.h>
+#include <dt-bindings/power/t6d-pd.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/meson_ir.h>
+#include <dt-bindings/iio/adc/amlogic-saradc.h>
+#include "meson-ir-map.dtsi"
+#include "mesong12a-bifrost.dtsi"
+#include <dt-bindings/mailbox/t6d-mbox.h>
+#include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/hwspinlock/amlogic,hwspinlock.h>
+#include <dt-bindings/leds/leds-meson.h>
+
+/ {
+ cpus:cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+ apu_id = <0x4>;
+ apu_hwid = <0x400>;
+
+ CPU0:cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
+ dynamic-power-coefficient = <230>;
+ };
+
+ CPU1:cpu@1{
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
+ dynamic-power-coefficient = <230>;
+ };
+
+ CPU2:cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
+ dynamic-power-coefficient = <230>;
+ };
+
+ CPU3:cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
+ dynamic-power-coefficient = <230>;
+ };
+
+ idle-states {
+ entry-method = "arm,psci-0.2";
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0010000>;
+ local-timer-stop;
+ entry-latency-us = <600>;
+ exit-latency-us = <630>;
+ min-residency-us = <6140>;
+ };
+ SYSTEM_SLEEP_0: system-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0000000>;
+ entry-latency-us = <0x3fffffff>;
+ exit-latency-us = <0x40000000>;
+ min-residency-us = <0xffffffff>;
+ };
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 0xff08>,
+ <GIC_PPI 14 0xff08>,
+ <GIC_PPI 11 0xff08>,
+ <GIC_PPI 10 0xff08>;
+ };
+
+ gic: interrupt-controller@fff01000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xfff01000 0x0 0x1000>,
+ <0x0 0xfff02000 0x0 0x0100>;
+ interrupts = <GIC_PPI 9 0xf04>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ secmon {
+ compatible = "amlogic, secmon";
+ memory-region = <&secmon_reserved>;
+ in_base_func = <0x82000020>;
+ out_base_func = <0x82000021>;
+ inout_size_func = <0x8200002a>;
+ reserve_mem_size = <0x01B00000>;
+ };
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+
+ meson_suspend:pm {
+ compatible = "amlogic, pm";
+ device_name = "aml_pm";
+ extend_resume_reason;
+ reg = <0x0 0xfe010288 0x0 0x4>, /*SYSCTRL_STATUS_REG2*/
+ <0x0 0xfe0102dc 0x0 0x4>; /*SYSCTRL_STICKY_REG7*/
+ status = "okay";
+ };
+
+ aml_reboot {
+ compatible = "aml, reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+ dis_nb_cpus_in_shutdown;
+ extend_reboot_reason; /* Support up to 128 reboot reasons*/
+ reg = <0x0 0xfe01037c 0x0 0x4>; /* SEC_AO_SEC_SD_CFG15 */
+ status = "okay";
+ };
+
+ ram-dump {
+ compatible = "amlogic, ram_dump";
+ reg = <0x0 0xFE0102D8 0x0 4>;
+ reg-names = "SYSCTRL_STICKY_REG6";
+ store_device = "data";
+ status = "disabled";
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+
+ arm_pmu {
+ compatible = "arm,cortex-a15-pmu";
+ private-interrupts;
+ interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ amfc {
+ compatible = "amlogic,amfc-t6d";
+ status = "okay";
+ /* registers and clk */
+ reg = <0x0 0xfe092000 0x0 0x200
+ 0x0 0xFDFFFF6C 0x0 0x400>;
+ interrupts = <0 185 IRQ_TYPE_EDGE_RISING
+ 0 186 IRQ_TYPE_EDGE_RISING>;
+ power-domains = <&pwrdm PDID_T6D_AMFC>;
+ interrupt-names = "amfc0", "amfc1";
+ clocks = <&clkc CLKID_AMFC>;
+ assigned-clocks = <&clkc CLKID_AMFC>;
+ assigned-clock-rates = <666666666>;
+ };
+
+ ddr_bandwidth {
+ compatible = "amlogic,ddr-bandwidth-t6d";
+ status = "okay";
+ reg = <0x0 0xfe036000 0x0 0x1000
+ 0x0 0xfe0368a8 0x0 0x4>;
+ interrupts = <0 136 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ddr_bandwidth";
+ };
+
+ dmc_monitor {
+ compatible = "amlogic,dmc_monitor-t6d";
+ status = "okay";
+ memory-region = <&dmc_reserved>;
+ reg = <0x0 0xfe036000 0x0 0x400>;
+ reg_base = <0xfe036000>;
+ interrupts = <0 137 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pwrdm: power-domains {
+ compatible = "amlogic,t6d-power-domain";
+ #power-domain-cells = <1>;
+ status = "okay";
+ };
+
+ vrtc: rtc@0xfe010288 {
+ compatible = "amlogic,meson-vrtc";
+ reg = <0x0 0xfe010288 0x0 0x4>; //SYSCTRL_STATUS_REG2
+ status = "okay";
+ mboxes = <&mbox_fifo T6D_REE2AO_VRTC>;
+ };
+
+ mbox_fifo: mbox_fifo@0xfe006000 {
+ status = "okay";
+ compatible = "amlogic, t6d-mbox-fifo";
+ reg = <0x0 0xfe006000 0x0 0x800>, /* mbox wr fifo */
+ <0xfe007180 0x80>, /* mbox set reg */
+ <0xfe007200 0x80>, /* mbox clr reg */
+ <0xfe007280 0x80>, /* mbox sts reg */
+ <0xfe007040 0xc0>; /* mbox irqctrl reg */
+ interrupts = <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>; /* mbox irq top */
+ mbox-irqmax = <32>;
+ mbox-irqctlr = <0x14>;
+ mbox-irqclr = <0x8>;
+ mbox-nums = <T6D_MBOX_NUMS>;
+ mboxids = <T6D_MBOX_AO2REE>,
+ <T6D_MBOX_REE2AO>;
+ aocpu_sts_mboxid = <T6D_MBOX_AO2TEE>;
+ ree2aocpu_mboxid = <T6D_MBOX_REE2AO>;
+ #mbox-cells = <1>;
+ mbox-wr-same;
+ };
+
+ mbox_devfs {
+ status = "okay";
+ compatible = "amlogic, mbox-devfs";
+ mbox-nums = <1>;
+ mbox-names = "ree2aocpu";
+ mboxes = <&mbox_fifo T6D_REE2AO_DEV>;
+ mbox-dests = <MAILBOX_AOCPU>;
+ };
+
+ aml_hwspinlock: hwlock {
+ status = "okay";
+ compatible = "amlogic, hwspinlock";
+ syscon = <&aml_hwspinlock_regs 0 0x4>;
+ #hwlock-cells = <1>;
+ };
+
+ jtag {
+ compatible = "amlogic, jtag";
+ status = "okay";
+ select = "disable"; /* disable/jtag_a/jtag_b */
+ pinctrl-names="jtag_a_pins", "jtag_b_pins";
+ pinctrl-0=<&jtag_a_pins>;
+ pinctrl-1=<&jtag_b_pins>;
+ };
+
+ vbat: fixed@vbat {
+ compatible = "regulator-fixed";
+ regulator-name = "12V";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc5v_reg: fixed@vcc5v_reg {
+ vin-supply = <&vbat>;
+ compatible = "regulator-fixed";
+ regulator-name = "5V/VCC_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio GPIO_TEST_N GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <7000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_5v_reg: fixed@usb_5v_reg {
+ compatible = "regulator-fixed";
+ vin-supply = <&vcc5v_reg>;
+ regulator-name = "USB_5V/OTG_VCC5V,USBBC_PWR";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddq_reg: fixed@vddq_reg {
+ compatible = "regulator-fixed";
+ vin-supply = <&vbat>;
+ regulator-name = "VDDQ";
+ regulator-min-microvolt = <1220000>;
+ regulator-max-microvolt = <1220000>;
+ pinctrl-names = "default";
+ gpio = <&gpio GPIOD_4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <7000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddao3v3_reg: fixed@vddao3v3_reg {
+ vin-supply = <&vbat>;
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddcpu0: pwm_b-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm_b MESON_PWM_0 1500 0>;
+ regulator-name = "vddcpu0";
+ regulator-min-microvolt = <689000>;
+ regulator-max-microvolt = <1049000>;
+ regulator-always-on;
+ max-duty-cycle = <1500>;
+ amlogic,vsel-step = <3>;
+ amlogic,usleep-time = <200>;
+ /* Voltage Duty-Cycle */
+ voltage-table = <1049000 0>,
+ <1039000 3>,
+ <1029000 6>,
+ <1019000 9>,
+ <1009000 12>,
+ <999000 14>,
+ <989000 17>,
+ <979000 20>,
+ <969000 23>,
+ <959000 26>,
+ <949000 29>,
+ <939000 31>,
+ <929000 34>,
+ <919000 37>,
+ <909000 40>,
+ <899000 43>,
+ <889000 45>,
+ <879000 48>,
+ <869000 51>,
+ <859000 54>,
+ <849000 56>,
+ <839000 59>,
+ <829000 62>,
+ <819000 65>,
+ <809000 68>,
+ <799000 70>,
+ <789000 73>,
+ <779000 76>,
+ <769000 79>,
+ <759000 81>,
+ <749000 84>,
+ <739000 87>,
+ <729000 89>,
+ <719000 92>,
+ <709000 95>,
+ <699000 98>,
+ <689000 100>;
+ status = "okay";
+ };
+
+ saradc_common: saradc-common@fe026000 {
+ compatible = "amlogic,saradc-common";
+ reg = <0x0 0xfe026000 0x0 0x48>;
+
+ saradc: saradc {
+ compatible = "amlogic,meson-s7-saradc",
+ "amlogic,meson-saradc";
+ status = "disabled";
+ #io-channel-cells = <1>;
+ clocks = <&xtal>,
+ <&clkc CLKID_SYS_SARADC>,
+ <&clkc CLKID_SARADC>,
+ <&clkc CLKID_SARADC_SEL>;
+ clock-names = "clkin", "core", "adc_clk", "adc_sel";
+ interrupts = <GIC_SPI 181 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ pdd: pdd {
+ compatible = "amlogic,pdd";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ clock-names = "core";
+ clocks = <&clkc CLKID_SYS_SARADC>;
+ amlogic,interrupt = <182>;
+ amlogic,digital-maps = <0x2c 26>, <0x2c 25>, <0x2c 24>;
+ amlogic,analog-maps = <0x2c 9>, <0x2c 3>, <0x2c 1>;
+ amlogic,voltage-maps = <400>, <800>, <800>, <1200>;
+ status = "okay";
+ };
+ };
+
+ shmem@50f7e00 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x50f7e00 0x0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x50f7e00 0x100>;
+
+ scmi_shmem: shmem@0 {
+ compatible = "arm,scmi-shmem";
+ reg = <0x0 0x100>;
+ };
+ };
+
+ firmware {
+ scmi: scmi {
+ compatible = "arm,scmi-smc";
+ arm,smc-id = <0x820000C1>;
+ shmem = <&scmi_shmem>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ scmi_clk: protocol@14 {
+ reg = <0x14>;
+ #clock-cells = <1>;
+ };
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ apb4: apb4@fe000000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xfe000000 0x0 0x480000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
+
+ reset: reset-controller@2000 {
+ compatible = "amlogic,meson-t5m-reset";
+ reg = <0x0 0x2000 0x0 0x98>;
+ #reset-cells = <1>;
+ };
+
+ watchdog@2100 {
+ compatible = "amlogic,meson-sc2-wdt";
+ /* 0:userspace, 1:kernel */
+ amlogic,feed_watchdog_mode = <1>;
+ reg = <0x0 0x2100 0x0 0x10>;
+ clocks = <&xtal>;
+ };
+
+ clkc: clock-controller {
+ compatible = "amlogic,t6d-clkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x0 0x0 0x244>,
+ <0x0 0x8000 0x0 0xe0>;
+ reg-names = "basic", "pll";
+ clocks = <&xtal>;
+ clock-names = "xtal";
+ status = "okay";
+ };
+
+ meson_clk_msr@48000 {
+ compatible = "amlogic,meson-t6d-clk-measure";
+ reg = <0x0 0x48000 0x0 0x1c>;
+ status = "okay";
+ };
+
+ uart_B: serial@78400 {
+ compatible = "amlogic,meson-uart";
+ reg = <0x0 0x78400 0x0 0x18>;
+ interrupts = <0 169 1>;
+ status = "disabled";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ xtal_tick_en = <2>;
+ fifosize = < 64 >;
+ support-sysrq = <1>;
+ };
+
+ periphs_pinctrl: pinctrl@4000 {
+ compatible = "amlogic,meson-t6d-periphs-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio: bank@4000 {
+ reg = <0x0 0x4000 0x0 0x0058>,
+ <0x0 0x40c0 0x0 0x030c>;
+ reg-names = "mux", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&periphs_pinctrl 0 0 129>;
+ };
+ };
+
+ gpio_intc: interrupt-controller@4080 {
+ compatible = "amlogic,meson-t6d-gpio-intc",
+ "amlogic,meson-gpio-intc";
+ reg = <0x0 0x4080 0x0 0x20>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ amlogic,channel-interrupts =
+ <10 11 12 13 14 15 16 17 18 19 20 21>;
+ };
+
+ pinctrl_analog: pinctrl@43cc {
+ compatible = "amlogic,meson-t6d-analog-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio_analog: analog-bank@43cc {
+ reg = <0x0 0x43d4 0x0 0x0004>,
+ <0x0 0x43cc 0x0 0x0008>;
+ reg-names = "mux", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_analog 0 0 2>;
+ };
+ };
+
+ spicc0: spi@50000 {
+ compatible = "amlogic,meson-a4-spicc-v2";
+ reg = <0x0 0x50000 0x0 0x38>;
+ interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SYS_SPISG>,
+ <&clkc CLKID_SPICC0>;
+ clock-names = "sys", "spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spicc1: spi@50100 {
+ compatible = "amlogic,meson-a4-spicc-v2";
+ reg = <0x0 0x50100 0x0 0x38>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SYS_SPISG>,
+ <&clkc CLKID_SPICC1>;
+ clock-names = "sys", "spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ pwm_a: pwm@58000 {
+ compatible = "amlogic,meson-even-pwm";
+ reg = <0x0 0x58000 0x0 0x24>,
+ <0x0 0x180 0x0 0x4>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_A_SEL>;
+ clock-names = "clkin0";
+ status = "disabled";
+ };
+
+ pwm_b: pwm@58200 {
+ compatible = "amlogic,meson-pwm-tee";
+ reg = <0x0 0x58200 0x0 0x24>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_B>;
+ clock-names = "clkin0";
+ tee_id = <1>;
+ status = "okay";
+ };
+
+ pwm_c: pwm@58400 {
+ compatible = "amlogic,meson-even-pwm";
+ reg = <0x0 0x58400 0x0 0x24>,
+ <0x0 0x184 0x0 0x4>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_C_SEL>;
+ clock-names = "clkin0";
+ status = "disabled";
+ };
+
+ pwm_d: pwm@58600 {
+ compatible = "amlogic,meson-odd-pwm";
+ reg = <0x0 0x58600 0x0 0x24>,
+ <0x0 0x184 0x0 0x4>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_D_SEL>;
+ clock-names = "clkin0";
+ status = "disabled";
+ };
+
+ pwm_e: pwm@58800 {
+ compatible = "amlogic,meson-even-pwm";
+ reg = <0x0 0x58800 0x0 0x24>,
+ <0x0 0x188 0x0 0x4>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_E_SEL>;
+ clock-names = "clkin0";
+ status = "disabled";
+ };
+
+ pwm_f: pwm@58a00 {
+ compatible = "amlogic,meson-odd-pwm";
+ reg = <0x0 0x58a00 0x0 0x24>,
+ <0x0 0x188 0x0 0x4>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_F_SEL>;
+ clock-names = "clkin0";
+ status = "disabled";
+ };
+
+ pwm_g: pwm@58c00 {
+ compatible = "amlogic,meson-even-pwm";
+ reg = <0x0 0x58c00 0x0 0x24>,
+ <0x0 0x18c 0x0 0x4>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_G_SEL>;
+ clock-names = "clkin0";
+ status = "disabled";
+ };
+
+ pwm_h: pwm@58e00 {
+ compatible = "amlogic,meson-odd-pwm";
+ reg = <0x0 0x58e00 0x0 0x24>,
+ <0x0 0x18c 0x0 0x4>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_H_SEL>;
+ clock-names = "clkin0";
+ status = "disabled";
+ };
+
+ i2c0: i2c@66000 {
+ compatible = "amlogic,meson-i2c";
+ reg = <0x0 0x66000 0x0 0x28>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_SYS_I2C_M_WRAPPER>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@66400 {
+ compatible = "amlogic,meson-i2c";
+ reg = <0x0 0x66400 0x0 0x28>;
+ interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_SYS_I2C_M_WRAPPER>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@66800 {
+ compatible = "amlogic,meson-i2c";
+ reg = <0x0 0x66800 0x0 0x28>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_SYS_I2C_M_WRAPPER>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@66c00 {
+ compatible = "amlogic,meson-i2c";
+ reg = <0x0 0x66c00 0x0 0x28>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_SYS_I2C_M_WRAPPER>;
+ status = "disabled";
+ };
+
+ dcon_led: dcon_led@0x74000 {
+ compatible = "amlogic,led_unipolar_ctrl";
+ reg = <0x0 0x74000 0x0 0x88>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>;
+ led-mode = <LED_MESON_RGB>;
+ led_number = <2>;
+ status = "disabled";
+ };
+
+ ir: ir@fe084000 {
+ compatible = "amlogic, meson-ir";
+ reg = <0x0 0x84080 0x0 0xA4>,
+ <0x0 0x84000 0x0 0x58>;
+ status = "disabled";
+ protocol = <REMOTE_TYPE_NEC>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+ map = <&custom_maps>;
+ max_frame_time = <200>;
+ };
+
+ ir1: ir1@fe084180 {
+ compatible = "amlogic, meson-ir";
+ reg = <0x0 0x84200 0x0 0xA4>,
+ <0x0 0x84180 0x0 0x58>;
+ status = "disabled";
+ protocol = <REMOTE_TYPE_NEC>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
+ map = <&custom_maps>;
+ max_frame_time = <200>;
+ };
+
+ irblaster: meson-irblaster@fe08410c {
+ compatible = "amlogic, meson_irblaster";
+ status = "disabled";
+ reg = <0x0 0x8410c 0x0 0x10>;
+ #irblaster-cells = <2>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ eth_phy: mdio-multiplexer@380000 {
+ compatible = "amlogic,g12a-mdio-mux";
+ reg = <0x0 0x380000 0x0 0xa4>;
+
+ clocks = <&clkc CLKID_SYS_ETHPHY>,
+ <&xtal>,
+ <&clkc CLKID_MPLL_50M>;
+ clock-names = "pclk", "clkin0", "clkin1";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enet_type = <5>;
+ phy_pll_mode = <2>;
+ phy_mode = <7>;
+ tx_amp_src = <0xFE010330>;
+
+ ext_mdio: mdio@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ int_mdio: mdio@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ internal_ephy: ethernet_phy@8 {
+ compatible = "ethernet-phy-id0180.3301",
+ "ethernet-phy-ieee802.3-c22";
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <8>;
+ max-speed = <100>;
+ };
+ };
+ };
+
+ aml_hwspinlock_regs: syscon@e2c0 {
+ compatible = "syscon";
+ reg = <0x0 0xe2c0 0x0 0x20>;
+ status = "okay";
+ };
+ };
+
+ ethmac: ethernet@388000 {
+ compatible = "amlogic,meson-axg-dwmac",
+ "snps,dwmac-4.00";
+ reg = <0x0 0xfe388000 0x0 0x12ec>,
+ <0x0 0xfe384000 0x0 0x8>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&clkc CLKID_SYS_ETHPHY>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_MPLL_50M>;
+ clock-names = "stmmaceth", "clkin0", "clkin1";
+ rx-fifo-depth = <4096>;
+ tx-fifo-depth = <2048>;
+ /*1:inphy; 2:exphy;*/
+ internal_phy = <1>;
+ analog_version = <1>;
+ mboxes = <&mbox_fifo T6D_REE2AO_ETH>;
+
+ mdio0: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ };
+ };
+
+ uart_A: serial@fe078000 {
+ compatible = "amlogic,meson-uart";
+ reg = <0x0 0xfe078000 0x0 0x18>;
+ interrupts = <0 168 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_SYS_UART_WRAPPER>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ xtal_tick_en = <2>;
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins1>;
+ };
+
+ uart_C: serial@fe078800 {
+ compatible = "amlogic,meson-uart";
+ reg = <0x0 0xfe078800 0x0 0x18>;
+ interrupts = <0 170 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_SYS_UART_WRAPPER>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ xtal_tick_en = <2>;
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins1>;
+ };
+
+ mtd_nand: nfc@fe08d000 {
+ compatible = "amlogic,meson-nfc-single-ecc-bl2ex";
+ status = "disabled";
+ reg = <0x0 0xfe08d000 0x0 0x200>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_EDGE_RISING>;
+ /* share gate of sysclk with EMMC_C */
+ clocks = <&clkc CLKID_SYS_SD_EMMC_C>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "gate", "fdiv2pll";
+ nand_clk_ctrl = <0xfe08c000>;
+ spi_cfg = <0xfe08d040>;
+ };
+
+ spi_nfc: spi@fe08d000 {
+ compatible = "amlogic,spi-nfc";
+ status = "disabled";
+ reg = <0x0 0xfe08d000 0x0 0x200>,
+ <0xfe08c000 0xc>,
+ <0xfe010180 0x4>;
+ clocks = <&clkc CLKID_SYS_SD_EMMC_C>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "gate", "fdiv2pll";
+ nand_clk_ctrl = <0xfe08c000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ sd_emmc_c: mmc@fe08c000 {
+ compatible = "amlogic,meson-v8-mmc";
+ reg = <0x0 0xfe08c000 0x0 0x1000>,
+ <0x0 0xfe000168 0x0 0x4>,
+ <0x0 0xfe004000 0x0 0x4>;
+ interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ clocks = <&clkc CLKID_SYS_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_SEL>,
+ <&clkc CLKID_SD_EMMC_C>,
+ <&xtal>,
+ <&clkc CLKID_GP0_PLL>,
+ <&clkc CLKID_GP0_PLL>;
+ clock-names = "core", "mux0", "mux1",
+ "clkin0", "clkin1", "clkin2";
+
+ card_type = <1>;
+ src_clk_rate = <1152000000>;
+ mmc_debug_flag;
+ ignore_desc_busy;
+ tx_delay = <15>;
+ cap-mmc-crypto;
+ no-sd;
+ no-sdio;
+ resets = <&reset RESET_SD_EMMC_C>;
+ };
+
+ video_composer {
+ compatible = "amlogic, video_composer";
+ dev_name = "video_composer";
+ status = "okay";
+ };
+
+ di_process {
+ compatible = "amlogic, di_process";
+ dev_name = "di_process";
+ status = "okay";
+ };
+
+ vpu: vpu {
+ compatible = "amlogic, vpu-t6d";
+ status = "okay";
+ reg = <0x0 0xfe000000 0x0 0x100 /* clk */
+ 0x0 0xfe00c000 0x0 0x70 /* pwrctrl */
+ 0x0 0xff800000 0x0 0xf000>; /* vcbus */
+ clocks = <&clkc CLKID_VAPB_0>,
+ <&clkc CLKID_VAPB_1>,
+ <&clkc CLKID_VAPB>,
+ <&clkc CLKID_VPU_0>,
+ <&clkc CLKID_VPU_1>,
+ <&clkc CLKID_VPU>;
+ clock-names = "vapb_clk0",
+ "vapb_clk1",
+ "vapb_clk",
+ "vpu_clk0",
+ "vpu_clk1",
+ "vpu_clk";
+ clk_level = <6>;
+ /* 0: 24.0M 1: 100.0M 2: 166.7M 3: 200.0M 4: 250.0M */
+ /* 5: 333.3M 6: 400.0M 7: 500.0M 8: 666.7M */
+ };
+
+ /*if you want to use vdin just modify status to "ok"*/
+ vdin0: vdin0 {/*common define*/
+ status = "okay";
+ compatible = "amlogic, vdin-t6d";
+ dev_name = "vdin0";
+ /*status = "disabled";*/
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ reserve-iomap = "true";
+ flag_cma = <0x10101>;/*1:share with codec_mm;2:cma alone*/
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ * onebuffer:
+ * worst case:(4096*2160*3 + 2M(afbce issue)) = 27.5M
+ * dw:960x540x3 = 1.5M
+ * total size:(27.5+1.5)x buffernumber
+ */
+ /*cma_size = <174>;*/
+ /*frame_buff_num = <6>;*/
+ interrupts = <0 210 1 /* vdin0 vsync */
+ /*0 214 1*/ /* vdin1 write down*/
+ /*0 206 1*/ /* vpu crash */
+ /*0 213 1*/>; /* vdin0 write down*/
+ interrupt-names = "vsync_int"
+ /*"mif2_meta_wr_done_int"*/
+ /*"vpu_crash_int",*/
+ /*"write_done_int"*/;
+ rdma-irq = <2>;
+ clocks = <&clkc CLKID_FCLK_DIV5>, <&clkc CLKID_VDIN_MEAS>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <0>;
+ /*vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ * bit4:support yuv422 10bit full pack mode (from txl new add)
+ * bit5:force yuv422 to yuv444 malloc (for vdin0 debug)
+ * bit8:use 8bit at 4k_50/60hz_10bit
+ * bit9:use 10bit at 4k_50/60hz_10bit
+ * bit10: support 10bit when double write
+ */
+ tv_bit_mode = <0x235>;
+ /* afbce_bit_mode: (amlogic frame buff compression encoder)
+ * bit0 -- enable afbce
+ * bit1 -- enable afbce compression-lossy
+ * bit4 -- afbce for 4k
+ * bit5 -- afbce for 1080p
+ * bit6 -- afbce for 720p
+ * bit7 -- afbce for smaller resolution
+ */
+ afbce_bit_mode = <0x0>;
+ chk_wr_done_en;
+ /* urgent_en; */
+ double_write_en;
+ vdin_function_sel = <0x20000>;
+ /* vdin v4l2 */
+ v4l_support_en = <0>;
+ v4l_vd_num = <70>;
+ /* v4l2 capability */
+ driver = "vdinvideo";
+ card = "mesont3";
+ bus_info = "vdin0 v4l2";
+ version = <0x20220120>;
+ /* fe_ports refer to tvin.h */
+ fe_ports = <0x00001001 /* CVBS1 */
+ 0x00004000 /* HDMI0 */
+ 0x00004001 /* HDMI1 */
+ 0x00004002>; /* HDMI2 */
+ /* vdin v4l2 end */
+ };
+
+ vdin1: vdin1 {/*common define*/
+ status = "okay";
+ compatible = "amlogic, vdin-t6d";
+ dev_name = "vdin1";
+ /*status = "disabled";*/
+ reserve-iomap = "true";
+ /*memory-region = <&vdin1_cma_reserved>;*/
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 212 1>;
+ interrupt-names = "vsync_int"/*, "vpu_crash_int",*/
+ /*"write_done_int"*/;
+ rdma-irq = <4>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <1>;
+ tv_bit_mode = <0x15>;
+ /* vdin v4l2 */
+ v4l_support_en = <0>;
+ v4l_vd_num = <71>;
+ /* v4l2 capability */
+ driver = "vdinvideo";
+ card = "mesont3";
+ bus_info = "vdin1 v4l2";
+ version = <0x20220120>;
+ /* fe_ports refer to tvin.h */
+ fe_ports = <0x0000a002 /* WB0_VD1 */
+ 0x0000a003 /* WB0_VD2 */
+ 0x0000a004 /* WB0_OSD1 */
+ 0x0000a005 /* WB0_OSD2 */
+ 0x0000a006 /* WB0_VPP */
+ 0x0000a007 /* WB0_VDIN_BIST */
+ 0x0000a008>; /* WB0_POST_BLEND */
+ /* vdin v4l2 end */
+ };
+ };
+
+ aml_bt: aml_bt {
+ compatible = "amlogic, aml-bt";
+ status = "disabled";
+ };
+
+ aml_wifi: aml_wifi {
+ compatible = "amlogic, aml-wifi";
+ status = "disabled";
+ irq_trigger_type = "GPIO_IRQ_LOW";
+ //dhd_static_buf;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ // pwms = <&pwm_ef 0 30550 0>;
+ duty-cycle = <15270>;
+ times = <8>;
+ };
+ pwm_channel2_conf {
+ // pwms = <&pwm_ef 2 30500 0>;
+ duty-cycle = <15250>;
+ times = <12>;
+ };
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-t6d";
+ dev_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "T6D"; /* Max Chars: 16 */
+ cec_osd_string = "AML_TV"; /* Max Chars: 14 */
+ cec_version = <5>;/*5:1.4;6:2.0*/
+ port_num = <4>;
+ output = <0>;
+ cec_sel = <1>;/*1:use one ip, 2:use 2 ip*/
+ ee_cec; /*use cec a or b*/
+ arc_port_mask = <0x1>;
+ interrupts = <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>;/*0:snps*/
+ interrupt-names = "hdmi_aocecb";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&cec_b>;
+ pinctrl-1=<&cec_b>;
+ pinctrl-2=<&cec_b>;
+ clocks = <&clkc CLKID_CECB_32K_CLKOUT>;
+ clock-names = "cecb_clk";
+ reg = <0x0 0xfe044000 0x0 0x2000
+ 0x0 0xfe010000 0x0 0x2000
+ 0x0 0xfe000000 0x0 0x2000
+ 0x0 0xfe004000 0x0 0x2000>;
+ reg-names = "ao","periphs","clock","pad_reg";
+ mbox-names = "mbox_cec";
+ mboxes = <&mbox_fifo T6D_REE2AO_AOCEC>;
+ };
+
+ aml_dma {
+ compatible = "amlogic,aml_p1_dma";
+ reg = <0x0 0xfe440400 0x0 0x48>;
+ interrupts = <0 24 1>;
+ status = "okay";
+
+ aml_aes {
+ compatible = "amlogic,aes_g12a_dma";
+ dev_name = "aml_aes_dma";
+ iv_swap = /bits/ 8 <0x0>;
+ status = "okay";
+ };
+
+ aml_sha {
+ compatible = "amlogic,sha_dma";
+ dev_name = "aml_sha_dma";
+ status = "okay";
+ };
+
+ aml_tdes {
+ compatible = "amlogic,des_dma,tdes_dma";
+ dev_name = "aml_tdes_dma";
+ status = "okay";
+ };
+
+ crypto {
+ compatible = "amlogic,crypto_sc2";
+ dev_name = "aml_crypto_dev";
+ status = "okay";
+ thread = /bits/ 8 <0x5>;
+ interrupts = <0 29 1>;
+ };
+ };
+
+ rng {
+ compatible = "amlogic,meson-rng";
+ status = "disabled"; /* disabled as default */
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0x0 0xfe440788 0x0 0x0c>;
+ quality = /bits/ 16 <1000>;
+ version = <2>;
+ };
+
+ vclk_serve: vclk_serve {
+ compatible = "amlogic, vclk_serve";
+ status = "okay";
+ reg = <0x0 0xfe008000 0x0 0x400 /* ana reg */
+ 0x0 0xfe000000 0x0 0x4a0>; /* clk reg */
+ };
+
+ vout_mux: vout_mux {
+ compatible = "amlogic, vout_mux-t6d";
+ status = "okay";
+ clocks = <&clkc CLKID_FCLK_DIV5>, <&clkc CLKID_VDIN_MEAS>;
+ clock-names = "fclk_div5", "vdin_meas_clk";
+ };
+
+ vout: vout {
+ compatible = "amlogic, vout";
+ status = "okay";
+ interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "vsync";
+ vs_meas=<0>;
+ };
+
+ vdac: vdac {
+ compatible = "amlogic, vdac-t6d";
+ status = "okay";
+ cdac_disable = <0>;
+ };
+
+ adc: adc {
+ compatible = "amlogic, adc-t6d";
+ status = "okay";
+ reg = <0x0 0xfe072000 0x0 0x2000/* afe reg base */
+ 0x0 0xfe008000 0x0 0x2000/* hiu base */
+ >;
+ };
+
+ vout2: vout2 {
+ compatible = "amlogic, vout2";
+ status = "okay";
+ };
+
+ dummy_venc: dummy_venc {
+ compatible = "amlogic, dummy_venc_t6d";
+ status = "okay";
+ dummy_venc_type = <1>; /* 0 dummyl，1 dummyp，2 dummyi */
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ dummyp_to_drm: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <0>;
+ };
+ };
+ };
+ };
+
+ canvas: canvas {
+ compatible = "amlogic, meson, canvas";
+ status = "okay";
+ reg = <0x0 0xfe036048 0x0 0x2000>;
+ };
+
+ meson_uvm {
+ compatible = "amlogic, meson_uvm";
+ status = "okay";
+ };
+
+ meson_videotunnel{
+ compatible = "amlogic, meson_videotunnel";
+ status = "okay";
+ };
+
+ rdma {
+ compatible = "amlogic, meson-t3, rdma";
+ status = "okay";
+ interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "rdma";
+ /* after sc2 */
+ reset-names = "rdma";
+ resets = <&reset RESET_RDMA>;
+ rdma_table_page_count = <16>;
+ };
+
+ codec_io: codec_io {
+ compatible = "amlogic, meson-t6d, codec-io";
+ status = "okay";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ reg = <0x0 0xfe002000 0x0 0x2000>,
+ <0x0 0xfe320000 0x0 0x10000>,
+ <0x0 0x0 0x0 0x0>,
+ <0x0 0x0 0x0 0x00>,
+ <0x0 0xff800000 0x0 0x40000>,
+ <0x0 0xfe036000 0x0 0x2000>,
+ <0x0 0x0 0x0 0x0>,
+ <0x0 0xfe0a8000 0x0 0x2000>;
+ reg-names = "cbus",
+ "dosbus",
+ "hiubus",
+ "aobus",
+ "vcbus",
+ "dmcbus",
+ "efusebus",
+ "nocbus";
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-t6d";
+ status = "okay";
+ interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB>,
+ <&clkc CLKID_SYS_GE2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0x0 0xff840000 0x0 0x100>;
+ power-domains = <&pwrdm PDID_T6D_GE2D>;
+ };
+
+ amlvecm: amlvecm {
+ compatible = "amlogic, vecm-t5m";
+ status = "disabled";
+ dev_name = "aml_vecm";
+ clocks = <&clkc CLKID_VID_LOCK>;
+ clock-names = "cts_vid_lock_clk";
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec-pm-pd";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 91 1
+ 0 92 1
+ 0 93 1
+ 0 72 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2",
+ "parser_b";
+ power-domains = <&pwrdm PDID_T6D_DOS_HEVC>,
+ <&pwrdm PDID_T6D_DOS_HEVC>;
+ power-domain-names = "pwrc-hevc",
+ "pwrc-dummy";
+ };
+
+ vcodec_dec {
+ compatible = "amlogic, vcodec-dec";
+ dev_name = "aml-vcodec-dec";
+ status = "okay";
+ };
+
+ vcodec_dos_dev: vcodec_dos_dev {
+ compatible = "amlogic, cpu-major-id-t6d";
+ dev_name = "vcodec_dos_dev";
+ status = "okay";
+ reg = <0x0 0xfe320000 0x0 0x10000>,
+ <0x0 0xfe036000 0x0 0x2000>;
+ reg-names = "dosbus",
+ "dmcbus";
+ clocks = <&clkc CLKID_SYS_DOS
+ &clkc CLKID_HEVCB>;
+ clock-names = "vdec",
+ "clk_hevc_mux";
+ assigned-clock-parents = <&clkc CLKID_HEVCB_0>;
+ assigned-clocks = <&clkc CLKID_HEVCB>;
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom-t6d";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "vsync";
+ };
+
+ vpu_security {
+ compatible = "amlogic, meson-t6d, vpu_security";
+ status = "okay";
+ interrupts = <GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "vpu_security";
+ };
+
+ multi-di {
+ compatible = "amlogic, dim-t6d";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <4>; //<1>;
+ //memory-region = <&di_reserved>;
+ //memory-region = <&di_cma_reserved>;
+ interrupts = <0 203 1
+ 0 202 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_CLKB>,
+ <&clkc CLKID_VPU>;
+ clock-names = "vpu_clkb",
+ "vpu_mux";
+ clock-range = <334 400>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <0>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ en_4k = <0>;
+ keep_dec_vf = <0>;
+ po_fmt = <0>;
+ post_nub = <11>;
+ alloc_sct = <0>;
+ hf = <0>;
+ dct = <0>;
+ sub_v = <0>;//sub version
+ afbce_loss_en = <0>;//t5w loss mode enable for DI output
+ prelink_en = <1>;
+ ponly_mode = <1>;
+ t5db_afbcd_en = <1>;
+ postlink_en = <1>;
+ /***************************************************
+ * t5w t3 support 4k ,same with t7 ,no canvas,
+ * post_nub---default is 11
+ * (T7/T3/SC2/S4 new path)
+ * post 11*5222400 = 56M,local 7*4075520 = 28m
+ * flag_cma---0: use reserved; 1:use cma;
+ * 2:use cma as reserved 4:use codec mem
+ * en_4k :en_4k---0: not support 4K; 1: enable 4K
+ * 2: dynamic: vdin: 4k enable,
+ * other source 4k disable
+ * 8: when 4k,
+ * output with a resolution is below 1080p
+ * keep_dec_vf---0:not keep; 1: keep dec vf for p;
+ * 2: dynamic keep dec vf for p,other is disable
+ * po_fmt---1: NV21/8; 2: nv12/8; 3: AFBC 422/10BIT;
+ * 4: dynamic(4K AFBC,10/422);
+ * 6: dynamic(from decoder 4K source,
+ * out is AFBC,10/420),
+ * other is 422/10BIT
+ * bypass_mem---0:nr not bypass; 1: nr bypass;
+ * 2: when 4k input ,nr is bypass;
+ * 3: bypass nr for 4k,but not from vdin;
+ * alloc_sct---0:not support; bit 0: for 4k; bit 1: for 1080p
+ * hf---0:not enable; 1: enable
+ * dct---0:not enable; 1: enable 1 ch; 2: enable 2 ch
+ * sub_v---0:major; 1: sub
+ * afbce_loss_en---1:check the loss flag in vf and set for di,0:disable
+ ***************************************************/
+ };
+
+ cpu_tsensor: cpu_tsensor@fe022000 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0x0 0xfe022000 0x0 0x50>;
+ tsensor_id = <1>;
+ cal_type = <0x11>;
+ cal_coeff = <296 396 2757 8526>;
+ rtemp = <120000>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_TS_CLK>;
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ reset-names = "ts_rst";
+ resets = <&reset RESET_TS_CPU>;
+ };
+
+ top_tsensor: top_tsensor@fe01c000 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0x0 0xfe01c000 0x0 0x50>;
+ tsensor_id = <2>;
+ cal_type = <0x11>;
+ cal_coeff = <296 396 2757 8526>;
+ rtemp = <120000>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_TS_CLK>;
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ reset-names = "ts_rst";
+ resets = <&reset RESET_TS_TOP>;
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "okay";
+ compatible = "amlogic, meson-cooldev";
+ cooling_devices {
+ cpucore_cool_cluster0 {
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ dyn_coeff = <358>;
+ node_name = "bifrost";
+ device_type = "gpufreq";
+ };
+ ddr0_cool {
+ ddr_reg = <0xfe0364b4 0xfe0365b4>;
+ ddr_status = <13>;
+ ddr_bits = <0 15>,<0 15>;
+ ddr_data = <6232 6232 4985 3895 3116 2492 1947 1780
+ 1558 1246 1038 890 779>;
+ gpu_data = <3116 3116 2492 1947 1558 1246 973 890
+ 779 623 519 445 389>;
+ node_name = "ddr_cool0";
+ device_type = "ddr";
+ };
+ };
+
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>;
+ };
+ ddr_cool0:ddr_cool0 {
+ #cooling-cells = <2>;
+ };
+ };/*meson cooling devices end*/
+
+ thermal_zones: thermal-zones {
+ soc_thermal: soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <5160>;
+ thermal-sensors = <&cpu_tsensor 0>;
+ trips {
+ cpu_switch_on: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ cpu_control: trip-point@1 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ cpu_hot: trip-point@2 {
+ temperature = <55000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ cpu_critical: trip-point@3 {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&cpu_control>;
+ cooling-device = <&CPU0 0 8>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&cpu_control>;
+ cooling-device = <&gpu 0 3>;
+ contribution = <1024>;
+ };
+ ddr0_cooling_map {
+ trip = <&cpu_hot>;
+ cooling-device = <&ddr_cool0 0 THERMAL_NO_LIMIT>;
+ contribution = <1024>;
+ };
+ };
+ };
+
+ top_thermal: top_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <960>;
+ thermal-sensors = <&top_tsensor 1>;
+ trips {
+ top_switch_on: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ top_control: trip-point@1 {
+ temperature = <105000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ top_critical: trip-point@2 {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ };/*thermal zone end*/
+
+ usb_phy20: usbphy20@fe488000 {
+ compatible = "amlogic, amlogic-crg-drd-usb2-v1";
+ status = "disable";
+ reg = <0x0 0xfe488000 0x0 0x100 /* phy_base */
+ 0x0 0xfe002000 0x0 0x100 /* reset_base */
+ 0x0 0xfe48c000 0x0 0x60>; /* phy_cfg_bases */
+ pll-setting-5 = <0x7>;
+ phy0-reset-level-bit = <6>;
+ phy0-reg-reset-level-bit = <0>;
+ usb-reset-bit = <1>;
+ reset-level = <0x40>;
+ clocks = <&clkc CLKID_SYS_USB_U2DRD>,
+ <&clkc CLKID_USB2_48M_PRE>,
+ <&clkc CLKID_USB2_48M_CLK>;
+ clock-names = "crg_general",
+ "clk_soc_u2drd_48m_pre",
+ "clk_soc_u2drd_48m";
+ /* 48m soc-digital cfg. */
+ assigned-clocks = <&clkc CLKID_USB2_48M_CLK>;
+ assigned-clock-parents = <&clkc CLKID_USB2_48M_PRE>;
+ /* 48m soc-analog cfg. */
+ //assigned-clocks = <&clkc CLKID_USB2_48M_CLK_TMP_SEL>,
+ // <&clkc CLKID_USB2_48M_CLK>;
+ //assigned-clock-parents = <&clkc CLKID_USB_PLL>,
+ // <&clkc CLKID_USB2_48M_CLK_TMP>;
+ phy-id = <0>;
+ usb-phy-trim-reg = <0xfe010330>;
+ pm-controller;
+ };
+
+ usb_phy30: usbphy30@fe488100 {
+ compatible = "amlogic, amlogic-usb3-phy";
+ portnum = <0>;
+ status = "disable";
+ };
+
+ usb_phy22: usbphy22@fe4a8000 {
+ compatible = "amlogic, amlogic-crg-drd-usb2-v1";
+ reg = <0x0 0xfe4a8000 0x0 0x100 /* phy_base */
+ 0x0 0xfe002000 0x0 0x100 /* reset_base */
+ 0x0 0xfe4ac000 0x0 0x60>; /* phy_cfg_bases */
+ pll-setting-5 = <0x7>;
+ phy0-reset-level-bit = <8>;
+ phy0-reg-reset-level-bit = <4>;
+ usb-reset-bit = <5>;
+ reset-level = <0x40>;
+ clocks = <&clkc CLKID_SYS_USB_U22H>,
+ <&clkc CLKID_USB2_48M_PRE>,
+ <&clkc CLKID_USB2_48M_CLK>;
+ clock-names = "crg_general",
+ "clk_soc_u2drd_48m_pre",
+ "clk_soc_u2drd_48m";
+ /* 48m soc-digital cfg. */
+ assigned-clocks = <&clkc CLKID_USB2_48M_CLK>;
+ assigned-clock-parents = <&clkc CLKID_USB2_48M_PRE>;
+ /* 48m soc-analog cfg. */
+ //assigned-clocks = <&clkc CLKID_USB2_48M_CLK_TMP_SEL>,
+ // <&clkc CLKID_USB2_48M_CLK>;
+ //assigned-clock-parents = <&clkc CLKID_USB_PLL>,
+ // <&clkc CLKID_USB2_48M_CLK_TMP>;
+ phy-id = <2>;
+ usb-phy-trim-reg = <0xfe010330>;
+ status = "disable";
+ pm-controller;
+ };
+
+ usb_phy32: usbphy32@fe4a8000 {
+ compatible = "amlogic, amlogic-usb3-phy";
+ portnum = <0>;
+ status = "disable";
+ };
+
+ usb_phy21: usbphy21@fe498000 {
+ compatible = "amlogic, amlogic-crg-drd-usb2-v1";
+ status = "disable";
+ reg = <0x0 0xfe498000 0x0 0x100 /* phy_base */
+ 0x0 0xfe002000 0x0 0x100 /* reset_base */
+ 0x0 0xfe49c000 0x0 0x60>; /* phy_cfg_bases */
+ pll-setting-5 = <0x7>;
+ phy0-reset-level-bit = <7>;
+ phy0-reg-reset-level-bit = <2>;
+ usb-reset-bit = <3>;
+ reset-level = <0x40>;
+ clocks = <&clkc CLKID_SYS_USB_U2H>;
+ clock-names = "crg_general";
+ phy-id = <1>;
+ usb-phy-trim-reg = <0xfe010330>;
+ pm-controller;
+ };
+
+ usb_phy31: usbphy31@fe498100 {
+ compatible = "amlogic, amlogic-usb3-phy";
+ portnum = <0>;
+ status = "disable";
+ };
+
+ crg20_otg: crgotg20@fe488000 {
+ compatible = "amlogic, amlogic-crg-otg";
+ status = "disabled";
+ usb2-phy-reg = <0xfe488000>;
+ usb2-phy-reg-size = <0x100>;
+ usb3-phy-reg = <0xfe488100>;
+ usb3-phy-reg-size = <0x20>;
+ interrupts = <0 130 IRQ_TYPE_EDGE_RISING>;
+ udc-name = "fe480000.crgudc";
+ };
+
+ crg20_drd: crg20@fe480000 {
+ compatible = "amlogic, crg-drd";
+ status = "disabled";
+ reg = <0x0 0xfe480000 0x0 0x8000>;
+ interrupts = <0 131 IRQ_TYPE_EDGE_RISING>;
+ usb-phy = <&usb_phy20>, <&usb_phy30>;
+ clocks = <&clkc CLKID_SYS_USB_U2DRD>;
+ clock-names = "crg_general";
+ rd-outstanding-tune = <0x8>;
+ in-nak-rty = <0x5>;
+ };
+
+ crg20_udc: crgudc20@fe480000 {
+ compatible = "amlogic, crg_udc";
+ status = "disable";
+ controller-type = <1>; /* 1: aml phy 4: m31 phy */
+ reg = <0x0 0xfe480000 0x0 0x8000>;
+ interrupts = <0 131 IRQ_TYPE_EDGE_RISING>;
+ port-speed = <3>; /* 0~3: unknown, low, full, high */
+ phy-reg = <0xfe488000>; /* phy2 base */
+ phy-reg-size = <0x10>;
+ clocks = <&clkc CLKID_SYS_USB_U2DRD>;
+ clock-names = "usb_general";
+ phy-id = <0>;
+ version = <1>; /* forbid vbus detect */
+ suspend-scheme = <0x1>;
+ };
+
+ crg22_host: crg22@fe4a0000 {
+ compatible = "amlogic, crg-host-drd";
+ status = "disabled";
+ reg = <0x0 0xfe4a0000 0x0 0x8000>;
+ interrupts = <0 55 IRQ_TYPE_EDGE_RISING>;
+ usb-phy = <&usb_phy22>, <&usb_phy32>;
+ clocks = <&clkc CLKID_SYS_USB_U22H>;
+ clock-names = "crg_general";
+ rd-outstanding-tune = <0x8>;
+ in-nak-rty = <0x5>;
+ };
+
+ crg21_host: crg21@fe490000 {
+ compatible = "amlogic, crg-host-drd";
+ status = "disabled";
+ reg = <0x0 0xfe490000 0x0 0x8000>;
+ interrupts = <0 79 IRQ_TYPE_EDGE_RISING>;
+ usb-phy = <&usb_phy21>, <&usb_phy31>;
+ clocks = <&clkc CLKID_SYS_USB_U2H>;
+ clock-names = "crg_general";
+ rd-outstanding-tune = <0x8>;
+ in-nak-rty = <0x5>;
+ };
+
+ cpu_info {
+ compatible = "amlogic, cpuinfo";
+ cpuinfo_cmd = <0x82000044>;
+ };
+
+ lut_dma:lut_dma {
+ compatible = "amlogic, meson-t7, lut_dma";
+ status = "okay";
+ };
+
+ efusecheck: efusecheck{
+ maincmd = <0x8200003E>;
+ checknum = <3>;
+ check0 = <&check_0>;
+ check1 = <&check_1>;
+ check2 = <&check_2>;
+ check_0:check_0{
+ checkname = "dgpk1";
+ subcmd = <0x1000>;
+ };
+ check_1:check_1{
+ checkname = "dgpk2";
+ subcmd = <0x1001>;
+ };
+ check_2:check_2{
+ checkname = "aud_id";
+ subcmd = <0x1002>;
+ };
+ };
+
+ efuse: efuse{
+ compatible = "amlogic, efuse";
+ reg = <0x0 0xfe440040 0x0 0x4>;
+ secureboot_mask = <0x00000c00>;
+ read_cmd = <0x82000030>;
+ write_cmd = <0x82000031>;
+ get_max_cmd = <0x82000033>;
+ mem_in_base_cmd = <0x82000020>;
+ mem_out_base_cmd = <0x82000021>;
+ efuse_pattern_size = <0x600>;
+ efuse_obj_cmd_status = <0x1>;
+ efuse_cali_item_read = <0x1>;
+ key = <&efusekey>;
+ check = <&efusecheck>;
+ clock-names = "efuse_clk";
+ status = "okay";
+ };
+
+ efusekey:efusekey{
+ keynum = <4>;
+ key0 = <&key_0>;
+ key1 = <&key_1>;
+ key2 = <&key_2>;
+ key3 = <&key_3>;
+ key_0:key_0{
+ keyname = "mac";
+ offset = <0>;
+ size = <6>;
+ };
+ key_1:key_1{
+ keyname = "mac_bt";
+ offset = <6>;
+ size = <6>;
+ };
+ key_2:key_2{
+ keyname = "mac_wifi";
+ offset = <12>;
+ size = <6>;
+ };
+ key_3:key_3{
+ keyname = "usid";
+ offset = <18>;
+ size = <16>;
+ };
+ };
+
+ state_led: state_led {
+ compatible = "amlogic,state-led-aocpu";
+ mboxes = <&mbox_fifo T6D_REE2AO_LED>;
+ status = "disabled";
+ };
+
+ chosen {
+ kaslr-seed = <0x0 0x0>;
+ bootargs = "usbcore.autosuspend=-1";
+ };
+};
+
+&periphs_pinctrl {
+ emmc_pins: emmc {
+ mux-0 {
+ groups = "emmc_d0",
+ "emmc_d1",
+ "emmc_d2",
+ "emmc_d3",
+ "emmc_d4",
+ "emmc_d5",
+ "emmc_d6",
+ "emmc_d7",
+ "emmc_cmd";
+ function = "emmc";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+
+ mux-1 {
+ groups = "emmc_clk";
+ function = "emmc";
+ bias-disable;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ emmc_ds_pins: emmc-ds {
+ mux {
+ groups = "emmc_ds";
+ function = "emmc";
+ bias-pull-down;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ emmc_clk_gate_pins: emmc_clk_gate {
+ mux {
+ groups = "GPIOB_8";
+ function = "gpio_periphs";
+ bias-pull-down;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ /* sdemmc portB */
+ sd_clk_cmd_pins:sd_clk_cmd_pins {
+ mux {
+ groups = "sdcard_cmd_c";
+ function = "sdcard";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ mux1 {
+ groups = "sdcard_clk_c";
+ function = "sdcard";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ sd_all_pins:sd_all_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_d1_c",
+ "sdcard_d2_c",
+ "sdcard_d3_c",
+ "sdcard_cmd_c";
+ function = "sdcard";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ mux1 {
+ groups = "sdcard_clk_c";
+ function = "sdcard";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ sd_clk_gate_pins: sd_clk_gate {
+ mux {
+ groups = "GPIOC_4";
+ function = "gpio_periphs";
+ bias-pull-down;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ sd_all_pd_pins:sd_all_pd_pins {
+ mux {
+ groups = "GPIOC_0",
+ "GPIOC_1",
+ "GPIOC_2",
+ "GPIOC_3",
+ "GPIOC_4",
+ "GPIOC_5";
+ function = "gpio_periphs";
+ bias-pull-down;
+ output-low;
+ };
+ };
+
+ sd_1bit_pins:sd_1bit_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_cmd_c";
+ function = "sdcard";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ mux1 {
+ groups = "sdcard_clk_c";
+ function = "sdcard";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ hdmirx_a_mux:hdmirx_a_mux {
+ mux {
+ groups = "hdmirx_hpd_a",
+ "hdmirx_5vdet_a",
+ "hdmirx_sda_a",
+ "hdmirx_scl_a";
+ function = "hdmirx";
+ };
+ };
+
+ hdmirx_b_mux:hdmirx_b_mux {
+ mux {
+ groups = "hdmirx_hpd_b",
+ "hdmirx_5vdet_b",
+ "hdmirx_sda_b",
+ "hdmirx_scl_b";
+ function = "hdmirx";
+ };
+ };
+
+ hdmirx_c_mux:hdmirx_c_mux {
+ mux {
+ groups = "hdmirx_hpd_c",
+ "hdmirx_5vdet_c",
+ "hdmirx_sda_c",
+ "hdmirx_scl_c";
+ function = "hdmirx";
+ };
+ };
+
+ cec_b: cec_b {
+ mux {
+ groups = "cec";
+ function = "cec";
+ };
+ };
+
+ irblaster_pins1:irblaster_pin1 {
+ mux {
+ groups = "remote_out_b";
+ function = "remote_out";
+ };
+ };
+
+ irblaster_pins2:irblaster_pin2 {
+ mux {
+ groups = "remote_out_d1";
+ function = "remote_out";
+ };
+ };
+
+ irblaster_pins3:irblaster_pin3 {
+ mux {
+ groups = "remote_out_d9";
+ function = "remote_out";
+ };
+ };
+
+ irblaster_pins4:irblaster_pin4 {
+ mux {
+ groups = "remote_out_p6";
+ function = "remote_out";
+ };
+ };
+
+ irblaster_pins5:irblaster_pin5 {
+ mux {
+ groups = "remote_out_p9";
+ function = "remote_out";
+ };
+ };
+
+ pwm_a_pins1: pwm_a_pins1 {
+ mux {
+ groups = "pwm_a_e0";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_a_pins2: pwm_a_pins2 {
+ mux {
+ groups = "pwm_a_d11";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_b_pins1: pwm_b_pins1 {
+ mux {
+ groups = "pwm_b_e1";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins2: pwm_b_pins2 {
+ mux {
+ groups = "pwm_b_z4";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_c_pins1: pwm_c_pins1 {
+ mux {
+ groups = "pwm_c_d5";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins2: pwm_c_pins2 {
+ mux {
+ groups = "pwm_c_d7";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins3: pwm_c_pins3 {
+ mux {
+ groups = "pwm_c_d11";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_d_pins1: pwm_d_pins1 {
+ mux {
+ groups = "pwm_d_z5";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins2: pwm_d_pins2 {
+ mux {
+ groups = "pwm_d_m1";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins3: pwm_d_pins3 {
+ mux {
+ groups = "pwm_d_m23";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins4: pwm_d_pins4 {
+ mux {
+ groups = "pwm_d_d9";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins5: pwm_d_pins5 {
+ mux {
+ groups = "pwm_d_h5";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins6: pwm_d_pins6 {
+ mux {
+ groups = "pwm_d_h12";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_e_pins1: pwm_e_pins1 {
+ mux {
+ groups = "pwm_e_z6";
+ function = "pwm_e";
+ };
+ };
+
+ pwm_e_pins2: pwm_e_pins2 {
+ mux {
+ groups = "pwm_e_h13";
+ function = "pwm_e";
+ };
+ };
+
+ pwm_e_pins3: pwm_e_pins3 {
+ mux {
+ groups = "pwm_e_m24";
+ function = "pwm_e";
+ };
+ };
+
+ pwm_e_pins4: pwm_e_pins4 {
+ mux {
+ groups = "pwm_e_d10";
+ function = "pwm_e";
+ };
+ };
+
+ pwm_e_pins5: pwm_e_pins5 {
+ mux {
+ groups = "pwm_e_e2";
+ function = "pwm_e";
+ };
+ };
+
+ pwm_f_pins1: pwm_f_pins1 {
+ mux {
+ groups = "pwm_f_c10";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins2: pwm_f_pins2 {
+ mux {
+ groups = "pwm_f_d6";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins3: pwm_f_pins3 {
+ mux {
+ groups = "pwm_f_m26";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins4: pwm_f_pins4 {
+ mux {
+ groups = "pwm_f_m10";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins5: pwm_f_pins5 {
+ mux {
+ groups = "pwm_f_d12";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_g_pins1: pwm_g_pins1 {
+ mux {
+ groups = "pwm_g_z12";
+ function = "pwm_g";
+ };
+ };
+
+ pwm_g_pins2: pwm_g_pins2 {
+ mux {
+ groups = "pwm_g_z19";
+ function = "pwm_g";
+ };
+ };
+
+ pwm_g_pins3: pwm_g_pins3 {
+ mux {
+ groups = "pwm_g_m8";
+ function = "pwm_g";
+ };
+ };
+
+ pwm_h_pins1: pwm_h_pins1 {
+ mux {
+ groups = "pwm_h_d6";
+ function = "pwm_h";
+ };
+ };
+
+ pwm_h_pins2: pwm_h_pins2 {
+ mux {
+ groups = "pwm_h_z13";
+ function = "pwm_h";
+ };
+ };
+
+ pwm_h_pins3: pwm_h_pins3 {
+ mux {
+ groups = "pwm_h_m9";
+ function = "pwm_h";
+ };
+ };
+
+ pwm_c_hiz_pins: pwm_c_hiz_pins {
+ mux {
+ groups = "pwm_c_hiz";
+ function = "pwm_c_hiz";
+ };
+ };
+
+ pwm_d_hiz_pins: pwm_d_hiz_pins {
+ mux {
+ groups = "pwm_d_hiz";
+ function = "pwm_d_hiz";
+ };
+ };
+
+ lcd_vbyone_a_pins: lcd_vbyone_a_pin {
+ mux {
+ groups = "vx1_a_lockn","vx1_a_htpdn";
+ function = "vx1";
+ };
+ };
+
+ lcd_vbyone_a_off_pins: lcd_vbyone_a_off_pin {
+ mux {
+ groups = "GPIOH_0","GPIOH_1";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+
+ lcd_tcon_p2p_pins: lcd_tcon_p2p_pin {
+ mux {
+ groups = "tcon_1","tcon_2","tcon_3",
+ "tcon_4","tcon_5","tcon_6",
+ "tcon_lock";
+ function = "tcon";
+ };
+ };
+
+ lcd_tcon_p2p_usit_pins: lcd_tcon_p2p_usit_pin {
+ mux {
+ groups = "tcon_1","tcon_2","tcon_3",
+ "tcon_4","tcon_5","tcon_6",
+ "tcon_sfc_h0";
+ function = "tcon";
+ };
+ };
+
+ lcd_tcon_p2p_off_pins: lcd_tcon_p2p_off_pin {
+ mux {
+ groups = "GPIOH_1","GPIOH_2","GPIOH_3",
+ "GPIOH_4","GPIOH_5","GPIOH_6",
+ "GPIOH_0";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+
+ lcd_tcon_mlvds_pins: lcd_tcon_mlvds_pin {
+ mux {
+ groups = "tcon_0","tcon_1","tcon_2","tcon_3",
+ "tcon_4","tcon_5","tcon_6";
+ function = "tcon";
+ };
+ };
+
+ lcd_tcon_mlvds_off_pins: lcd_tcon_mlvds_off_pin {
+ mux {
+ groups = "GPIOH_0","GPIOH_1","GPIOH_2","GPIOH_3",
+ "GPIOH_4","GPIOH_5","GPIOH_6";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+
+ remote_pins: remote_pin {
+ mux {
+ groups = "ir_in_a";
+ function = "ir";
+ bias-disable;
+ };
+ };
+
+ remote_b_pins: remote_b_pin {
+ mux {
+ groups = "ir_in_b_z18";
+ function = "ir";
+ bias-disable;
+ };
+ };
+
+ i2c0_pins1:i2c0_pins1 {
+ mux {
+ groups = "i2c0_scl",
+ "i2c0_sda";
+ function = "i2c0";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c1_pins1:i2c1_pins1 {
+ mux {
+ groups = "i2c1_scl_d2",
+ "i2c1_sda_d3";
+ function = "i2c1";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c1_pins2:i2c1_pins2 {
+ mux {
+ groups = "i2c1_scl_d14",
+ "i2c1_sda_d13";
+ function = "i2c1";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c2_pins1:i2c2_pins1 {
+ mux {
+ groups = "i2c2_sda_e1",
+ "i2c2_scl_e0";
+ function = "i2c2";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c2_pins2:i2c2_pins2 {
+ mux {
+ groups = "i2c2_sda_h21",
+ "i2c2_scl_h20";
+ function = "i2c2";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c2_pins3:i2c2_pins3 {
+ mux {
+ groups = "i2c2_sda_h11",
+ "i2c2_scl_h10";
+ function = "i2c2";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c2_pins4:i2c2_pins4 {
+ mux {
+ groups = "i2c2_sda_h3",
+ "i2c2_scl_h2";
+ function = "i2c2";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c2_pins5:i2c2_pins5 {
+ mux {
+ groups = "i2c2_sda_m26",
+ "i2c2_scl_m25";
+ function = "i2c2";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c3_pins1:i2c3_pins1 {
+ mux {
+ groups = "i2c3_sda_d7",
+ "i2c3_scl_d6";
+ function = "i2c3";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c3_pins2:i2c3_pins2 {
+ mux {
+ groups = "i2c3_sda_c1",
+ "i2c3_scl_c0";
+ function = "i2c3";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c3_pins3:i2c3_pins3 {
+ mux {
+ groups = "i2c3_scl_m27",
+ "i2c3_sda_m28";
+ function = "i2c3";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ dcon_led_pins1:dcon_led_pins1 {
+ mux {
+ groups = "dcon_led_d7";
+ function = "dcon_led";
+ };
+ };
+
+ dcon_led_pins2:dcon_led_pins2 {
+ mux {
+ groups = "dcon_led_c10";
+ function = "dcon_led";
+ };
+ };
+
+ dcon_led_pins3:dcon_led_pins3 {
+ mux {
+ groups = "dcon_led_z18";
+ function = "dcon_led";
+ };
+ };
+
+ dcon_led_pins4:dcon_led_pins4 {
+ mux {
+ groups = "dcon_led_d8";
+ function = "dcon_led";
+ };
+ };
+
+ dcon_led_pins5:dcon_led_pins5 {
+ mux {
+ groups = "dcon_led_d9";
+ function = "dcon_led";
+ };
+ };
+
+ a_uart_pins1:a_uart1 {
+ mux {
+ groups = "uart_a_tx_c6",
+ "uart_a_rx_c7",
+ "uart_a_cts_c8",
+ "uart_a_rts_c9";
+ function = "uart_a";
+ drive-strength-microamp = <3000>;
+ bias-pull-up;
+ };
+ };
+
+ a_uart_pins2:a_uart2 {
+ mux {
+ groups = "uart_a_tx_z0",
+ "uart_a_rx_z1",
+ "uart_a_cts_z2",
+ "uart_a_rts_z3";
+ function = "uart_a";
+ drive-strength-microamp = <3000>;
+ bias-pull-up;
+ };
+ };
+
+ a_uart_pins3:a_uart3 {
+ mux {
+ groups = "uart_a_tx_m0",
+ "uart_a_rx_m1",
+ "uart_a_cts_m2",
+ "uart_a_rts_m3";
+ function = "uart_a";
+ drive-strength-microamp = <3000>;
+ bias-pull-up;
+ };
+ };
+
+ c_uart_pins1:c_uart1 {
+ mux {
+ groups = "uart_c_tx_d6",
+ "uart_c_rx_d7";
+ function = "uart_c";
+ drive-strength-microamp = <3000>;
+ bias-pull-up;
+ };
+ };
+
+ c_uart_pins2:c_uart2 {
+ mux {
+ groups = "uart_c_tx_h2",
+ "uart_c_rx_h3",
+ "uart_c_cts_h4",
+ "uart_c_rts_h5";
+ function = "uart_c";
+ drive-strength-microamp = <3000>;
+ bias-pull-up;
+ };
+ };
+
+ c_uart_pins3:c_uart3 {
+ mux {
+ groups = "uart_c_tx_m19",
+ "uart_c_rx_m20",
+ "uart_c_cts_m21",
+ "uart_c_rts_m22";
+ function = "uart_c";
+ drive-strength-microamp = <3000>;
+ bias-pull-up;
+ };
+ };
+
+ jtag_a_pins: jtag_a_pin {
+ mux {
+ groups = "jtag_a_clk_d6",
+ "jtag_a_tms_d7",
+ "jtag_a_tdi_d8",
+ "jtag_a_tdo_d9";
+ function = "jtag_a";
+ };
+
+ mux-unused {
+ groups = "GPIOW_2",
+ "GPIOW_3",
+ "GPIOW_6",
+ "GPIOW_7";
+ function = "gpio_periphs";
+ };
+ };
+
+ jtag_b_pins: jtag_b_pin {
+ mux {
+ groups = "jtag_a_clk_w2",
+ "jtag_a_tms_w3",
+ "jtag_a_tdi_w6",
+ "jtag_a_tdo_w7";
+ function = "jtag_a";
+ };
+
+ mux-unused {
+ groups = "GPIOD_6",
+ "GPIOD_7",
+ "GPIOD_8",
+ "GPIOD_9";
+ function = "gpio_periphs";
+ };
+ };
+
+ atvdemod_agc_pins: atvdemod_agc_pins {
+ mux {
+ groups = "atv_if_agc_z6";
+ function = "atv_if_agc";
+ };
+ };
+
+ dtvdemod_if_agc_pins: dtvdemod_if_agc_pins {
+ mux {
+ groups = "dtv_if_agc_z6";
+ function = "dtv";
+ };
+ };
+
+ dtvdemod_rf_agc_pins: dtvdemod_rf_agc_pins {
+ mux {
+ groups = "dtv_rf_agc_z6";
+ function = "dtv";
+ };
+ };
+
+ dvb_p_ts1_pins: dvb_p_ts1_pins {
+ mux {
+ groups = "tsin_b_d0",
+ "tsin_b_d1",
+ "tsin_b_d2",
+ "tsin_b_d3",
+ "tsin_b_d4",
+ "tsin_b_d5",
+ "tsin_b_d6",
+ "tsin_b_d7",
+ "tsin_b_clk",
+ "tsin_b_sop",
+ "tsin_b_valid";
+ function = "tsin";
+ };
+ };
+
+ dvb_ci_bus_pins_all: dvb_ci_bus_pins_all {
+ mux {
+ groups = "cicam_a0", "cicam_a1",
+ "cicam_a2_c0", "cicam_a3_c1", "cicam_a4_c2",
+ "cicam_a5_c3", "cicam_a6_c4", "cicam_a7_c5",
+ "cicam_a8_c6", "cicam_a9_c7", "cicam_a10_c8",
+ "cicam_a11_c9",
+ "cicam_data0", "cicam_data1", "cicam_data2",
+ "cicam_data3", "cicam_data4", "cicam_data5",
+ "cicam_data6", "cicam_data7",
+ "cicam_cen", "cicam_oen", "cicam_wen", "cicam_iordn",
+ "cicam_iowrn", "cicam_reset";
+ function = "cicam";
+ };
+ };
+
+ dvb_ci_bus_pins: dvb_ci_bus_pins {
+ mux {
+ groups = "cicam_a0", "cicam_a1",
+ "cicam_data0", "cicam_data1",
+ "cicam_data2", "cicam_data3",
+ "cicam_data4", "cicam_data5",
+ "cicam_data6", "cicam_data7",
+ "cicam_cen", "cicam_oen",
+ "cicam_wen", "cicam_iordn",
+ "cicam_iowrn",
+ "cicam_reset";
+ function = "cicam";
+ };
+ };
+ ci_ts_pins: ci_ts_pins {
+ mux {
+ groups = "tsout_sop",
+ "tsout_valid",
+ "tsout_d0",
+ "tsout_d1",
+ "tsout_d2",
+ "tsout_d3",
+ "tsout_d4",
+ "tsout_d5",
+ "tsout_d6",
+ "tsout_d7";
+ function = "tsout";
+ };
+ };
+ ci_addr_pins: ci_addr_pins {
+ mux {
+ groups = "cicam_a2_z8",
+ "cicam_a3_z9", "cicam_a4_z10",
+ "cicam_a5_z11", "cicam_a6_z12",
+ "cicam_a7_z13", "cicam_a8_z14",
+ "cicam_a9_z15",
+ "cicam_a10_z16", "cicam_a11_z17";
+ function = "cicam";
+ };
+ };
+
+ ci_ts_clk_pins: ci_ts_clk_pins {
+ mux {
+ groups = "tsout_clk";
+ function = "tsout";
+ };
+ };
+ ci_gpio_pins: ci_gpio_pins {
+ mux {
+ groups = "GPIOZ_7";
+ function = "gpio_periphs";
+ };
+ };
+ diseqc_out: diseqc_out {
+ mux {/*only use out, don't support */
+ groups = "diseqc_out_z0";
+ function = "diseqc_out";
+ bias-pull-down;
+ };
+ };
+
+ spicc0_pins_h: spicc0_pins_h {
+ mux {
+ groups = "spi_mosi_a_h10",
+ "spi_miso_a_h9",
+ "spi_ss0_a_h8",
+ "spi_clk_a_h11";
+ function = "spi";
+ drive-strength-microamp = <3000>;
+ };
+ };
+
+ spicc0_pins_m: spicc0_pins_m {
+ mux {
+ groups = "spi_mosi_a_m20",
+ "spi_miso_a_m19",
+ "spi_ss0_a_m22",
+ "spi_clk_a_m21";
+ function = "spi";
+ drive-strength-microamp = <3000>;
+ };
+ };
+
+ spicc1_pins_c: spicc1_pins_c {
+ mux {
+ groups = "spi_mosi_b_c1",
+ "spi_miso_b_c0",
+ "spi_ss0_b_c3",
+ "spi_clk_b_c2";
+ function = "spi";
+ drive-strength-microamp = <3000>;
+ };
+ };
+
+ spicc1_pins_z: spicc1_pins_z {
+ mux {
+ groups = "spi_mosi_b_z1",
+ "spi_miso_b_z0",
+ "spi_ss0_b_z3",
+ "spi_clk_b_z2";
+ function = "spi";
+ drive-strength-microamp = <3000>;
+ };
+ };
+
+ sd_iso7816_pins:sd_iso7816_pins {
+ mux {
+ groups = "iso7816_clk_z0",
+ "iso7816_data_z1";
+ function = "iso7816";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ all_nand_pins: all_nand_pins {
+ mux {
+ groups = "emmc_d0",
+ "emmc_d1",
+ "emmc_d2",
+ "emmc_d3",
+ "emmc_d4",
+ "emmc_d5",
+ "emmc_d6",
+ "emmc_d7",
+ "nand_ce0",
+ "nand_ale",
+ "nand_cle",
+ "nand_wen_clk",
+ "nand_ren_wr";
+ function = "nand";
+ input-enable;
+ };
+ };
+
+ nand_cs_pins: nand_cs {
+ mux {
+ groups = "nand_ce0";
+ function = "nand";
+ };
+ };
+
+ spinf_pins:spinf_pins {
+ mux {
+ groups = "spinf_mo_d0",
+ "spinf_mi_d1",
+ "spinf_wp_d2",
+ "spinf_hold_d3",
+ "spinf_d4",
+ "spinf_d5",
+ "spinf_d6",
+ "spinf_d7",
+ "spinf_clk",
+ "spinf_cs0";
+ function = "spinf";
+ drive-strength-microamp = <3000>;
+ };
+ };
+};
+
+&gpu{
+ status = "okay";
+ reg = <0x0 0xFE400000 0x0 0x40000>, /*mali APB bus base address*/
+ <0x0 0xFE002000 0x0 0x02000>; /*reset register*/
+ /*<0xFE000000 0x02000>; gpu clk register*/
+
+ interrupts = <0 144 4>, <0 145 4>, <0 146 4>;
+ interrupt-names = "GPU", "MMU", "JOB";
+ num_of_pp = <2>;
+ /*system-coherency = <31>;*/
+ clocks = <&clkc CLKID_MALI>;
+ clock-names = "gpu_mux";
+
+ /*
+ * Mali clocking is provided by two identical clock paths
+ * MALI_0 and MALI_1 muxed to a single clock by a glitch
+ * free mux to safely change frequency while running.
+ */
+ assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
+ <&clkc CLKID_MALI_0>,
+ <&clkc CLKID_MALI>; /* Glitch free mux */
+ assigned-clock-parents = <&clkc CLKID_FCLK_DIV5>,
+ <0>, /* Do Nothing */
+ <&clkc CLKID_MALI_0>;
+ assigned-clock-rates = <0>, /* Do Nothing */
+ <400000000>,
+ <0>; /* Do Nothing */
+
+ tbl = <&dvfs250_cfg
+ &dvfs400_cfg
+ &dvfs500_cfg
+ &dvfs666_cfg
+ &dvfs800_cfg
+ &dvfs800_cfg>;
+};
+
+#include "mesont6d_cpufreq.dtsi"
diff --git a/arch/arm64/boot/dts/amlogic/mesont6d_audio.dtsi b/arch/arm64/boot/dts/amlogic/mesont6d_audio.dtsi
new file mode 100644
index 0000000..1143121
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/mesont6d_audio.dtsi
@@ -0,0 +1,586 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/clock/amlogic,txhd2-audio-clk.h>
+/ {
+ soc {
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+ acodec:codec {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, t6d_acodec";
+ reg = <0x0 0xFE01A000 0x0 0x1c>;
+ tdmout_index = <1>;
+ tdmin_index = <1>;
+ dat0_ch_sel = <0>;
+ lane_offset = <8>;
+ charger_current_cap = <0x2>;
+ output_type = <0>;
+ output_pin = <0>;
+ reset-names = "acodec";
+ resets = <&reset RESET_ACODEC>;
+ status = "okay";
+ };
+
+ dolby_fw: dolby_fw {
+ compatible = "amlogic, dolby_fw";
+ mem_size = <0x100000>;
+ status = "okay";
+ };
+
+ audio_data: audio_data {
+ compatible = "amlogic, audio_data";
+ mem_in_base_cmd = <0x82000020>;
+ query_licence_cmd = <0x82000050>;
+ status = "okay";
+ };
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, snd-iomap";
+ status = "okay";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ pdm_bus {
+ reg = <0x0 0xFE331000 0x0 0x400>;
+ };
+ audiobus_base {
+ reg = <0x0 0xFE330000 0x0 0x1000>;
+ };
+ eqdrc_base {
+ reg = <0x0 0xFE332000 0x0 0x1000>;
+ };
+ vad_base {
+ reg = <0x0 0xFE331800 0x0 0x400>;
+ };
+ resampleA_base {
+ reg = <0x0 0xFE331C00 0x0 0x104>;
+ };
+ resampleB_base {
+ reg = <0x0 0xFE334000 0x0 0x104>;
+ };
+ };
+
+ audiobus: audiobus@FE330000 {
+ compatible = "amlogic, audio-controller", "simple-bus";
+ reg = <0x0 0xFE330000 0x0 0x1000>;
+ reg-names = "audio_bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xFE330000 0x0 0x1000>;
+ chip_id = <0x49>;
+ // power-domains = <&pwrdm PDID_T7_AUDIO>;
+ status = "okay";
+
+ clkaudio: audio_clocks {
+ compatible = "amlogic, t6d-audio-clocks";
+ #clock-cells = <1>;
+ reg = <0x0 0x0 0x0 0xb0>;
+ status = "okay";
+ };
+ ddr_manager {
+ compatible =
+ "amlogic, t5-audio-ddr-manager";
+ interrupts = <
+ GIC_SPI 32 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 33 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 34 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 45 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 36 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 37 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 38 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 46 IRQ_TYPE_EDGE_RISING
+ >;
+ interrupt-names =
+ "toddr_a", "toddr_b", "toddr_c",
+ "toddr_d",
+ "frddr_a", "frddr_b", "frddr_c",
+ "frddr_d";
+ };
+ pcpd_monitor_a: pcpd_monitor@fe330ec0 {
+ compatible = "amlogic, pcpda_monitor";
+ /*regbase:0xFE330000 + 0x3b0 << 2*/
+ /*size 0x28 byte*/
+ reg =<0x0 0xec0 0x0 0x28>;
+ reg-names = "pcpd_reg";
+ interrupts = <GIC_SPI 140
+ IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_pcpd";
+ status = "okay";
+ };
+
+ pinctrl_audio: pinctrl {
+ compatible = "amlogic, audio-pinctrl";
+ status = "okay";
+ };
+ };/* end of audiobus*/
+ };/*end soc*/
+};
+
+&audiobus {
+ tdma:tdm@0 {
+ compatible = "amlogic, t7-snd-tdma";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 1>;
+ dai-tdm-lane-slot-mask-out = <1 1>;
+ dai-tdm-clk-sel = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_HIFI_PLL
+ &clkc CLKID_HIFI1_PLL>;
+ clock-names = "mclk", "clk_srcpll", "clk_src_cd";
+ suspend-clk-off = <1>;
+ /* enable control gain */
+ ctrl_gain = <1>;
+ status = "okay";
+ };
+
+ tdmb:tdm@1 {
+ compatible = "amlogic, t7-snd-tdmb";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 1 1 1>;
+ dai-tdm-lane-slot-mask-out = <1 1 1 1>;
+ dai-tdm-clk-sel = <1>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_HIFI_PLL
+ &clkc CLKID_HIFI1_PLL>;
+ clock-names = "mclk", "clk_srcpll", "clk_src_cd";
+ /*
+ * 0: tdmout_a;
+ * 1: tdmout_b;
+ * 2: tdmout_c;
+ * 3: spdifout;
+ * 4: spdifout_b;
+ */
+ samesource_sel = <3>;
+ /* In for ACODEC_ADC */
+ /* tdmin-src-name = "acodec_adc"; */
+ tdmin-src-name = "hdmirx";
+ /*enable default mclk(12.288M), before extern codec start*/
+ start_clk_enable = <1>;
+
+ /*tdm clk tuning enable*/
+ clk_tuning_enable = <1>;
+
+ /* enable control gain */
+ ctrl_gain = <1>;
+ suspend-clk-off = <1>;
+
+ status = "okay";
+ src-clk-freq = <491520000>;
+ /* !!!For --TV platform-- ONLY */
+ Channel_Mask {
+ /*i2s has 4 pins, 8channel, mux output*/
+ Spdif_samesource_Channel_Mask = "i2s_2/3";
+ };
+ };
+
+ tdmc:tdm@2 {
+ compatible = "amlogic, t7-snd-tdmc";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 1 1 1>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <2>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_HIFI_PLL
+ &clkc CLKID_HIFI1_PLL>;
+ clock-names = "mclk", "clk_srcpll", "clk_src_cd";
+ suspend-clk-off = <1>;
+
+ /* pcpd_monitor*/
+ pcpd_monitor_src = <&pcpd_monitor_a>;
+
+ /* enable control gain */
+ tdmin-src-name = "hdmirx";
+ ctrl_gain = <1>;
+ status = "okay";
+ };
+
+ pdma:pdm {
+ compatible = "amlogic, tm2-revb-snd-pdm";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_HIFI_PLL
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+
+ train_sample_count = <10>;
+ src-clk-freq = <491520000>;
+ /* mode 0~4, defalut:1 */
+ filter_mode = <1>;
+
+ status = "okay";
+ };
+
+ spdifa:spdif@0 {
+ compatible = "amlogic, tm2-revb-snd-spdif-a";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_HIFI_PLL
+ &clkc CLKID_HIFI1_PLL
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "sysclk", "clk_src_cd", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+
+ interrupts =
+ <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_spdifin";
+ /*
+ * 0: tdmout_a;
+ * 1: tdmout_b;
+ * 2: tdmout_c;
+ * 3: spdifout;
+ * 4: spdifout_b;
+ * 5: earc;
+ */
+ spdif_soft_mute = <1>;
+ samesource_sel = <4>;
+ src-clk-freq = <491520000>;
+ /*spdif clk tuning enable*/
+ clk_tuning_enable = <1>;
+ suspend-clk-off = <1>;
+ status = "okay";
+ };
+
+ spdifb:spdif@1 {
+ compatible = "amlogic, tm2-revb-snd-spdif-b";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_HIFI_PLL /*CLKID_HIFI_PLL*/
+ &clkc CLKID_HIFI1_PLL
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+ &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+ clock-names = "sysclk", "clk_src_cd",
+ "gate_spdifout", "clk_spdifout";
+ src-clk-freq = <491520000>;
+ suspend-clk-off = <1>;
+ spdif_soft_mute = <1>;
+ status = "okay";
+ };
+
+ extn:extn {
+ compatible = "amlogic, t6d-snd-extn";
+ #sound-dai-cells = <0>;
+
+ interrupts =
+ <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_frhdmirx";
+
+ status = "okay";
+ };
+
+ vad:vad {
+ compatible = "amlogic, snd-vad";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_VAD>;
+ clock-names = "gate", "pll", "clk";
+
+ interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 44 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_wakeup", "irq_frame_sync";
+
+ /*
+ * Data src sel:
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ * 5: loopback_b;
+ * 6: tdmin_lb;
+ * 7: loopback_a;
+ */
+ src = <4>;
+
+ /*
+ * deal with hot word in user space or kernel space
+ * 0: in user space
+ * 1: in kernel space
+ */
+ level = <1>;
+
+ status = "okay";
+ };
+
+ aed:effect {
+ compatible = "amlogic, snd-effect-v5";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_EQDRC>;
+ clock-names = "gate", "srcpll", "eqdrc";
+
+ /*
+ * 0:tdmout_a
+ * 1:tdmout_b
+ * 2:tdmout_c
+ * 3:spdifout
+ * 4:spdifout_b
+ */
+ eqdrc_module = <1>;
+ /* max 0xf, each bit for one lane, usually one lane */
+ lane_mask = <0x1>;
+ /* max 0xff, each bit for one channel */
+ channel_mask = <0xff>;
+ suspend-clk-off = <1>;
+ status = "okay";
+ };
+
+ asrca: resample@0 {
+ compatible = "amlogic, t5-resample-a";
+ clocks = <&clkc CLKID_HIFI_PLL
+ &clkaudio CLKID_AUDIO_MCLK_B
+ &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * FRATV, 5
+ * TDMIN_LB, 6
+ * LOOPBACK_A, 7
+ * FRHDMIRX, 8
+ * LOOPBACK_B, 9
+ * SPDIFIN_LB, 10
+ * EARC_RX, 11
+ */
+ src-clk-freq = <491520000>;
+ resample_module = <8>;
+ suspend-clk-off = <1>;
+ status = "okay";
+ };
+
+ asrcb: resample@1 {
+ compatible = "amlogic, t5-resample-b";
+ clocks = <&clkc CLKID_HIFI_PLL
+ &clkaudio CLKID_AUDIO_MCLK_F
+ &clkaudio CLKID_AUDIO_RESAMPLE_B>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+ src-clk-freq = <491520000>;
+ /*this resample is only used for loopback_A.*/
+ suspend-clk-off = <1>;
+ status = "okay";
+ };
+
+ loopbacka:loopback@0 {
+ compatible = "amlogic, t5-loopbacka";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_HIFI_PLL
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_HIFI_PLL
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <2>;
+ datain_chmask = <0x3>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 1 0 0>;
+
+ /* calc mclk for datalb */
+ mclk-fs = <256>;
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <1>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ src-clk-freq = <491520000>;
+ mic-src = <&pdma>;
+ status = "okay";
+ };
+
+ loopbackb:loopback@1 {
+ compatible = "amlogic, t5-loopbackb";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_HIFI_PLL
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_HIFI_PLL
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* calc mclk for datain_lb */
+ mclk-fs = <256>;
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <1>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+ suspend-clk-off = <1>;
+ src-clk-freq = <491520000>;
+ status = "disabled";
+ };
+}; /* end of audiobus */
+
+&periphs_pinctrl {
+ tdmb_pin: tdmb_pins {
+ mux { /* GPIOH_15 GPIOH_16 GPIOH_17 */
+ groups = "tdm_fs1_h15",
+ "tdm_sclk1_h16",
+ "tdm_d0_h17";
+ function = "tdm";
+ };
+ };
+
+ tdmout_b_gpio: tdmout_b_gpio {
+ mux { /* GPIOH_15, GPIOH_16, GPIOH_17 */
+ groups ="GPIOH_15",
+ "GPIOH_16",
+ "GPIOH_17";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+ pdmin: pdminpins {
+ mux { /* GPIOH_19 GPIOH_14 GPIOH_18*/
+ groups = "pdm_dclk_h19",
+ "pdm_din1_h14",
+ "pdm_din0_h18";
+ function = "pdm";
+ };
+ };
+
+ spdifout_a: spdifout_a {
+ mux { /* GPIOE_2 */
+ groups = "spdif_out_a_e2";
+ function = "spdif";
+ };
+ };
+
+ spdifout_a_mute: spdifout_a_mute {
+ mux { /* GPIOE_2 */
+ groups = "GPIOE_2";
+ function = "gpio_periphs";
+ };
+ };
+
+ spdifout_b: spdifout_b {
+ mux { /* GPIOZ_19 */
+ groups = "spdif_out_b_z19";
+ function = "spdif";
+ };
+ };
+
+ spdifout_b_mute: spdifout_b_mute {
+ mux { /* GPIOZ_19 */
+ groups = "GPIOZ_19";
+ function = "gpio_periphs";
+ };
+ };
+
+ mclk_1_pin: mclk_1_pins {
+ mux { /* GPIOH_14 */
+ groups = "mclk_1_h14";
+ function = "mclk";
+ };
+ };
+};
+
+&pinctrl_audio {
+ tdm_d0_pins: tdm_d0_pin {
+ mux {
+ groups = "tdm_d0";
+ function = "tdmoutb_lane0";
+ };
+ };
+
+ tdmb_clk_pins: tdmb_clk_pin {
+ mux {
+ groups = "tdm_sclk0", "tdm_lrclk0";
+ function = "tdm_clk_outb";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/amlogic/mesont6d_cpufreq.dtsi b/arch/arm64/boot/dts/amlogic/mesont6d_cpufreq.dtsi
new file mode 100644
index 0000000..bebfe84
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/mesont6d_cpufreq.dtsi
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+/ {
+ opp_table0: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <789000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <789000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <789000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <666666666>;
+ opp-microvolt = <789000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <859000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <869000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <919000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <939000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <979000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <989000>;
+ };
+
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1009000>;
+ };
+ };
+
+ opp_table1: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <789000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <789000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <789000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <666666666>;
+ opp-microvolt = <789000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <859000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <869000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <919000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <939000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <979000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <989000>;
+ };
+
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1009000>;
+ };
+ };
+
+ opp_table2: opp_table2 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <749000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <749000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <749000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <666666666>;
+ opp-microvolt = <749000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <819000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <829000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <879000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <899000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <939000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <949000>;
+ };
+
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1009000>;
+ };
+ };
+
+ opp_table3: opp_table3 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <699000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <699000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <699000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <666666666>;
+ opp-microvolt = <699000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <769000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <779000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <829000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <849000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <889000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <909000>;
+ };
+
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1009000>;
+ };
+ };
+
+ meson_cpufreq {
+ compatible = "amlogic, aml-cpufreq-v2";
+ status = "okay";
+ cluster0-cpu-supply = <&vddcpu0>;
+
+ cluster0 {
+ clocks = <&scmi_clk CLKID_SCMI_CPU_CLK>;
+ clock-names = "cpuclk";
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ //skip_volt_scaling;
+ cluster_cores = <0 1 2 3>;
+ //pdvfs_enabled;
+ };
+ };
+};/* end of / */
+
+&CPU0 {
+ #cooling-cells = <2>;
+ operating-points-v2 = <&opp_table0>,
+ <&opp_table1>,
+ <&opp_table2>,
+ <&opp_table3>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/mesont6d_drm.dtsi b/arch/arm64/boot/dts/amlogic/mesont6d_drm.dtsi
new file mode 100644
index 0000000..2231e9f
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/mesont6d_drm.dtsi
@@ -0,0 +1,163 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+#include <dt-bindings/display/meson-drm-ids.h>
+#include "mesont6d.dtsi"
+
+/ {
+ drm_vpu: drm-vpu@0xff900000 {
+ status = "disabled";
+ compatible = "amlogic, meson-t6d-vpu";
+ osd_ver = /bits/ 8 <OSD_V7>;
+ reg = <0x0 0xff900000 0x0 0x40000>,
+ <0x0 0xff63c000 0x0 0x2000>,
+ <0x0 0xff638000 0x0 0x2000>;
+ reg-names = "base", "hhi", "dmc";
+ interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "viu-vsync", "viu2-vsync";
+
+ dma-coherent;
+ /*EXTERNAL port for driver outside of drm.*/
+ connectors_dev: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ drm_to_lcd0: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&lcd0_to_drm>;
+ };
+ //drm_to_dummyp: endpoint@2 {
+ // reg = <2>;
+ // remote-endpoint = <&dummyp_to_drm>;
+ //};
+ };
+ };
+
+ drm_subsystem: drm-subsystem {
+ status = "okay";
+ compatible = "amlogic, drm-subsystem";
+ ports = <&connectors_dev>;
+ fbdev_sizes = <1920 1080 1920 2160 32>;
+ osd_ver = /bits/ 8 <OSD_V7>;
+ /* OSD1&OSD2 with afbc, OSD3 has no afbc */
+ osd_afbc_mask = <3>;
+ vfm_mode = <1>; /** 0:drm mode 1:composer mode */
+ memory-region = <&logo_reserved>;
+ crtc_masks = <0 1 1>; /*for encoder: 0:hdmi 1:lcd 2:cvbs*/
+
+ vpu_topology: vpu_topology {
+ vpu_blocks {
+ osd1_block: block@0 {
+ id = /bits/ 8 <OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <0>;
+ block_name = "osd1_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &afbc1_block>;
+ };
+ osd2_block: block@1 {
+ id = /bits/ 8 <OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <0>;
+ block_name = "osd2_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <1 &afbc1_block>;
+ };
+ afbc1_block: block@2 {
+ id = /bits/ 8 <AFBC1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <1>;
+ block_name = "afbc1_block";
+ num_in_links = /bits/ 8 <0x2>;
+ in_links = <0 &osd1_block>,
+ <0 &osd2_block>;
+ num_out_links = /bits/ 8 <0x2>;
+ out_links = <0 &osd_blend_block>,
+ <0 &scaler2_block>;
+ };
+ scaler1_block: block@3 {
+ id = /bits/ 8 <SCALER1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <2>;
+ block_name = "scaler1_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd_blend_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &vpp1_postblend_block>;
+ };
+ scaler2_block: block@4 {
+ id = /bits/ 8 <SCALER2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <2>;
+ block_name = "scaler2_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <1 &afbc1_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <1 &osd_blend_block>;
+ };
+ osd_blend_block: block@5 {
+ id = /bits/ 8 <OSD_BLEND_BLOCK>;
+ block_name = "osd_blend_block";
+ type = /bits/ 8 <3>;
+ num_in_links = /bits/ 8 <0x2>;
+ in_links = <0 &afbc1_block>,
+ <0 &scaler2_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &scaler1_block>;
+ };
+ vpp1_postblend_block: block@6 {
+ id = /bits/ 8 <VPP1_POSTBLEND_BLOCK>;
+ index = /bits/ 8 <0>;
+ block_name = "vpp1_postblend_block";
+ type = /bits/ 8 <6>;
+ num_in_links = /bits/ 8 <0x2>;
+ in_links = <0 &scaler1_block>,
+ <1 &osd_blend_block>;
+ num_out_links = <0x0>;
+ };
+ video1_block: block@7 {
+ id = /bits/ 8 <VIDEO1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <7>;
+ block_name = "video1_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x0>;
+ };
+ video2_block: block@8 {
+ id = /bits/ 8 <VIDEO2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <7>;
+ block_name = "video2_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x0>;
+ };
+ };
+ };
+
+ vpu_hw_para: vpu_hw_para@0 {
+ osd_ver = /bits/ 8 <OSD_V7>;
+ afbc_type = /bits/ 8 <0x2>;
+ has_deband = /bits/ 8 <0x1>;
+ has_lut = /bits/ 8 <0x1>;
+ has_rdma = /bits/ 8 <0x1>;
+ osd_fifo_len = /bits/ 8 <64>;
+ vpp_fifo_len = /bits/ 32 <0xfff>;
+ };
+ };
+};
+
+//&dummy_venc {
+// ports {
+// port {
+// #address-cells = <1>;
+// #size-cells = <0>;
+// dummyp_to_drm: endpoint@0 {
+// reg = <0>;
+// remote-endpoint = <&drm_to_dummyp>;
+// };
+// };
+// };
+//};
diff --git a/arch/arm64/boot/dts/amlogic/t6d_t950d5_br301_1.5g.dts b/arch/arm64/boot/dts/amlogic/t6d_t950d5_br301_1.5g.dts
new file mode 100644
index 0000000..2252ab1
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/t6d_t950d5_br301_1.5g.dts
@@ -0,0 +1,1251 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "mesont6d.dtsi"
+#include "mesont6d_drm.dtsi"
+#include "firmware_ab.dtsi"
+#include "mesont6d-panel.dtsi"
+#include "mesont6d_audio.dtsi"
+
+/ {
+ amlogic-dt-id = "t6d_t950d5_br301-1.5g";
+ compatible = "t6d_t950d5_br301-1.5g";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart_B;
+ serial1 = &uart_A;
+ serial2 = &uart_C;
+ tsensor0 = &cpu_tsensor;
+ tsensor1 = &top_tsensor;
+ spi0 = &spi_nfc;
+ spi1 = &spicc0;
+ spi2 = &spicc1;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0 0x0 0x0 0x60000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* global autoconfigured region for contiguous allocations */
+ ramdump_bl33z@00000000 {
+ reg = <0x0 0x0 0x0 0x1800000>; /* 0 ~ 24M */
+ status = "disabled"; /* disabled as default */
+ };
+
+ ramoops@0x06300000 {
+ compatible = "ramoops";
+ reg = <0x0 0x06300000 0x0 0x00100000>;
+ record-size = <0x20000>;
+ console-size = <0x40000>;
+ ftrace-size = <0x80000>;
+ pmsg-size = <0x20000>;
+ };
+
+ dmc_reserved:linux,dmc_monitor {
+ compatible = "amlogic,dmc_monitor-reserved";
+ reg = <0x0 0x0 0x0 0x0>;
+ };
+
+ debug_reserved:linux,iotrace {
+ compatible = "amlogic, iotrace";
+ reg = <0x0 0x04f00000 0x0 0x00100000>;
+ io-size = <0x1b000>;
+ sched-size = <0x2000>;
+ irq-size = <0x1000>;
+ smc-size = <0x1000>;
+ misc-size = <0x1000>;
+ };
+
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ no-map;
+ alignment = <0x0 0x00100000>;
+ reg = <0x0 0x05000000 0x0 0x01300000>;
+ };
+
+ logo_reserved:linux,meson-fb {
+ compatible = "amlogic, meson-fb";
+ size = <0x0 0x800000>;
+ alignment = <0x0 0x400000>;
+ reg = <0x0 0x3f800000 0x0 0x800000>;
+ };
+
+ lcd_cma_reserved:linux,lcd-reserved {
+ compatible = "amlogic, lcd_rsvd";
+ reg = <0x0 0x3f000000 0x0 0x00410000>;
+ tcon-size = <0x00402840>;
+ };
+
+ dmaheap_cma_reserved:heap-gfx {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x0>;
+ alignment = <0x0 0x400000>;
+ };
+ dmaheap_fb_reserved:heap-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1080p TV androidT size 28M */
+ size = <0x0 0x1c00000>;
+ alignment = <0x0 0x400000>;
+ };
+
+ /* vdin0 CMA pool */
+ /*vdin0_cma_reserved:linux,vdin0_cma {*/
+ /* compatible = "shared-dma-pool";*/
+ /* reusable;*/
+ /* up to 1920x1080 yuv422 8bit and 5 buffers
+ * 1920x1080x2x5 = 20 M
+ */
+ /* size = <0x0 0x01400000>;*/
+ /* alignment = <0x0 0x400000>;*/
+ /*};*/
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x800000>;
+ alignment = <0x0 0x400000>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /*
+ * Scenario: Primary + Secondary + PIP
+ * Total size: 174M
+ * Note:
+ * setting to 168M if scatter_alloc_mode is 0.
+ * setting to 160M if scatter_alloc_mode is 1.
+ */
+ size = <0x0 0xa000000>;
+ alignment = <0x0 0x400000>;
+ linux,contiguous-region;
+ };
+
+ secure_vdec_reserved:linux,secure_vdec_reserved {
+ compatible = "amlogic, secure-vdec-reserved";
+ no-map;
+ size = <0x0 0x400000>;
+ alignment = <0x0 0x100000>;
+ };
+
+ /* global autoconfigured region for contiguous allocations */
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x400000>;
+ alignment = <0x0 0x400000>;
+ linux,cma-default;
+ };
+ };
+
+ vdd4_2v5_reg: fixed@vdd4_2v5_reg {
+ compatible = "regulator-fixed";
+ vin-supply = <&vddao3v3_reg>;
+ regulator-name = "DDR4_2V5";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddio3v3_reg: fixed@vddio3v3_reg {
+ vin-supply = <&vddao3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ pinctrl-names = "default";
+ gpio = <&gpio GPIOD_10 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <7000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddao1v8_reg: fixed@vddao1v8_reg {
+ vin-supply = <&vddao3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_1V8/VDDIO_B";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddio_m_reg: fixed@afe3v3_reg {
+ vin-supply = <&vddio3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_M";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ afe1v8_reg: fixed@afe1v8_reg {
+ vin-supply = <&afe3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "AFE_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ afe3v3_reg: fixed@afe3v3_reg {
+ vin-supply = <&vddao3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "AFE_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ pinctrl-names = "default";
+ gpio = <&gpio GPIOD_4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <7000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ enet3v3_reg: fixed@enet3v3_reg {
+ vin-supply = <&afe3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "AVDD33_ENET";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &secure_vdec_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ /*
+ * scatter_alloc_mode: the mode of scatter memory allocation
+ * 0: default mode, alloc from system and cma
+ * 1: only alloc from system
+ */
+ scatter_alloc_mode = <1>;
+ };
+
+ video_queue {
+ compatible = "amlogic, video_queue";
+ dev_name = "videoqueue";
+ status = "okay";
+ };
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ tvafe_avin_detect {
+ compatible = "amlogic, t6d_tvafe_avin_detect";
+ status = "okay";
+ device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+ reg = <0x0 0xfe00a000 0x0 0x400>; /* cvbs irq base */
+ interrupts = <0 173 1>;
+ };
+
+ tvafe {
+ compatible = "amlogic, tvafe-t6d";
+ /*memory-region = <&tvafe_cma_reserved>;*/
+ status = "okay";
+ flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+ cma_size = <5>;/*MByte*/
+ reg = <0x0 0xfe072000 0x0 0x2000/*tvafe reg base*/
+ 0x0 0xfe008000 0x0 0x2000>; /*ana reg base*/
+ reserve-iomap = "true";
+ tvafe_id = <0>;
+ //pinctrl-names = "default";
+ /*!!particular sequence, no more and no less!!!*/
+ tvafe_pin_mux = <
+ 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+ 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+ 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+ 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+ >;
+ clocks = <&clkc CLKID_CDAC_CLK>;
+ clock-names = "vdac_clk_gate";
+ cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+ cutwindow_val_v = <4 8 14 16 24>; /* level 0~4 */
+ horizontal_dir0 = <148 148 148 148 148>;
+ horizontal_dir1 = <148 168 166 160 148>;
+ horizontal_stp0 = <0 0 0 0 0>;
+ horizontal_stp1 = <0 0 0 0 0>;
+ };
+
+ vbi {
+ compatible = "amlogic, vbi";
+ status = "okay";
+ interrupts = <0 210 1>;
+ };
+
+ multi-di {
+ /***************************************************
+ * memory: default is 4
+ * 0:use reserved;
+ * 1:use cma;
+ * 2:use cma as reserved
+ * 4:use codec mem
+ ***************************************************/
+ flag_cma = <4>;//
+ //memory-region = <&di_cma_reserved>;
+ /***************************************************
+ * clock-range: <min max>
+ * default: <334 667>
+ ***************************************************/
+ //clock-range = <334 667>;
+ /***************************************************
+ * en_4k: t5w support 4k
+ ***************************************************/
+ //en_4k = <1>;
+ //keep_dec_vf = <2>;
+ //po_fmt = <6>;
+ /***************************************************
+ * post_nub: default is 11 (T7/T3/SC2/S4 new path)
+ * local 7*4075520 = 28
+ * post 11*5222400 = 56 //??
+ ***************************************************/
+ post_nub = <11>;
+ /***************************************************
+ * 0:not support
+ * bit 0: for 4k
+ * bit 1: for 1080p
+ ***************************************************/
+ //alloc_sct = <1>;
+ /***************************************************
+ * hf: default is 0 (T7/T3/SC2/S4 new path)
+ * 0:not enable;
+ * 1: enable
+ ***************************************************/
+ hf = <0>;
+ //afbce_loss_en = <1>;
+ /***************************************************
+ * loss mode for di out (T5w)
+ * 0:not set loss mode for di out;
+ * 1:1:check the loss flag in vf and set for di
+ ***************************************************/
+ };/* end of multi-di */
+
+ /* for external keypad */
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "power", "vol-", "vol+", "ok", "menu",
+ "source", "exit";
+ key_num = <7>;
+ io-channels = <&saradc SARADC_CH1>, <&saradc SARADC_CH2>;
+ io-channel-names = "key-chan-1", "key-chan-2";
+ key_chan = <SARADC_CH1 SARADC_CH1 SARADC_CH1 SARADC_CH1 SARADC_CH1
+ SARADC_CH2 SARADC_CH2>;
+ key_code = <KEY_POWER KEY_VOLUMEDOWN KEY_VOLUMEUP KEY_ENTER KEY_MENU
+ KEY_FN_F1 KEY_EXIT>;
+ /* key_val = voltage / 1800mV * 1023 */
+ key_val = <0 143 266 389 507 143 266>;
+ key_tolerance = <40 40 40 40 40 40 40>;
+ };
+
+ unifykey {
+ compatible = "amlogic,unifykey";
+ status = "okay";
+
+ unifykey-num = <13>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10 = <&keysn_10>;
+ unifykey-index-11 = <&keysn_11>;
+ unifykey-index-12 = <&keysn_12>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_3:key_3{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_4:key_4{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_6:key_6{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "lcd";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "lcd_extern";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "backlight";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "lcd_tcon";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "lcd_tcon_spi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "oemkey";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ }; /* End unifykey */
+
+ hdmirx {
+ compatible = "amlogic, hdmirx_t6d";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ /*memory-region = <&hdmirx_emp_cma_reserved>;*/
+ status = "okay";
+ pinctrl-names = "hdmirx_pins";
+ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+ &hdmirx_c_mux>;
+ repeat = <0>;
+ /*power-domains = <&pwrdm PDIP_T6D_VPU_HDMI>;*/
+ interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =<&clkc CLKID_HDMIRX_CFG>,
+ <&clkc CLKID_HDMIRX_ACR>,
+ <&clkc CLKID_HDMIRX_METER>,
+ <&clkc CLKID_HDMIRX_2M>,
+ <&clkc CLKID_HDMIRX_5M>,
+ <&clkc CLKID_HDMIRX_HDCP>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV5>;
+ clock-names = "hdmirx_cfg_clk",
+ "cts_hdmirx_acr_ref_clk",
+ "cts_hdmirx_meter_clk",
+ "cts_hdmirx_2m_clk",
+ "cts_hdmirx_5m_clk",
+ "cts_hdmirx_hdcp2x_eclk",
+ "xtal",
+ "fclk_div4",
+ "fclk_div5";
+ //power-domains = <&pwrdm 2>;
+ hdmirx_id = <0>;
+ en_4k_2_2k = <0>;
+ hpd_low_cec_off = <1>;
+ arc_port = <0>;
+ vrr_range_dynamic_update_en = <1>;
+ /* bit4: enable feature, bit3~0: port number */
+ disable_port = <0x0>;
+ /* MAP_ADDR_MODULE_CBUS */
+ /* MAP_ADDR_MODULE_HIU */
+ /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+ /* MAP_ADDR_MODULE_SEC_AHB */
+ /* MAP_ADDR_MODULE_SEC_AHB2 */
+ /* MAP_ADDR_MODULE_APB4 */
+ /* MAP_ADDR_MODULE_TOP */
+ /* MAP_ADDR_MODULE_CLK_CTRL */
+ /* MAP_ADDR_MODULE_ANA_CTRL */
+ reg = < 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0xfe398000 0x0 0x18000
+ 0x0 0xfe000000 0x0 0x1fff
+ 0x0 0xfe008000 0x0 0x334>;
+ };
+
+ /* Audio Related start */
+ auge_sound {
+ compatible = "amlogic, auge-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ avout_mute-gpios = <&gpio GPIOD_6 GPIO_ACTIVE_HIGH>;
+ spk_mute-gpios = <&gpio GPIOD_9 GPIO_ACTIVE_LOW>;
+ spk_mute_sleep_time = <800>;
+
+ /* headphone insert det */
+ aml-audio-card,hp-det-gpio = <&gpio_analog CDAC_IOUT GPIO_ACTIVE_LOW>;
+
+ interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "audio_exception64";
+
+ aml-audio-card,dai-link@0 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdma>;
+ frame-master = <&tdma>;
+ /* slave mode */
+ /*
+ * bitclock-master = <&tdmacodec>;
+ * frame-master = <&tdmacodec>;
+ */
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pcm";
+ tdmacpu: cpu {
+ sound-dai = <&tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmacodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ format = "i2s";
+ mclk-fs = <256>;
+ continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmb>;
+ frame-master = <&tdmb>;
+ /* slave mode */
+ //bitclock-master = <&tdmbcodec>;
+ //frame-master = <&tdmbcodec>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-i2s-i2s4hdmirx";
+ cpu {
+ sound-dai = <&tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmbcodec: codec {
+ prefix-names = "AMP";
+ sound-dai = </*&ad82120b*/ &acodec>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmc>;
+ frame-master = <&tdmc>;
+ /* slave mode */
+ //bitclock-master = <&tdmccodec>;
+ //frame-master = <&tdmccodec>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-i2s4parser";
+ cpu {
+ sound-dai = <&tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmccodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pdm-builtinmic";
+ cpu {
+ sound-dai = <&pdma>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ continuous-clock;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-spdif";
+ cpu {
+ sound-dai = <&spdifa>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ continuous-clock;
+ suffix-name = "alsaPORT-spdifb";
+ cpu {
+ sound-dai = <&spdifb>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@6 {
+ mclk-fs = <256>;
+ suffix-name = "alsaPORT-tv";
+ cpu {
+ sound-dai = <&extn>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@7 {
+ mclk-fs = <256>;
+ continuous-clock;
+ suffix-name = "alsaPORT-loopback";
+ cpu {
+ sound-dai = <&loopbacka>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ /* Audio Related end */
+
+ atv-demod {
+ compatible = "amlogic, atv-demod";
+ status = "okay";
+ btsc_sap_mode = <1>;
+ interrupts = <0 94 1>;
+ pinctrl-names="atvdemod_agc_pins";
+ pinctrl-0=<&atvdemod_agc_pins>;
+ reg = <0x0 0xfe0be000 0x0 0x2000 // demod reg
+ 0x0 0xfe000000 0x0 0x2000 // hiu reg
+ 0x0 0x0 0x0 0x0 // periphs reg
+ 0x0 0xfe0bc000 0x0 0x2000>; // adec reg
+ common_agc = <1>;
+ };
+
+ aml_dtv_demod {
+ compatible = "amlogic, ddemod-t6d";
+ dev_name = "aml_dtv_demod";
+ status = "okay";
+ diseqc_name = "TMI8037";
+ pinctrl-names="if_agc_pins", "diseqc_out", "rf_agc_pins";
+ pinctrl-0=<&dtvdemod_if_agc_pins>;
+ pinctrl-1=<&diseqc_out>;
+ pinctrl-2=<&dtvdemod_rf_agc_pins>;
+ //pinctrl-3=<&diseqc_in>;
+ lnb_en-gpios = <&gpio GPIOZ_2 GPIO_ACTIVE_HIGH>;
+ lnb_sel-gpios = <&gpio GPIOZ_3 GPIO_ACTIVE_HIGH>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "demod_isr";
+ power-domains = <&pwrdm PDID_T6D_DEMOD>;
+ clocks = <&clkc CLKID_DEMOD_32K>;
+ clock-names = "demod_32k";
+ reg = <0x0 0xfe310000 0x0 0x10000 //dtv demod base
+ 0x0 0xfe000000 0x0 0x2000 //hiu reg base
+ 0x0 0xff800000 0x0 0x40000 //io_aobus_base
+ 0x0 0xfe002000 0x0 0x2000>; //reset
+
+ spectrum = <1>;
+ cma_mem_size = <16>; // MB
+ };
+
+ dvb-extern {
+ compatible = "amlogic, dvb-extern";
+ dev_name = "dvb-extern";
+ status = "okay";
+
+ fe_num = <1>;
+ fe0_demod = "internal";
+
+ tuner_num = <2>; // tuner number, multi tuner support
+ tuner0_name = "r842_tuner";
+ tuner0_i2c_adap = <&i2c0>;
+ tuner0_i2c_addr = <0xF6>; // 8 bits
+ tuner0_xtal = <1>; // 0: 16MHz, 1: 24MHz
+ tuner0_xtal_mode = <0>; // NO_SHARE_XTAL(0), SLAVE_XTAL_SHARE(3)
+ tuner0_xtal_cap = <38>;
+
+ tuner1_name = "rt710_tuner";
+ tuner1_i2c_adap = <&i2c0>;
+ tuner1_i2c_addr = <0xF4>; // 8 bits
+ tuner1_xtal = <0>; // 0: 16MHz, 1: 24MHz
+ tuner1_xtal_mode = <0>; // NO_SHARE_XTAL(0), SLAVE_XTAL_SHARE(3)
+ tuner1_xtal_cap = <30>;
+ };
+
+ dvb-demux {
+ compatible = "amlogic sc2, dvb-demux"; /* same as sc2 */
+ dev_name = "dvb-demux";
+ status = "okay";
+
+ reg = <0x0 0xfe000000 0x0 0x480000>;
+
+ dmxdev_num = <0x11>;
+
+ tsn_from = "demod";
+ ts_clone = <0x0>;
+ /*single demod setting */
+ ts1_sid = <0x21>;
+ ts1 = "parallel";
+ ts1_control = <0x0>;
+ ts1_invert = <0>;
+
+ ts2_sid = <0x22>;
+ ts2 = "parallel";
+ ts2_control = <0x0>;
+ ts2_invert = <0>;
+ pinctrl-names = "p_ts1";
+ pinctrl-0 = <&dvb_p_ts1_pins>;
+ };
+
+ dvbci {
+ compatible = "amlogic, dvbci";
+ dev_name = "dvbci";
+ status = "okay";
+
+ io_type = <4>; /* 0=iobus,1=spi,2=cimax,3=spi-t312 4:T5D,ci bus*/
+ addr_ts_mode_multiplex = <0>; /*AY301 not multi ts and addr,default 1*/
+ le_enable_level = <0>; /*LE pin enable level*/
+ /*gpio pin define*/
+ pinctrl-names= "ci_ts_pins", "ci_addr_pins";
+ pinctrl-0=<&dvb_ci_bus_pins_all &ci_ts_pins &ci_ts_clk_pins>;
+ pinctrl-1=<&dvb_ci_bus_pins &ci_addr_pins &ci_gpio_pins>;
+ reg = <0x0 0xFE080000 0x0 0x1FFF>;
+ /*irq define, t5m not use these irq*/
+ //interrupts = <0 186 1
+ // 0 187 1>;
+ //interrupt-names = "irq_cmp",
+ // "irq_timeout";
+ dvbci_io {
+ /*gpio define GPIOM_27 GPIOM_28 GPIOM_30*/
+ cd_pin1 = <&gpio GPIOM_27 GPIO_ACTIVE_HIGH>;
+ pwr_pin = <&gpio GPIOM_28 GPIO_ACTIVE_HIGH>;
+ le_pin = <&gpio GPIOM_29 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ smartcard {
+ compatible = "amlogic,smartcard-sc2";
+ dev_name = "smartcard";
+ status = "disabled"; /* disabled as default */
+
+ reg = <0x0 0xfe000000 0x0 0x480000>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+
+ reset_pin-gpios = <&gpio GPIOZ_3 GPIO_ACTIVE_HIGH>;
+ detect_pin-gpios = <&gpio GPIOM_27 GPIO_ACTIVE_HIGH>;
+ enable_5v3v_pin-gpios = <&gpio GPIOM_28 GPIO_ACTIVE_HIGH>;
+ enable_pin-gpios = <&gpio GPIOZ_2 GPIO_ACTIVE_HIGH>;
+
+ interrupts = <0 174 1>;
+ interrupt-names = "smc0_irq";
+ /*
+ *Smc clock source, if change this,
+ *you must adjust clk and divider in smartcard.c
+ */
+ smc0_clock_source = <0>;
+ /*0: high voltage on detect pin indicates card in.*/
+ smc0_det_invert = <0>;
+ smc0_5v3v_level = <0>;
+ /*Ordinarily,smartcard controller needs a enable pin.*/
+ smc_need_enable_pin = "yes";
+ reset_level = <0>;
+ smc0_enable_level = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_iso7816_pins>;
+
+ clocks = <&clkc CLKID_SC_CLK>;
+ clock-names = "smartcard";
+ };
+}; /* end of / */
+
+&drm_vpu {
+ status = "okay";
+ logo_addr = "0x3f800000";
+
+ connectors_dev: port@1 {
+ drm_to_lcd0: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&lcd0_to_drm>;
+ };
+ };
+};
+
+&lcd {
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_to_drm: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&drm_to_lcd0>;
+ };
+ };
+ };
+};
+
+&uart_B {
+ status = "okay";
+};
+
+/*if you want to use vdin just modify status to "ok"*/
+&vdin0 {
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ status = "okay";
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ * onebuffer:
+ * worst case:(4096*2160*3 + 2M(afbce issue)) = 27.5M
+ * dw:960x540x3 = 1.5M
+ * total size:(27.5+1.5)x buffernumber
+ */
+ cma_size = <330>;
+ frame_buff_num = <10>;
+};
+
+&vdin1 {
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+};
+
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ //mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+// amlogic,dram-access-quirk;
+
+// mmc-pwrseq = <&emmc_pwrseq>;
+// vmmc-supply = <&vddao_3v3>;
+// vqmmc-supply = <&vddao_1v8>;
+};
+
+&mtd_nand {
+ status = "disabled"; /* disabled as default */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "nand_norb_mod","nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&nand_cs_pins>;
+ bl_mode = <1>;
+ fip_copies = <4>;
+ fip_size = <0x200000>;
+ ship_bad_block = <1>;
+ disa_irq_flag = <1>;
+ nand@bootloader {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-ecc-maximize;
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x00000000>;
+ };
+ };
+ nand@normal {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-ecc-maximize;
+ };
+};
+
+&spi_nfc {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spinf_pins>;
+ spi-nand@0 {
+ compatible = "spi-nand";
+ status = "disabled";
+ reg = <0>;
+ spi-max-frequency = <83000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+ spi-nor@0 {
+ compatible = "spi-nor";
+ status = "disabled";
+ reg = <0>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <83000000>;
+ };
+};
+
+&periphs_pinctrl {
+ /*backlight*/
+ bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+ mux {
+ groups = "pwm_vs_h12";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_off_pins:bl_pwm_off_pin {
+ mux {
+ groups = "GPIOH_12";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+ ST6451D06_3_pins: ST6451D06_3_pin {
+ mux {
+ groups = "tcon_1","tcon_2","tcon_3",
+ "tcon_4","tcon_5","tcon_6",
+ "tcon_8","tcon_lock";
+ function = "tcon";
+ };
+ };
+ ST6451D06_3_off_pins: ST6451D06_3_off_pin {
+ mux {
+ groups = "GPIOH_1","GPIOH_2","GPIOH_3",
+ "GPIOH_4","GPIOH_5","GPIOH_6",
+ "GPIOH_8", "GPIOH_0";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+ ST5461D18_2_pins: ST5461D18_2_pin {
+ mux {
+ groups = "tcon_1","tcon_2","tcon_3",
+ "tcon_4","tcon_5","tcon_6",
+ "tcon_8","tcon_lock";
+ function = "tcon";
+ };
+ };
+ ST5461D18_2_off_pins: ST5461D18_2_off_pin {
+ mux {
+ groups = "GPIOH_1","GPIOH_2","GPIOH_3",
+ "GPIOH_4","GPIOH_5","GPIOH_6",
+ "GPIOH_8","GPIOH_0";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c2_pins2>;
+
+ lcd_extern_i2c0: lcd_extern_i2c@29 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_HV650LS";
+ reg = <0x29>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c1: lcd_extern_i2c@33 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_CS602";
+ reg = <0x33>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c2: lcd_extern_i2c@20 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_CS901";
+ reg = <0x20>;
+ status = "okay";
+ };
+};
+
+ðmac {
+ status = "okay";
+ phy-handle = <&internal_ephy>;
+ phy-mode = "rmii";
+};
+
+&usb_phy20{
+ portnum = <1>;
+ /* Set portspeed to 1 & cfg clks to enable HSP mode. */
+ portspeed = <0x0>; /* 0: HS mode. 1: HSP mode */
+ /* clk src mux.
+ * [0]: HS: normal comb clk. HSP: normal comb clk + 48m soc-digital clk.
+ * [1~3]: 48m clk src selector for HSP mode:
+ * phyclk/soc-digital/soc-analog.
+ * For option 2&3, the clk cfg should be also modified in the dtsi.
+ */
+ clk-mux = <0x0>;
+ status = "okay";
+};
+
+&usb_phy30{
+ status = "okay";
+};
+
+&usb_phy21{
+ gpio-vbus-power = "GPIOC_10";
+ gpios = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ portnum = <1>;
+ status = "okay";
+};
+
+&usb_phy31{
+ status = "okay";
+};
+
+&usb_phy22{
+ portnum = <1>;
+ /* Set portspeed to 1 & cfg clks to enable HSP mode. */
+ portspeed = <0x0>; /* 0: HS mode. 1: HSP mode */
+ /* clk src mux.
+ * [0]: HS: normal comb clk. HSP: normal comb clk + 48m soc-digital clk.
+ * [1~3]: 48m clk src selector for HSP mode:
+ * phyclk/soc-digital/soc-analog.
+ * For option 2&3, the clk cfg should be also modified in the dtsi.
+ */
+ clk-mux = <0x0>;
+ status = "okay";
+};
+
+&usb_phy32{
+ status = "okay";
+};
+
+&crg20_otg{
+ controller-type = <1>; /* 0~3: normal, host, device, otg */
+ status = "okay";
+};
+
+&crg20_drd{
+ status = "okay";
+};
+
+&crg20_udc{
+ status = "okay";
+};
+
+&crg21_host{
+ status = "okay";
+};
+
+&crg22_host{
+ status = "okay";
+};
+
+&spicc0 { //for TCON
+ status = "disabled";/* disabled as default */
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc0_pins_h>;
+};
+
+&spicc1 { //for UWB/LocalDimm
+ status = "disabled";/* disabled as default */
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc1_pins_z>;
+};
+
+&ir {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&remote_pins>;
+};
+
+&ir1 {
+ status = "disabled"; /* disabled as default */
+ pinctrl-names = "default";
+ pinctrl-0 = <&remote_b_pins>;
+};
+
+&dcon_led {
+ status = "okay";
+ led_number = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&dcon_led_pins1>;
+ // polarity-inversed;
+};
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c0_pins1>;
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins1>;
+ clock-frequency = <300000>;
+ ad82120b: ad82120b@6c {
+ compatible = "ESMT,ad82120b";
+ #sound-dai-cells = <0>;
+ reset_pin-gpios = <&gpio GPIOD_9 GPIO_ACTIVE_HIGH>;
+ reg = <0x6c>;
+ status = "disabled";
+ };
+};
+
+&saradc {
+ status = "okay";
+};
+
+&vdac {
+ cdac_disable = <1>;
+};
+
+&amlvecm {
+ compatible = "amlogic, vecm-t6d";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <1>;/*1:enable ;0:disable*/
+ wb_en = <1>;/*1:enable ;0:disable*/
+ cm_en = <1>;/*1:enable ;0:disable*/
+ wb_sel = <0>;/*1:mtx ;0:gainoff*/
+ osd_pic_en = <1>;/*1:enable osd picture setting;0:disable*/
+ vlock_en = <1>;/*1:enable;0:disable*/
+ vlock_mode = <0x8>;
+ vrr_priority = <1>;/*1:game mode vrr always on;0:vrr on depend on vrr signal*/
+ /*vlock work mode:
+ *bit0:auto ENC
+ *bit1:auto PLL
+ *bit2:manual PLL
+ *bit3:manual ENC
+ *bit4:manual soft ENC
+ *bit5:manual MIX PLL ENC
+ */
+ vlock_pll_m_limit = <1>;
+ vlock_line_limit = <2>;
+ interrupts = <0 207 1>;
+ interrupt-names = "lc_curve";
+};
+
+&aml_wifi{
+ status = "okay";
+ power_on-gpios = <&gpio GPIOD_11 GPIO_ACTIVE_HIGH>;
+ disable-wifi-32k;
+};
+
+&aml_bt {
+ status = "okay";
+ bt_en-gpios = <&gpio GPIOD_11 GPIO_ACTIVE_HIGH>;
+ hostwake-gpios = <&gpio GPIOD_13 GPIO_ACTIVE_HIGH>;
+ power_down_disable = <1>;
+};
+
+&tdmb {
+ pinctrl-names = "tdm_pins","tdmout_a_gpio";
+ pinctrl-0 = <
+ &tdmb_pin
+ &tdm_d0_pins
+ &tdmb_clk_pins>;
+ pinctrl-1 = <&tdmout_b_gpio>;
+};
+
+&pdma {
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+};
+
+&spdifa {
+
+ pinctrl-names = "spdif_pins",
+ "spdif_pins_mute";
+ pinctrl-0 = <&spdifout_a>;
+ pinctrl-1 = <&spdifout_a_mute>;
+};
+
+&spdifb {
+ pinctrl-names = "spdif_pins",
+ "spdif_pins_mute";
+ pinctrl-0 = <&spdifout_b>;
+ pinctrl-1 = <&spdifout_b_mute>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/t6d_t950d5_br301_1g.dts b/arch/arm64/boot/dts/amlogic/t6d_t950d5_br301_1g.dts
new file mode 100644
index 0000000..2a56ea3
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/t6d_t950d5_br301_1g.dts
@@ -0,0 +1,1251 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "mesont6d.dtsi"
+#include "mesont6d_drm.dtsi"
+#include "firmware_ab.dtsi"
+#include "mesont6d-panel.dtsi"
+#include "mesont6d_audio.dtsi"
+
+/ {
+ amlogic-dt-id = "t6d_t950d5_br301-1g";
+ compatible = "t6d_t950d5_br301-1g";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart_B;
+ serial1 = &uart_A;
+ serial2 = &uart_C;
+ tsensor0 = &cpu_tsensor;
+ tsensor1 = &top_tsensor;
+ spi0 = &spi_nfc;
+ spi1 = &spicc0;
+ spi2 = &spicc1;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* global autoconfigured region for contiguous allocations */
+ ramdump_bl33z@00000000 {
+ reg = <0x0 0x0 0x0 0x1800000>; /* 0 ~ 24M */
+ status = "disabled"; /* disabled as default */
+ };
+
+ ramoops@0x06300000 {
+ compatible = "ramoops";
+ reg = <0x0 0x06300000 0x0 0x00100000>;
+ record-size = <0x20000>;
+ console-size = <0x40000>;
+ ftrace-size = <0x80000>;
+ pmsg-size = <0x20000>;
+ };
+
+ dmc_reserved:linux,dmc_monitor {
+ compatible = "amlogic,dmc_monitor-reserved";
+ reg = <0x0 0x0 0x0 0x0>;
+ };
+
+ debug_reserved:linux,iotrace {
+ compatible = "amlogic, iotrace";
+ reg = <0x0 0x04f00000 0x0 0x00100000>;
+ io-size = <0x1b000>;
+ sched-size = <0x2000>;
+ irq-size = <0x1000>;
+ smc-size = <0x1000>;
+ misc-size = <0x1000>;
+ };
+
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ no-map;
+ alignment = <0x0 0x00100000>;
+ reg = <0x0 0x05000000 0x0 0x01300000>;
+ };
+
+ logo_reserved:linux,meson-fb {
+ compatible = "amlogic, meson-fb";
+ size = <0x0 0x800000>;
+ alignment = <0x0 0x400000>;
+ reg = <0x0 0x3f800000 0x0 0x800000>;
+ };
+
+ lcd_cma_reserved:linux,lcd-reserved {
+ compatible = "amlogic, lcd_rsvd";
+ reg = <0x0 0x3f000000 0x0 0x00410000>;
+ tcon-size = <0x00402840>;
+ };
+
+ dmaheap_cma_reserved:heap-gfx {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x0>;
+ alignment = <0x0 0x400000>;
+ };
+ dmaheap_fb_reserved:heap-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1080p TV androidT size 28M */
+ size = <0x0 0x1c00000>;
+ alignment = <0x0 0x400000>;
+ };
+
+ /* vdin0 CMA pool */
+ /*vdin0_cma_reserved:linux,vdin0_cma {*/
+ /* compatible = "shared-dma-pool";*/
+ /* reusable;*/
+ /* up to 1920x1080 yuv422 8bit and 5 buffers
+ * 1920x1080x2x5 = 20 M
+ */
+ /* size = <0x0 0x01400000>;*/
+ /* alignment = <0x0 0x400000>;*/
+ /*};*/
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x800000>;
+ alignment = <0x0 0x400000>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /*
+ * Scenario: Primary + Secondary + PIP
+ * Total size: 174M
+ * Note:
+ * setting to 168M if scatter_alloc_mode is 0.
+ * setting to 160M if scatter_alloc_mode is 1.
+ */
+ size = <0x0 0xa000000>;
+ alignment = <0x0 0x400000>;
+ linux,contiguous-region;
+ };
+
+ secure_vdec_reserved:linux,secure_vdec_reserved {
+ compatible = "amlogic, secure-vdec-reserved";
+ no-map;
+ size = <0x0 0x400000>;
+ alignment = <0x0 0x100000>;
+ };
+
+ /* global autoconfigured region for contiguous allocations */
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x400000>;
+ alignment = <0x0 0x400000>;
+ linux,cma-default;
+ };
+ };
+
+ vdd4_2v5_reg: fixed@vdd4_2v5_reg {
+ compatible = "regulator-fixed";
+ vin-supply = <&vddao3v3_reg>;
+ regulator-name = "DDR4_2V5";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddio3v3_reg: fixed@vddio3v3_reg {
+ vin-supply = <&vddao3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ pinctrl-names = "default";
+ gpio = <&gpio GPIOD_10 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <7000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddao1v8_reg: fixed@vddao1v8_reg {
+ vin-supply = <&vddao3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_1V8/VDDIO_B";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddio_m_reg: fixed@afe3v3_reg {
+ vin-supply = <&vddio3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_M";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ afe1v8_reg: fixed@afe1v8_reg {
+ vin-supply = <&afe3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "AFE_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ afe3v3_reg: fixed@afe3v3_reg {
+ vin-supply = <&vddao3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "AFE_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ pinctrl-names = "default";
+ gpio = <&gpio GPIOD_4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <7000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ enet3v3_reg: fixed@enet3v3_reg {
+ vin-supply = <&afe3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "AVDD33_ENET";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &secure_vdec_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ /*
+ * scatter_alloc_mode: the mode of scatter memory allocation
+ * 0: default mode, alloc from system and cma
+ * 1: only alloc from system
+ */
+ scatter_alloc_mode = <1>;
+ };
+
+ video_queue {
+ compatible = "amlogic, video_queue";
+ dev_name = "videoqueue";
+ status = "okay";
+ };
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ tvafe_avin_detect {
+ compatible = "amlogic, t6d_tvafe_avin_detect";
+ status = "okay";
+ device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+ reg = <0x0 0xfe00a000 0x0 0x400>; /* cvbs irq base */
+ interrupts = <0 173 1>;
+ };
+
+ tvafe {
+ compatible = "amlogic, tvafe-t6d";
+ /*memory-region = <&tvafe_cma_reserved>;*/
+ status = "okay";
+ flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+ cma_size = <5>;/*MByte*/
+ reg = <0x0 0xfe072000 0x0 0x2000/*tvafe reg base*/
+ 0x0 0xfe008000 0x0 0x2000>; /*ana reg base*/
+ reserve-iomap = "true";
+ tvafe_id = <0>;
+ //pinctrl-names = "default";
+ /*!!particular sequence, no more and no less!!!*/
+ tvafe_pin_mux = <
+ 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+ 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+ 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+ 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+ >;
+ clocks = <&clkc CLKID_CDAC_CLK>;
+ clock-names = "vdac_clk_gate";
+ cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+ cutwindow_val_v = <4 8 14 16 24>; /* level 0~4 */
+ horizontal_dir0 = <148 148 148 148 148>;
+ horizontal_dir1 = <148 168 166 160 148>;
+ horizontal_stp0 = <0 0 0 0 0>;
+ horizontal_stp1 = <0 0 0 0 0>;
+ };
+
+ vbi {
+ compatible = "amlogic, vbi";
+ status = "okay";
+ interrupts = <0 210 1>;
+ };
+
+ multi-di {
+ /***************************************************
+ * memory: default is 4
+ * 0:use reserved;
+ * 1:use cma;
+ * 2:use cma as reserved
+ * 4:use codec mem
+ ***************************************************/
+ flag_cma = <4>;//
+ //memory-region = <&di_cma_reserved>;
+ /***************************************************
+ * clock-range: <min max>
+ * default: <334 667>
+ ***************************************************/
+ //clock-range = <334 667>;
+ /***************************************************
+ * en_4k: t5w support 4k
+ ***************************************************/
+ //en_4k = <1>;
+ //keep_dec_vf = <2>;
+ //po_fmt = <6>;
+ /***************************************************
+ * post_nub: default is 11 (T7/T3/SC2/S4 new path)
+ * local 7*4075520 = 28
+ * post 11*5222400 = 56 //??
+ ***************************************************/
+ post_nub = <11>;
+ /***************************************************
+ * 0:not support
+ * bit 0: for 4k
+ * bit 1: for 1080p
+ ***************************************************/
+ //alloc_sct = <1>;
+ /***************************************************
+ * hf: default is 0 (T7/T3/SC2/S4 new path)
+ * 0:not enable;
+ * 1: enable
+ ***************************************************/
+ hf = <0>;
+ //afbce_loss_en = <1>;
+ /***************************************************
+ * loss mode for di out (T5w)
+ * 0:not set loss mode for di out;
+ * 1:1:check the loss flag in vf and set for di
+ ***************************************************/
+ };/* end of multi-di */
+
+ /* for external keypad */
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "power", "vol-", "vol+", "ok", "menu",
+ "source", "exit";
+ key_num = <7>;
+ io-channels = <&saradc SARADC_CH1>, <&saradc SARADC_CH2>;
+ io-channel-names = "key-chan-1", "key-chan-2";
+ key_chan = <SARADC_CH1 SARADC_CH1 SARADC_CH1 SARADC_CH1 SARADC_CH1
+ SARADC_CH2 SARADC_CH2>;
+ key_code = <KEY_POWER KEY_VOLUMEDOWN KEY_VOLUMEUP KEY_ENTER KEY_MENU
+ KEY_FN_F1 KEY_EXIT>;
+ /* key_val = voltage / 1800mV * 1023 */
+ key_val = <0 143 266 389 507 143 266>;
+ key_tolerance = <40 40 40 40 40 40 40>;
+ };
+
+ unifykey {
+ compatible = "amlogic,unifykey";
+ status = "okay";
+
+ unifykey-num = <13>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10 = <&keysn_10>;
+ unifykey-index-11 = <&keysn_11>;
+ unifykey-index-12 = <&keysn_12>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_3:key_3{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_4:key_4{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_6:key_6{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "lcd";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "lcd_extern";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "backlight";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "lcd_tcon";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "lcd_tcon_spi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "oemkey";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ }; /* End unifykey */
+
+ hdmirx {
+ compatible = "amlogic, hdmirx_t6d";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ /*memory-region = <&hdmirx_emp_cma_reserved>;*/
+ status = "okay";
+ pinctrl-names = "hdmirx_pins";
+ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+ &hdmirx_c_mux>;
+ repeat = <0>;
+ /*power-domains = <&pwrdm PDIP_T6D_VPU_HDMI>;*/
+ interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =<&clkc CLKID_HDMIRX_CFG>,
+ <&clkc CLKID_HDMIRX_ACR>,
+ <&clkc CLKID_HDMIRX_METER>,
+ <&clkc CLKID_HDMIRX_2M>,
+ <&clkc CLKID_HDMIRX_5M>,
+ <&clkc CLKID_HDMIRX_HDCP>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV5>;
+ clock-names = "hdmirx_cfg_clk",
+ "cts_hdmirx_acr_ref_clk",
+ "cts_hdmirx_meter_clk",
+ "cts_hdmirx_2m_clk",
+ "cts_hdmirx_5m_clk",
+ "cts_hdmirx_hdcp2x_eclk",
+ "xtal",
+ "fclk_div4",
+ "fclk_div5";
+ //power-domains = <&pwrdm 2>;
+ hdmirx_id = <0>;
+ en_4k_2_2k = <0>;
+ hpd_low_cec_off = <1>;
+ arc_port = <0>;
+ vrr_range_dynamic_update_en = <1>;
+ /* bit4: enable feature, bit3~0: port number */
+ disable_port = <0x0>;
+ /* MAP_ADDR_MODULE_CBUS */
+ /* MAP_ADDR_MODULE_HIU */
+ /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+ /* MAP_ADDR_MODULE_SEC_AHB */
+ /* MAP_ADDR_MODULE_SEC_AHB2 */
+ /* MAP_ADDR_MODULE_APB4 */
+ /* MAP_ADDR_MODULE_TOP */
+ /* MAP_ADDR_MODULE_CLK_CTRL */
+ /* MAP_ADDR_MODULE_ANA_CTRL */
+ reg = < 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0xfe398000 0x0 0x18000
+ 0x0 0xfe000000 0x0 0x1fff
+ 0x0 0xfe008000 0x0 0x334>;
+ };
+
+ /* Audio Related start */
+ auge_sound {
+ compatible = "amlogic, auge-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ avout_mute-gpios = <&gpio GPIOD_6 GPIO_ACTIVE_HIGH>;
+ spk_mute-gpios = <&gpio GPIOD_9 GPIO_ACTIVE_LOW>;
+ spk_mute_sleep_time = <800>;
+
+ /* headphone insert det */
+ aml-audio-card,hp-det-gpio = <&gpio_analog CDAC_IOUT GPIO_ACTIVE_LOW>;
+
+ interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "audio_exception64";
+
+ aml-audio-card,dai-link@0 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdma>;
+ frame-master = <&tdma>;
+ /* slave mode */
+ /*
+ * bitclock-master = <&tdmacodec>;
+ * frame-master = <&tdmacodec>;
+ */
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pcm";
+ tdmacpu: cpu {
+ sound-dai = <&tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmacodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ format = "i2s";
+ mclk-fs = <256>;
+ continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmb>;
+ frame-master = <&tdmb>;
+ /* slave mode */
+ //bitclock-master = <&tdmbcodec>;
+ //frame-master = <&tdmbcodec>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-i2s-i2s4hdmirx";
+ cpu {
+ sound-dai = <&tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmbcodec: codec {
+ prefix-names = "AMP";
+ sound-dai = </*&ad82120b*/ &acodec>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmc>;
+ frame-master = <&tdmc>;
+ /* slave mode */
+ //bitclock-master = <&tdmccodec>;
+ //frame-master = <&tdmccodec>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-i2s4parser";
+ cpu {
+ sound-dai = <&tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmccodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pdm-builtinmic";
+ cpu {
+ sound-dai = <&pdma>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ continuous-clock;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-spdif";
+ cpu {
+ sound-dai = <&spdifa>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ continuous-clock;
+ suffix-name = "alsaPORT-spdifb";
+ cpu {
+ sound-dai = <&spdifb>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@6 {
+ mclk-fs = <256>;
+ suffix-name = "alsaPORT-tv";
+ cpu {
+ sound-dai = <&extn>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@7 {
+ mclk-fs = <256>;
+ continuous-clock;
+ suffix-name = "alsaPORT-loopback";
+ cpu {
+ sound-dai = <&loopbacka>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ /* Audio Related end */
+
+ atv-demod {
+ compatible = "amlogic, atv-demod";
+ status = "okay";
+ btsc_sap_mode = <1>;
+ interrupts = <0 94 1>;
+ pinctrl-names="atvdemod_agc_pins";
+ pinctrl-0=<&atvdemod_agc_pins>;
+ reg = <0x0 0xfe0be000 0x0 0x2000 // demod reg
+ 0x0 0xfe000000 0x0 0x2000 // hiu reg
+ 0x0 0x0 0x0 0x0 // periphs reg
+ 0x0 0xfe0bc000 0x0 0x2000>; // adec reg
+ common_agc = <1>;
+ };
+
+ aml_dtv_demod {
+ compatible = "amlogic, ddemod-t6d";
+ dev_name = "aml_dtv_demod";
+ status = "okay";
+ diseqc_name = "TMI8037";
+ pinctrl-names="if_agc_pins", "diseqc_out", "rf_agc_pins";
+ pinctrl-0=<&dtvdemod_if_agc_pins>;
+ pinctrl-1=<&diseqc_out>;
+ pinctrl-2=<&dtvdemod_rf_agc_pins>;
+ //pinctrl-3=<&diseqc_in>;
+ lnb_en-gpios = <&gpio GPIOZ_2 GPIO_ACTIVE_HIGH>;
+ lnb_sel-gpios = <&gpio GPIOZ_3 GPIO_ACTIVE_HIGH>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "demod_isr";
+ power-domains = <&pwrdm PDID_T6D_DEMOD>;
+ clocks = <&clkc CLKID_DEMOD_32K>;
+ clock-names = "demod_32k";
+ reg = <0x0 0xfe310000 0x0 0x10000 //dtv demod base
+ 0x0 0xfe000000 0x0 0x2000 //hiu reg base
+ 0x0 0xff800000 0x0 0x40000 //io_aobus_base
+ 0x0 0xfe002000 0x0 0x2000>; //reset
+
+ spectrum = <1>;
+ cma_mem_size = <16>; // MB
+ };
+
+ dvb-extern {
+ compatible = "amlogic, dvb-extern";
+ dev_name = "dvb-extern";
+ status = "okay";
+
+ fe_num = <1>;
+ fe0_demod = "internal";
+
+ tuner_num = <2>; // tuner number, multi tuner support
+ tuner0_name = "r842_tuner";
+ tuner0_i2c_adap = <&i2c0>;
+ tuner0_i2c_addr = <0xF6>; // 8 bits
+ tuner0_xtal = <1>; // 0: 16MHz, 1: 24MHz
+ tuner0_xtal_mode = <0>; // NO_SHARE_XTAL(0), SLAVE_XTAL_SHARE(3)
+ tuner0_xtal_cap = <38>;
+
+ tuner1_name = "rt710_tuner";
+ tuner1_i2c_adap = <&i2c0>;
+ tuner1_i2c_addr = <0xF4>; // 8 bits
+ tuner1_xtal = <0>; // 0: 16MHz, 1: 24MHz
+ tuner1_xtal_mode = <0>; // NO_SHARE_XTAL(0), SLAVE_XTAL_SHARE(3)
+ tuner1_xtal_cap = <30>;
+ };
+
+ dvb-demux {
+ compatible = "amlogic sc2, dvb-demux"; /* same as sc2 */
+ dev_name = "dvb-demux";
+ status = "okay";
+
+ reg = <0x0 0xfe000000 0x0 0x480000>;
+
+ dmxdev_num = <0x11>;
+
+ tsn_from = "demod";
+ ts_clone = <0x0>;
+ /*single demod setting */
+ ts1_sid = <0x21>;
+ ts1 = "parallel";
+ ts1_control = <0x0>;
+ ts1_invert = <0>;
+
+ ts2_sid = <0x22>;
+ ts2 = "parallel";
+ ts2_control = <0x0>;
+ ts2_invert = <0>;
+ pinctrl-names = "p_ts1";
+ pinctrl-0 = <&dvb_p_ts1_pins>;
+ };
+
+ dvbci {
+ compatible = "amlogic, dvbci";
+ dev_name = "dvbci";
+ status = "okay";
+
+ io_type = <4>; /* 0=iobus,1=spi,2=cimax,3=spi-t312 4:T5D,ci bus*/
+ addr_ts_mode_multiplex = <0>; /*AY301 not multi ts and addr,default 1*/
+ le_enable_level = <0>; /*LE pin enable level*/
+ /*gpio pin define*/
+ pinctrl-names= "ci_ts_pins", "ci_addr_pins";
+ pinctrl-0=<&dvb_ci_bus_pins_all &ci_ts_pins &ci_ts_clk_pins>;
+ pinctrl-1=<&dvb_ci_bus_pins &ci_addr_pins &ci_gpio_pins>;
+ reg = <0x0 0xFE080000 0x0 0x1FFF>;
+ /*irq define, t5m not use these irq*/
+ //interrupts = <0 186 1
+ // 0 187 1>;
+ //interrupt-names = "irq_cmp",
+ // "irq_timeout";
+ dvbci_io {
+ /*gpio define GPIOM_27 GPIOM_28 GPIOM_30*/
+ cd_pin1 = <&gpio GPIOM_27 GPIO_ACTIVE_HIGH>;
+ pwr_pin = <&gpio GPIOM_28 GPIO_ACTIVE_HIGH>;
+ le_pin = <&gpio GPIOM_29 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ smartcard {
+ compatible = "amlogic,smartcard-sc2";
+ dev_name = "smartcard";
+ status = "disabled"; /* disabled as default */
+
+ reg = <0x0 0xfe000000 0x0 0x480000>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+
+ reset_pin-gpios = <&gpio GPIOZ_3 GPIO_ACTIVE_HIGH>;
+ detect_pin-gpios = <&gpio GPIOM_27 GPIO_ACTIVE_HIGH>;
+ enable_5v3v_pin-gpios = <&gpio GPIOM_28 GPIO_ACTIVE_HIGH>;
+ enable_pin-gpios = <&gpio GPIOZ_2 GPIO_ACTIVE_HIGH>;
+
+ interrupts = <0 174 1>;
+ interrupt-names = "smc0_irq";
+ /*
+ *Smc clock source, if change this,
+ *you must adjust clk and divider in smartcard.c
+ */
+ smc0_clock_source = <0>;
+ /*0: high voltage on detect pin indicates card in.*/
+ smc0_det_invert = <0>;
+ smc0_5v3v_level = <0>;
+ /*Ordinarily,smartcard controller needs a enable pin.*/
+ smc_need_enable_pin = "yes";
+ reset_level = <0>;
+ smc0_enable_level = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_iso7816_pins>;
+
+ clocks = <&clkc CLKID_SC_CLK>;
+ clock-names = "smartcard";
+ };
+}; /* end of / */
+
+&drm_vpu {
+ status = "okay";
+ logo_addr = "0x3f800000";
+
+ connectors_dev: port@1 {
+ drm_to_lcd0: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&lcd0_to_drm>;
+ };
+ };
+};
+
+&lcd {
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_to_drm: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&drm_to_lcd0>;
+ };
+ };
+ };
+};
+
+&uart_B {
+ status = "okay";
+};
+
+/*if you want to use vdin just modify status to "ok"*/
+&vdin0 {
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ status = "okay";
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ * onebuffer:
+ * worst case:(4096*2160*3 + 2M(afbce issue)) = 27.5M
+ * dw:960x540x3 = 1.5M
+ * total size:(27.5+1.5)x buffernumber
+ */
+ cma_size = <330>;
+ frame_buff_num = <10>;
+};
+
+&vdin1 {
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+};
+
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ //mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+// amlogic,dram-access-quirk;
+
+// mmc-pwrseq = <&emmc_pwrseq>;
+// vmmc-supply = <&vddao_3v3>;
+// vqmmc-supply = <&vddao_1v8>;
+};
+
+&mtd_nand {
+ status = "disabled"; /* disabled as default */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "nand_norb_mod","nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&nand_cs_pins>;
+ bl_mode = <1>;
+ fip_copies = <4>;
+ fip_size = <0x200000>;
+ ship_bad_block = <1>;
+ disa_irq_flag = <1>;
+ nand@bootloader {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-ecc-maximize;
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x00000000>;
+ };
+ };
+ nand@normal {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-ecc-maximize;
+ };
+};
+
+&spi_nfc {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spinf_pins>;
+ spi-nand@0 {
+ compatible = "spi-nand";
+ status = "disabled";
+ reg = <0>;
+ spi-max-frequency = <83000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+ spi-nor@0 {
+ compatible = "spi-nor";
+ status = "disabled";
+ reg = <0>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <83000000>;
+ };
+};
+
+&periphs_pinctrl {
+ /*backlight*/
+ bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+ mux {
+ groups = "pwm_vs_h12";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_off_pins:bl_pwm_off_pin {
+ mux {
+ groups = "GPIOH_12";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+ ST6451D06_3_pins: ST6451D06_3_pin {
+ mux {
+ groups = "tcon_1","tcon_2","tcon_3",
+ "tcon_4","tcon_5","tcon_6",
+ "tcon_8","tcon_lock";
+ function = "tcon";
+ };
+ };
+ ST6451D06_3_off_pins: ST6451D06_3_off_pin {
+ mux {
+ groups = "GPIOH_1","GPIOH_2","GPIOH_3",
+ "GPIOH_4","GPIOH_5","GPIOH_6",
+ "GPIOH_8", "GPIOH_0";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+ ST5461D18_2_pins: ST5461D18_2_pin {
+ mux {
+ groups = "tcon_1","tcon_2","tcon_3",
+ "tcon_4","tcon_5","tcon_6",
+ "tcon_8","tcon_lock";
+ function = "tcon";
+ };
+ };
+ ST5461D18_2_off_pins: ST5461D18_2_off_pin {
+ mux {
+ groups = "GPIOH_1","GPIOH_2","GPIOH_3",
+ "GPIOH_4","GPIOH_5","GPIOH_6",
+ "GPIOH_8","GPIOH_0";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c2_pins2>;
+
+ lcd_extern_i2c0: lcd_extern_i2c@29 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_HV650LS";
+ reg = <0x29>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c1: lcd_extern_i2c@33 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_CS602";
+ reg = <0x33>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c2: lcd_extern_i2c@20 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_CS901";
+ reg = <0x20>;
+ status = "okay";
+ };
+};
+
+ðmac {
+ status = "okay";
+ phy-handle = <&internal_ephy>;
+ phy-mode = "rmii";
+};
+
+&usb_phy20{
+ portnum = <1>;
+ /* Set portspeed to 1 & cfg clks to enable HSP mode. */
+ portspeed = <0x0>; /* 0: HS mode. 1: HSP mode */
+ /* clk src mux.
+ * [0]: HS: normal comb clk. HSP: normal comb clk + 48m soc-digital clk.
+ * [1~3]: 48m clk src selector for HSP mode:
+ * phyclk/soc-digital/soc-analog.
+ * For option 2&3, the clk cfg should be also modified in the dtsi.
+ */
+ clk-mux = <0x0>;
+ status = "okay";
+};
+
+&usb_phy30{
+ status = "okay";
+};
+
+&usb_phy21{
+ gpio-vbus-power = "GPIOC_10";
+ gpios = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ portnum = <1>;
+ status = "okay";
+};
+
+&usb_phy31{
+ status = "okay";
+};
+
+&usb_phy22{
+ portnum = <1>;
+ /* Set portspeed to 1 & cfg clks to enable HSP mode. */
+ portspeed = <0x0>; /* 0: HS mode. 1: HSP mode */
+ /* clk src mux.
+ * [0]: HS: normal comb clk. HSP: normal comb clk + 48m soc-digital clk.
+ * [1~3]: 48m clk src selector for HSP mode:
+ * phyclk/soc-digital/soc-analog.
+ * For option 2&3, the clk cfg should be also modified in the dtsi.
+ */
+ clk-mux = <0x0>;
+ status = "okay";
+};
+
+&usb_phy32{
+ status = "okay";
+};
+
+&crg20_otg{
+ controller-type = <1>; /* 0~3: normal, host, device, otg */
+ status = "okay";
+};
+
+&crg20_drd{
+ status = "okay";
+};
+
+&crg20_udc{
+ status = "okay";
+};
+
+&crg21_host{
+ status = "okay";
+};
+
+&crg22_host{
+ status = "okay";
+};
+
+&spicc0 { //for TCON
+ status = "disabled";/* disabled as default */
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc0_pins_h>;
+};
+
+&spicc1 { //for UWB/LocalDimm
+ status = "disabled";/* disabled as default */
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc1_pins_z>;
+};
+
+&ir {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&remote_pins>;
+};
+
+&ir1 {
+ status = "disabled"; /* disabled as default */
+ pinctrl-names = "default";
+ pinctrl-0 = <&remote_b_pins>;
+};
+
+&dcon_led {
+ status = "okay";
+ led_number = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&dcon_led_pins1>;
+ // polarity-inversed;
+};
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c0_pins1>;
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins1>;
+ clock-frequency = <300000>;
+ ad82120b: ad82120b@6c {
+ compatible = "ESMT,ad82120b";
+ #sound-dai-cells = <0>;
+ reset_pin-gpios = <&gpio GPIOD_9 GPIO_ACTIVE_HIGH>;
+ reg = <0x6c>;
+ status = "disabled";
+ };
+};
+
+&saradc {
+ status = "okay";
+};
+
+&vdac {
+ cdac_disable = <1>;
+};
+
+&amlvecm {
+ compatible = "amlogic, vecm-t6d";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <1>;/*1:enable ;0:disable*/
+ wb_en = <1>;/*1:enable ;0:disable*/
+ cm_en = <1>;/*1:enable ;0:disable*/
+ wb_sel = <0>;/*1:mtx ;0:gainoff*/
+ osd_pic_en = <1>;/*1:enable osd picture setting;0:disable*/
+ vlock_en = <1>;/*1:enable;0:disable*/
+ vlock_mode = <0x8>;
+ vrr_priority = <1>;/*1:game mode vrr always on;0:vrr on depend on vrr signal*/
+ /*vlock work mode:
+ *bit0:auto ENC
+ *bit1:auto PLL
+ *bit2:manual PLL
+ *bit3:manual ENC
+ *bit4:manual soft ENC
+ *bit5:manual MIX PLL ENC
+ */
+ vlock_pll_m_limit = <1>;
+ vlock_line_limit = <2>;
+ interrupts = <0 207 1>;
+ interrupt-names = "lc_curve";
+};
+
+&aml_wifi{
+ status = "okay";
+ power_on-gpios = <&gpio GPIOD_11 GPIO_ACTIVE_HIGH>;
+ disable-wifi-32k;
+};
+
+&aml_bt {
+ status = "okay";
+ bt_en-gpios = <&gpio GPIOD_11 GPIO_ACTIVE_HIGH>;
+ hostwake-gpios = <&gpio GPIOD_13 GPIO_ACTIVE_HIGH>;
+ power_down_disable = <1>;
+};
+
+&tdmb {
+ pinctrl-names = "tdm_pins","tdmout_a_gpio";
+ pinctrl-0 = <
+ &tdmb_pin
+ &tdm_d0_pins
+ &tdmb_clk_pins>;
+ pinctrl-1 = <&tdmout_b_gpio>;
+};
+
+&pdma {
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+};
+
+&spdifa {
+
+ pinctrl-names = "spdif_pins",
+ "spdif_pins_mute";
+ pinctrl-0 = <&spdifout_a>;
+ pinctrl-1 = <&spdifout_a_mute>;
+};
+
+&spdifb {
+ pinctrl-names = "spdif_pins",
+ "spdif_pins_mute";
+ pinctrl-0 = <&spdifout_b>;
+ pinctrl-1 = <&spdifout_b_mute>;
+};
diff --git a/arch/arm64/configs/amlogic_gki.fragment b/arch/arm64/configs/amlogic_gki.fragment
index 2b72e8f..7410ceb 100644
--- a/arch/arm64/configs/amlogic_gki.fragment
+++ b/arch/arm64/configs/amlogic_gki.fragment
@@ -33,6 +33,7 @@
CONFIG_AMLOGIC_DDR_BANDWIDTH_S5=y
CONFIG_AMLOGIC_DDR_BANDWIDTH_S7=y
CONFIG_AMLOGIC_DDR_BANDWIDTH_S6=y
+CONFIG_AMLOGIC_DDR_BANDWIDTH_T6D=y
CONFIG_AMLOGIC_DMC_MONITOR=y
CONFIG_AMLOGIC_DMC_DEV_ACCESS=y
CONFIG_AMLOGIC_DMC_MONITOR_S4=y
@@ -43,6 +44,7 @@
CONFIG_AMLOGIC_DMC_MONITOR_S5=y
CONFIG_AMLOGIC_DMC_MONITOR_S7=y
CONFIG_AMLOGIC_DMC_MONITOR_S6=y
+CONFIG_AMLOGIC_DMC_MONITOR_T6D=y
# amlogic-debug.ko
CONFIG_AMLOGIC_DEBUG=m
@@ -113,6 +115,9 @@
# amlogic-clk-soc-s7d.ko
CONFIG_AMLOGIC_COMMON_CLK_S7D=m
+# amlogic-clk-soc-t6d.ko
+CONFIG_AMLOGIC_COMMON_CLK_T6D=m
+
# amlogic-pinctrl-soc-s4.ko
CONFIG_AMLOGIC_PINCTRL_MESON_S4=m
@@ -152,6 +157,9 @@
# amlogic-pinctrl-soc-s6.ko
CONFIG_AMLOGIC_PINCTRL_MESON_S6=m
+# amlogic-pinctrl-soc-t6d.ko
+CONFIG_AMLOGIC_PINCTRL_MESON_T6D=m
+
# amlogic-secmon.ko
CONFIG_AMLOGIC_SECMON=m
CONFIG_AMLOGIC_DOLBY_FW=y
diff --git a/arch/arm64/configs/daisy_u_common14-5.15_devconfig b/arch/arm64/configs/daisy_u_common14-5.15_devconfig
index b4bc6bd..986c015 100644
--- a/arch/arm64/configs/daisy_u_common14-5.15_devconfig
+++ b/arch/arm64/configs/daisy_u_common14-5.15_devconfig
@@ -1,5 +1,7 @@
# amlogic-amfc.ko
CONFIG_AMLOGIC_AMFC=m
+CONFIG_AMFC_T6D=y
+CONFIG_AMFC_BASE=0xFE092000
# aml-erofs.ko
CONFIG_AMLOGIC_EROFS=m
diff --git a/modules.bzl b/modules.bzl
index 21762f0..3a15f83 100644
--- a/modules.bzl
+++ b/modules.bzl
@@ -43,6 +43,7 @@
"common_drivers/drivers/clk/meson/amlogic-clk-soc-t7.ko",
"common_drivers/drivers/clk/meson/amlogic-clk-soc-tm2.ko",
"common_drivers/drivers/clk/meson/amlogic-clk-soc-s7d.ko",
+ "common_drivers/drivers/clk/meson/amlogic-clk-soc-t6d.ko",
"common_drivers/drivers/cpufreq/amlogic-cpufreq.ko",
"common_drivers/drivers/cpu_info/amlogic-cpuinfo.ko",
"common_drivers/drivers/crypto/amlogic-crypto-dma.ko",
@@ -70,6 +71,7 @@
"common_drivers/drivers/gpio/amlogic-pinctrl-soc-tm2.ko",
"common_drivers/drivers/gpio/amlogic-pinctrl-soc-s7.ko",
"common_drivers/drivers/gpio/amlogic-pinctrl-soc-s7d.ko",
+ "common_drivers/drivers/gpio/amlogic-pinctrl-soc-t6d.ko",
"common_drivers/drivers/host/amlogic-host.ko",
"common_drivers/drivers/hwspinlock/amlogic-hwspinlock.ko",
"common_drivers/drivers/i2c/busses/amlogic-i2c.ko",