aarch32: bring up sc2 for aarch32 [1/1]
PD#SWPL-90403
Problem:
bring up sc2 for aarch32
Solution:
bring up sc2 for aarch32
Verify:
on SC2
Signed-off-by: Lei Zhang <lei.zhang@amlogic.com>
Change-Id: I1ff3e3854357c9ed56b4b2e8f4dfb9c67cc09500
diff --git a/amlogic_utils.sh b/amlogic_utils.sh
index 03d89c5..4aac281 100644
--- a/amlogic_utils.sh
+++ b/amlogic_utils.sh
@@ -2,13 +2,16 @@
function pre_defconfig_cmds() {
export OUT_AMLOGIC_DIR=$(readlink -m ${COMMON_OUT_DIR}/amlogic)
+ if [ "${ARCH}" = "arm" ]; then
+ export PATH=${PATH}:/usr/bin/
+ fi
if [[ ${GKI_CONFIG} == gki ]]; then
- KCONFIG_CONFIG=${ROOT_DIR}/${KERNEL_DIR}/arch/arm64/configs/${DEFCONFIG} ${ROOT_DIR}/${KERNEL_DIR}/scripts/kconfig/merge_config.sh -m -r ${ROOT_DIR}/${KERNEL_DIR}/arch/arm64/configs/gki_defconfig ${ROOT_DIR}/${FRAGMENT_CONFIG}
+ KCONFIG_CONFIG=${ROOT_DIR}/${KERNEL_DIR}/arch/${ARCH}/configs/${DEFCONFIG} ${ROOT_DIR}/${KERNEL_DIR}/scripts/kconfig/merge_config.sh -m -r ${ROOT_DIR}/${GKI_BASE_CONFIG} ${ROOT_DIR}/${FRAGMENT_CONFIG}
elif [[ ${GKI_CONFIG} == gki_user ]]; then
- KCONFIG_CONFIG=${ROOT_DIR}/${KERNEL_DIR}/arch/arm64/configs/${DEFCONFIG} ${ROOT_DIR}/${KERNEL_DIR}/scripts/kconfig/merge_config.sh -m -r ${ROOT_DIR}/${KERNEL_DIR}/arch/arm64/configs/gki_defconfig ${ROOT_DIR}/${FRAGMENT_CONFIG} ${ROOT_DIR}/${FRAGMENT_CONFIG_OPTIMIZE}
+ KCONFIG_CONFIG=${ROOT_DIR}/${KERNEL_DIR}/arch/${ARCH}/configs/${DEFCONFIG} ${ROOT_DIR}/${KERNEL_DIR}/scripts/kconfig/merge_config.sh -m -r ${ROOT_DIR}/${GKI_BASE_CONFIG} ${ROOT_DIR}/${FRAGMENT_CONFIG} ${ROOT_DIR}/${FRAGMENT_CONFIG_OPTIMIZE}
elif [[ ${GKI_CONFIG} == gki_userdebug ]]; then
- KCONFIG_CONFIG=${ROOT_DIR}/${KERNEL_DIR}/arch/arm64/configs/${DEFCONFIG} ${ROOT_DIR}/${KERNEL_DIR}/scripts/kconfig/merge_config.sh -m -r ${ROOT_DIR}/${KERNEL_DIR}/arch/arm64/configs/gki_defconfig ${ROOT_DIR}/${FRAGMENT_CONFIG} ${ROOT_DIR}/${FRAGMENT_CONFIG_OPTIMIZE} ${ROOT_DIR}/${FRAGMENT_CONFIG_DEBUG}
+ KCONFIG_CONFIG=${ROOT_DIR}/${KERNEL_DIR}/arch/${ARCH}/configs/${DEFCONFIG} ${ROOT_DIR}/${KERNEL_DIR}/scripts/kconfig/merge_config.sh -m -r ${ROOT_DIR}/${GKI_BASE_CONFIG} ${ROOT_DIR}/${FRAGMENT_CONFIG} ${ROOT_DIR}/${FRAGMENT_CONFIG_OPTIMIZE} ${ROOT_DIR}/${FRAGMENT_CONFIG_DEBUG}
fi
}
export -f pre_defconfig_cmds
@@ -17,7 +20,7 @@
if [[ ${CHECK_DEFCONFIG} -eq "1" ]]; then
check_defconfig
fi
- rm ${ROOT_DIR}/${KERNEL_DIR}/arch/arm64/configs/${DEFCONFIG}
+ rm ${ROOT_DIR}/${KERNEL_DIR}/arch/${ARCH}/configs/${DEFCONFIG}
}
export -f post_defconfig_cmds
diff --git a/arch/arm/boot/dts/amlogic/Makefile b/arch/arm/boot/dts/amlogic/Makefile
index a00ab83..0645b81 100644
--- a/arch/arm/boot/dts/amlogic/Makefile
+++ b/arch/arm/boot/dts/amlogic/Makefile
@@ -9,3 +9,5 @@
dtb-y += c3_c308l_aw429_256m.dtb
dtb-y += c3_c302x_aw409_128m.dtb
dtb-y += c3_c308l_aw429_128m.dtb
+dtbo-y += android_overlay_dt.dtbo
+dtb-y += sc2_s905x4_ah212_drm.dtb
diff --git a/arch/arm/boot/dts/amlogic/firmware_ab.dtsi b/arch/arm/boot/dts/amlogic/firmware_ab.dtsi
new file mode 100644
index 0000000..c857207
--- /dev/null
+++ b/arch/arm/boot/dts/amlogic/firmware_ab.dtsi
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+/ {
+ firmware {
+ android {
+ compatible = "android,firmware";
+ vbmeta {
+ compatible = "android,vbmeta";
+ parts = "vbmeta,boot,oem,vbmeta_system";
+ by_name_prefix="/dev/block";
+ };
+ };
+ };
+};/* end of / */
diff --git a/arch/arm/boot/dts/amlogic/meson-sc2.dtsi b/arch/arm/boot/dts/amlogic/meson-sc2.dtsi
new file mode 100644
index 0000000..3377dff
--- /dev/null
+++ b/arch/arm/boot/dts/amlogic/meson-sc2.dtsi
@@ -0,0 +1,2783 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/clock/axg-audio-clkc.h>
+#include <dt-bindings/clock/amlogic,sc2-clkc.h>
+#include <dt-bindings/clock/g12a-aoclkc.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/sc2-pd.h>
+#include <dt-bindings/clock/amlogic,sc2-audio-clk.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/meson-sc2-gpio.h>
+#include <dt-bindings/reset/amlogic,meson-sc2-reset.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/meson_ir.h>
+#include <dt-bindings/mailbox/amlogic,mbox.h>
+#include "meson-ir-map.dtsi"
+#include "mesong12a-bifrost.dtsi"
+/ {
+ cpus:cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CPU0:cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55","arm,armv8";
+ reg = <0x0>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
+ dynamic-power-coefficient = <230>;
+ #cooling-cells = <2>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_CLK_DYN>,
+ <&clkc CLKID_SYS_PLL>,
+ <&clkc CLKID_DSU_CLK>,
+ <&clkc CLKID_DSU_CLK_FINAL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent",
+ "dsu_clk",
+ "dsu_pre_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU1:cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55","arm,armv8";
+ reg = <0x100>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
+ dynamic-power-coefficient = <230>;
+ #cooling-cells = <2>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_CLK_DYN>,
+ <&clkc CLKID_SYS_PLL>,
+ <&clkc CLKID_DSU_CLK>,
+ <&clkc CLKID_DSU_CLK_FINAL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent",
+ "dsu_clk",
+ "dsu_pre_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU2:cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55","arm,armv8";
+ reg = <0x200>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
+ dynamic-power-coefficient = <230>;
+ #cooling-cells = <2>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_CLK_DYN>,
+ <&clkc CLKID_SYS_PLL>,
+ <&clkc CLKID_DSU_CLK>,
+ <&clkc CLKID_DSU_CLK_FINAL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent",
+ "dsu_clk",
+ "dsu_pre_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU3:cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55","arm,armv8";
+ reg = <0x300>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
+ dynamic-power-coefficient = <230>;
+ #cooling-cells = <2>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_CLK_DYN>,
+ <&clkc CLKID_SYS_PLL>,
+ <&clkc CLKID_DSU_CLK>,
+ <&clkc CLKID_DSU_CLK_FINAL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent",
+ "dsu_clk",
+ "dsu_pre_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ idle-states {
+ entry-method = "arm,psci-0.2";
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0010000>;
+ local-timer-stop;
+ entry-latency-us = <4000>;
+ exit-latency-us = <5000>;
+ min-residency-us = <10000>;
+ };
+ SYSTEM_SLEEP_0: system-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0000000>;
+ entry-latency-us = <0x3fffffff>;
+ exit-latency-us = <0x40000000>;
+ min-residency-us = <0xffffffff>;
+ };
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 0xff08>,
+ <GIC_PPI 14 0xff08>,
+ <GIC_PPI 11 0xff08>,
+ <GIC_PPI 10 0xff08>;
+ };
+
+ timer_bc {
+ compatible = "amlogic,bc-timer";
+ status = "disabled";
+ reg= <0xfe0100D8 0x4 0xfe0100DC 0x4>;
+ timer_name = "Meson TimerD";
+ clockevent-rating=<300>;
+ clockevent-shift=<20>;
+ clockevent-features=<0x23>;
+ interrupts = <0 3 1>;
+ bit_enable=<7>;
+ bit_mode=<6>;
+ bit_resolution=<0>;
+ resolution_1us=<1>;
+ min_delta_ns=<10>;
+ };
+
+ arm_pmu {
+ compatible = "arm,armv8-pmuv3";
+ private-interrupts;
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
+
+ reg = <0xff634680 0x4>;
+ cpumasks = <0xf>;
+ /* default 10ms */
+ relax-timer-ns = <10000000>;
+ /* default 10000us */
+ max-wait-cnt = <10000>;
+ };
+
+ gic: interrupt-controller@fff01000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0xfff01000 0x1000>,
+ <0xfff02000 0x0100>;
+ interrupts = <GIC_PPI 9 0xf04>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ meson_suspend:pm {
+ compatible = "amlogic, pm";
+ status = "disabled";
+ device_name = "aml_pm";
+ reg = <0xfe010288 0x4>, /*SYSCTRL_STATUS_REG2*/
+ <0xfe0102dc 0x4>; /*SYSCTRL_STICKY_REG7*/
+ };
+
+ cpu_info {
+ compatible = "amlogic, cpuinfo";
+ status = "okay";
+ cpuinfo_cmd = <0x82000044>;
+ };
+
+ soc_info {
+ compatible = "amlogic, socdata";
+ reg= <0xfe010000 0x8>,
+ <0xfe010180 0x4>,
+ <0xfe440070 0x4>;
+ read_nocsdata_cmd =<0x82000039>;
+ write_nocsdata_cmd=<0x82000038>;
+ auth_reg_ops_cmd=<0x820000f0>;
+ };
+
+ aml_reboot {
+ compatible = "aml, reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+ dis_nb_cpus_in_shutdown;
+ reg = <0xfe01037c 0x4>; /* SYSCTRL_SEC_STATUS_REG31 */
+ status = "okay";
+ };
+
+ ram-dump {
+ compatible = "amlogic, ram_dump";
+ status = "disabled";
+ reg = <0xFE0102D8 4>;
+ reg-names = "SYSCTRL_STICKY_REG6";
+ store_device = "data";
+ };
+
+ secmon {
+ compatible = "amlogic, secmon";
+ memory-region = <&secmon_reserved>;
+ in_base_func = <0x82000020>;
+ out_base_func = <0x82000021>;
+ inout_size_func = <0x8200002a>;
+ reserve_mem_size = <0x03300000>;
+ };
+
+ cma_shrinker: cma_shrinker {
+ compatible = "amlogic, cma-shrinker";
+ status = "disabled";
+ adj = <0 100 200 250 900 950>;
+ free = <8192 12288 16384 24576 28672 32768>;
+ };
+
+ dolby_fw: dolby_fw {
+ compatible = "amlogic, dolby_fw";
+ mem_size = <0x100000>;
+ status = "okay";
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+
+ vrtc: rtc@0xfe010288 {
+ compatible = "amlogic,meson-vrtc";
+ reg = <0xfe010288 0x4>;
+ status = "okay";
+ mboxes = <&mbox_mhu_fifo 3>;
+ };
+
+ audio_data: audio_data {
+ compatible = "amlogic, audio_data";
+ mem_in_base_cmd = <0x82000020>;
+ query_licence_cmd = <0x82000050>;
+ status = "disabled";
+ };
+
+ amaudio: amaudio {
+ compatible = "amlogic, amaudio";
+ reg = <0xfe440000 0x10000>;
+ reg-names = "otp_tee_base";
+ status = "okay";
+ };
+
+ pwrdm: power-domains {
+ compatible = "amlogic,sc2-power-domain";
+ #power-domain-cells = <1>;
+ status = "okay";
+ };
+
+ jtag {
+ compatible = "amlogic, jtag";
+ status = "okay";
+ select = "disable"; /* disable/jtag_a/jtag_b */
+ pinctrl-names="jtag_a_pins", "jtag_b_pins";
+ pinctrl-0=<&jtag_a_pins>;
+ pinctrl-1=<&jtag_b_pins>;
+ };
+
+ ddr-scrambler@0xfe02e030 {
+ compatible = "amlogic, ddr-scrambler-preserve";
+ reg = <0xfe02e030 0x4>;
+ };
+
+ mbox_mhu_fifo: mhu@0 {
+ status = "ok";
+ compatible = "amlogic, meson_mhu_fifo";
+ reg = <0xfe006000 0x800>, /* mhu wr fifo */
+ <0xfe006800 0x800>, /* mhu rd fifo */
+ <0xfe0070c0 0x40>, /* mhu set reg */
+ <0xfe007100 0x40>, /* mhu clr reg */
+ <0xfe007140 0x40>, /* mhu sts reg */
+ <0xfe007020 0x40>; /* mhu irqctrl reg */
+ interrupts = <0 248 1>; /* irq top */
+ mbox-irqctlr = <0>;
+ mbox-nums = <4>;
+ mbox-names = "dsp_dev",
+ "ap_to_dspa",
+ "ao_dev",
+ "ap_to_ao";
+ mboxes = <&mbox_mhu_fifo 0>,
+ <&mbox_mhu_fifo 1>,
+ <&mbox_mhu_fifo 2>,
+ <&mbox_mhu_fifo 3>;
+ mbox-id = <0x0 0x1 0x2 0x3>;
+ #mbox-cells = <1>;
+ };
+
+ mbox_mhu_sec: mhu_sec@0xfe441800 {
+ status = "disabled";
+ compatible = "amlogic, meson_mhu_sec";
+ reg = <0xfe441800 0x10>, /* nee2scpu csr */
+ <0xfe441c00 0x10>, /* scpu2nee csr */
+ <0xfe441a00 0x80>, /* nee2scpu st */
+ <0xfe441e00 0x80>; /* scpu2nee st*/
+ interrupts = <0 49 1>; /* irq ree */
+ mbox-nums = <2>;
+ mbox-names = "nee2scpu",
+ "scpu2nee";
+ #mbox-cells = <1>;
+ };
+
+ mbox_user: mbox-user@0 {
+ status = "ok";
+ compatible = "amlogic, meson-mbox-user";
+ mbox-nums = <2>;
+ mbox-names = "nee2scpu",
+ "ree2aocpu";
+ mboxes = <&mbox_mhu_sec 0>,
+ <&mbox_mhu_fifo 3>;
+ mbox-dests = <MAILBOX_SECPU>,
+ <MAILBOX_AOCPU>;
+ };
+
+ vddcpu0: pwm_j-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm_ij MESON_PWM_1 1500 0>;
+ regulator-name = "vddcpu0";
+ regulator-min-microvolt = <689000>;
+ regulator-max-microvolt = <1049000>;
+ regulator-always-on;
+ max-duty-cycle = <1500>;
+ /* Voltage Duty-Cycle */
+ voltage-table = <1049000 0>,
+ <1039000 3>,
+ <1029000 6>,
+ <1019000 9>,
+ <1009000 12>,
+ <999000 14>,
+ <989000 17>,
+ <979000 20>,
+ <969000 23>,
+ <959000 26>,
+ <949000 29>,
+ <939000 31>,
+ <929000 34>,
+ <919000 37>,
+ <909000 40>,
+ <899000 43>,
+ <889000 45>,
+ <879000 48>,
+ <869000 51>,
+ <859000 54>,
+ <849000 56>,
+ <839000 59>,
+ <829000 62>,
+ <819000 65>,
+ <809000 68>,
+ <799000 70>,
+ <789000 73>,
+ <779000 76>,
+ <769000 79>,
+ <759000 81>,
+ <749000 84>,
+ <739000 87>,
+ <729000 89>,
+ <719000 92>,
+ <709000 95>,
+ <699000 98>,
+ <689000 100>;
+ status = "okay";
+ };
+
+ cpu_opp_table0: cpu_opp_table0 {
+ compatible = "operating-points-v2";
+ status = "okay";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <779000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <779000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <779000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <666666666>;
+ opp-microvolt = <799000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <799000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <809000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1404000000>;
+ opp-microvolt = <839000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <849000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <879000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <919000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <959000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <1908000000>;
+ opp-microvolt = <989000>;
+ };
+ opp12 {
+ opp-hz = /bits/ 64 <2004000000>;
+ opp-microvolt = <1019000>;
+ };
+ };
+
+ cpufreq-meson {
+ compatible = "amlogic, cpufreq-meson";
+ status = "okay";
+ };
+
+ saradc: saradc@fe026000 {
+ compatible = "amlogic,meson-g12a-saradc",
+ "amlogic,meson-saradc";
+ status = "disabled";
+ #io-channel-cells = <1>;
+ clocks = <&xtal>,
+ <&clkc CLKID_SAR_ADC>,
+ <&clkc CLKID_SARADC_GATE>,
+ <&clkc CLKID_SARADC_MUX>;
+ clock-names = "clkin", "core",
+ "adc_clk", "adc_sel";
+ interrupts = <GIC_SPI 181 IRQ_TYPE_EDGE_RISING>;
+ reg = <0xfe026000 0x48>;
+ };
+
+ hifi4dsp: hifi4dsp {
+ compatible = "amlogic, hifi4dsp";
+ memory-region = <&dsp_fw_reserved>;
+ reg = <0xfe340000 0x114>; /*dspa base address*/
+ clocks = <&clkc CLKID_DSPA_CLK>;
+ clock-names = "dspa_clk";
+ power-domains = <&pwrdm PDID_SC2_DSP>;
+ dspa_clkfreq = <500000000>;
+ dsp-start-mode = <1>; /*0:scpi start mode,1:smc start mode*/
+ dsp-cnt = <1>;
+ dspaoffset = <0>;
+ dspboffset = <0x800000>;
+ reservesize = <0x800000>;
+ bootlocation = <1>; /*1: boot from DDR, 2: from sram, 3...*/
+ boot_sram_addr = <0xfff00000>;
+ boot_sram_size = <0x80000>;
+ status = "okay";
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ apb4: apb4@fe000000 {
+ compatible = "simple-bus";
+ reg = <0xfe000000 0x480000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xfe000000 0x480000>;
+
+ clkc: clock-controller {
+ compatible = "amlogic,sc2-clkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x49c>,
+ <0x8000 0x2e8>,
+ <0xe140 0x24>;
+ reg-names = "basic", "pll",
+ "cpu_clk";
+ clocks = <&xtal>;
+ clock-names = "xtal";
+ status = "okay";
+ };
+
+ meson_clk_msr@48000 {
+ compatible = "amlogic,meson-sc2-clk-measure";
+ reg = <0x48000 0x1c>;
+ };
+
+ watchdog@2100 {
+ compatible = "amlogic,meson-sc2-wdt";
+ /* 0:userspace, 1:kernel */
+ amlogic,feed_watchdog_mode = <1>;
+ reg = <0x2100 0x10>;
+ clocks = <&xtal>;
+ };
+
+ periphs_pinctrl: pinctrl@4000 {
+ compatible = "amlogic,meson-sc2-periphs-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio: bank@4000 {
+ reg = <0x4000 0x004c>,
+ <0x40c0 0x0220>;
+ reg-names = "mux", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&periphs_pinctrl 0 0 87>;
+ };
+ };
+
+ gpio_intc: interrupt-controller@4080 {
+ compatible = "amlogic,meson-sc2-gpio-intc",
+ "amlogic,meson-gpio-intc";
+ reg = <0x4080 0x20>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ amlogic,channel-interrupts =
+ <10 11 12 13 14 15 16 17 18 19 20 21>;
+ };
+
+ spicc0: spi@50000 {
+ compatible = "amlogic,meson-g12-spicc";
+ reg = <0x50000 0x44>;
+ interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC0>,
+ <&clkc CLKID_SPICC0_GATE>;
+ clock-names = "core", "async";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spicc1: spi@52000 {
+ compatible = "amlogic,meson-g12-spicc";
+ reg = <0x52000 0x44>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC1>,
+ <&clkc CLKID_SPICC1_GATE>;
+ clock-names = "core", "async";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spifc: spi@56000 {
+ compatible = "amlogic,meson-spifc";
+ reg = <0x56000 0x290>;
+ clock-names = "clk81";
+ clocks = <&clkc CLKID_SPIFC>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ pwm_ab: pwm@58000 {
+ compatible = "amlogic,meson-v2-pwm";
+ reg = <0x58000 0x24>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_A_GATE>,
+ <&clkc CLKID_PWM_B_GATE>;
+ clock-names = "clkin0", "clkin1";
+ status = "disabled";
+ };
+
+ pwm_cd: pwm@5a000 {
+ compatible = "amlogic,meson-v2-pwm";
+ reg = <0x5a000 0x24>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_C_GATE>,
+ <&clkc CLKID_PWM_D_GATE>;
+ clock-names = "clkin0", "clkin1";
+ status = "disabled";
+ };
+
+ pwm_ef: pwm@5c000 {
+ compatible = "amlogic,meson-v2-pwm";
+ reg = <0x5c000 0x24>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_E_GATE>,
+ <&clkc CLKID_PWM_F_GATE>;
+ clock-names = "clkin0", "clkin1";
+ status = "disabled";
+ };
+
+ pwm_gh: pwm@5e000 {
+ compatible = "amlogic,meson-v2-pwm";
+ reg = <0x5e000 0x24>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_G_GATE>,
+ <&clkc CLKID_PWM_H_GATE>;
+ clock-names = "clkin0", "clkin1";
+ status = "disabled";
+ };
+
+ pwm_ij: pwm@60000 {
+ compatible = "amlogic,meson-v2-pwm";
+ reg = <0x60000 0x24>;
+ #pwm-cells = <3>;
+ clocks = <&clkc CLKID_PWM_I_GATE>,
+ <&clkc CLKID_PWM_J_GATE>;
+ clock-names = "clkin0", "clkin1";
+ status = "okay";
+ };
+
+ i2c0: i2c@66000 {
+ compatible = "amlogic,meson-i2c";
+ reg = <0x66000 0x48>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C_M_A>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@68000 {
+ compatible = "amlogic,meson-i2c";
+ reg = <0x68000 0x48>;
+ interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C_M_B>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@6a000 {
+ compatible = "amlogic,meson-i2c";
+ reg = <0x6a000 0x48>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C_M_C>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@6c000 {
+ compatible = "amlogic,meson-i2c";
+ reg = <0x6c000 0x48>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C_M_D>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@6e000 {
+ compatible = "amlogic,meson-i2c";
+ reg = <0x6e000 0x48>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C_M_E>;
+ status = "disabled";
+ };
+
+ uart_B: serial@7a000 {
+ compatible = "amlogic,meson-uart";
+ reg = <0x7a000 0x18>;
+ interrupts = <0 169 1>;
+ status = "okay";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ xtal_tick_en = <2>;
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ /*pinctrl-0 = <&ao_uart_pins>;*/
+ support-sysrq = <1>; /* 0 not support*/
+ };
+
+ eth_phy: mdio-multiplexer@28000 {
+ compatible = "amlogic,g12a-mdio-mux";
+ reg = <0x28000 0xa4>;
+
+ clocks = <&clkc CLKID_ETHPHY>,
+ <&xtal>,
+ <&clkc CLKID_MPLL_50M>;
+ clock-names = "pclk", "clkin0", "clkin1";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enet_type = <5>;
+ tx_amp_src = <0xFE010330>;
+
+ ext_mdio: mdio@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ int_mdio: mdio@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ internal_ephy: ethernet_phy@8 {
+ compatible = "ethernet-phy-id0180.3301",
+ "ethernet-phy-ieee802.3-c22";
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <8>;
+ max-speed = <100>;
+ };
+ };
+ };
+
+ reset: reset-controller@2000 {
+ compatible = "amlogic,meson-sc2-reset";
+ reg = <0x2000 0x98>;
+ #reset-cells = <1>;
+ };
+
+ cpu_version {
+ compatible = "amlogic,meson-gx-ao-secure", "syscon";
+ reg=<0x10220 0x140>;
+ amlogic,has-chip-id;
+ };
+ };
+
+ usb2_phy_v2: usb2phy@fe03a000 {
+ compatible = "amlogic,amlogic-new-usb2-v2";
+ status = "disable";
+ #phy-cells = <0>;
+ reg = <0xfe03a000 0x80
+ 0xFE002000 0x100
+ 0xfe03c000 0x2000
+ 0xfe03e000 0x2000>;
+ pll-setting-1 = <0x09400414>;
+ pll-setting-2 = <0x927E0000>;
+ pll-setting-3 = <0xac5f69e5>;
+ pll-setting-4 = <0xfe18>;
+ pll-setting-5 = <0x8000fff>;
+ pll-setting-6 = <0x78000>;
+ pll-setting-7 = <0xe0004>;
+ pll-setting-8 = <0xe000c>;
+ version = <2>;
+ power-domains = <&pwrdm PDID_SC2_USB_COMB>;
+ phy20-reset-level-bit = <8>;
+ phy21-reset-level-bit = <9>;
+ usb-reset-bit = <4>;
+ reset-level = <0x40>;
+ };
+
+ usb3_phy_v2: usb3phy@fe03a080 {
+ compatible = "amlogic,amlogic-new-usb3-v2";
+ status = "disable";
+ #phy-cells = <0>;
+ reg = <0xfe03a080 0x20
+ 0xfe002000 0x100>;
+ phy-reg = <0xfe02a000>;
+ phy-reg-size = <0x2000>;
+ usb2-phy-reg = <0xfe03a000>;
+ usb2-phy-reg-size = <0x80>;
+ clocks = <&clkc CLKID_PCIE_PLL
+ &clkc CLKID_PCIE_BGP>;
+ clock-names = "pcie_refpll",
+ "pcie_bgp";
+ interrupts = <0 129 4>;
+ };
+
+ dwc3: dwc3@fde00000 {
+ compatible = "snps,dwc3";
+ status = "disable";
+ reg = <0xfde00000 0x100000>;
+ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+ snps,dis_u2_susphy_quirk;
+ snps,quirk-frame-length-adjustment;
+ usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>;
+ clocks = <&clkc CLKID_USB>;
+ clock-names = "usb_general";
+ /*usb5v-supply = <&ao_5v>;*/
+ /*usb3v3-supply = <&vddao_3v3>;*/
+ /*usb1v8-supply = <&vddio_ao1v8>;*/
+ };
+
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+ amlogic_codec:t9015{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, sc2_codec_T9015";
+ reg = <0xFE01A000 0x2000>;
+ tocodec_inout = <1>;
+ tdmout_index = <1>;
+ ch0_sel = <0>;
+ ch1_sel = <1>;
+
+ reset-names = "acodec";
+ resets = <&reset RESET_ACODEC>;
+
+ status = "okay";
+ };
+
+ audiobus: audiobus@0xFE330000 {
+ compatible = "amlogic, audio-controller", "simple-bus";
+ reg = <0xFE330000 0x3000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xFE330000 0x3000>;
+ chip_id = <0x32>;
+ power-domains = <&pwrdm PDID_SC2_AUDIO>;
+
+ clkaudio: audio_clocks {
+ compatible = "amlogic, sc2-audio-clocks";
+ #clock-cells = <1>;
+ reg = <0x0 0xb0>;
+ };
+ ddr_manager {
+ compatible =
+ "amlogic, tm2-revb-audio-ddr-manager";
+ interrupts = <
+ GIC_SPI 32 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 33 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 34 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 45 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 36 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 37 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 38 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 46 IRQ_TYPE_EDGE_RISING
+ >;
+ interrupt-names =
+ "toddr_a", "toddr_b", "toddr_c",
+ "toddr_d",
+ "frddr_a", "frddr_b", "frddr_c",
+ "frddr_d";
+ };
+
+ pinctrl_audio: pinctrl {
+ compatible = "amlogic, audio-pinctrl";
+ };
+ };/* end of audiobus*/
+
+ /* eARC */
+ audio_earc: bus@fe333000 {
+ compatible = "simple-bus";
+ reg = <0xfe333000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xfe333000 0x1000>;
+
+ earc: earc@0 {
+ compatible = "amlogic, tm2-revb-snd-earc";
+ #sound-dai-cells = <0>;
+
+ status = "disabled";
+
+ reg =
+ <0x800 0x400>,
+ <0xc00 0x200>,
+ <0xe00 0x200>;
+ reg-names =
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_top";
+
+ clocks = < &clkaudio CLKID_EARCRX_CMDC
+ &clkaudio CLKID_EARCRX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_EARCTX_CMDC
+ &clkaudio CLKID_EARCTX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_MPLL1
+ >;
+ clock-names =
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_cmdc_srcpll",
+ "rx_dmac_srcpll";
+
+ interrupts = <
+ GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "earc_rx";
+ };
+ };
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, snd-iomap";
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ pdm_bus {
+ reg = <0xFE331000 0x400>;
+ };
+ audiobus_base {
+ reg = <0xFE330000 0x1000>;
+ };
+ audiolocker_base {
+ reg = <0xFE331400 0x400>;
+ };
+ eqdrc_base {
+ reg = <0xFE332000 0x1000>;
+ };
+ vad_base {
+ reg = <0xFE331800 0x400>;
+ };
+ resampleA_base {
+ reg = <0xFE331c00 0x104>;
+ };
+ resampleB_base {
+ reg = <0xFE334000 0x104>;
+ };
+ };
+
+ dwc2_a: dwc2_a@fdd00000 {
+ compatible = "amlogic,dwc2";
+ status = "disable";
+ device_name = "dwc2_a";
+ reg = <0xfdd00000 0x100000>;
+ interrupts = <0 131 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+ port-dma = <0>;
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "v2";
+ phy-reg = <0xfe03a000>;
+ phy-reg-size = <0xa0>;
+ /** phy-interface: 0x0: amlogic phy, 0x1: synopsys phy **/
+ phy-interface = <0x2>;
+ clocks = <&clkc CLKID_USB
+ &clkc CLKID_USB1_TO_DDR>;
+ clock-names = "usb_general",
+ "usb1";
+ };
+
+ pcie: pcie@f5000000 {
+ compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
+ reg = <0xf5000000 0x400000
+ 0xfe02c000 0x2000
+ 0xf5400000 0x200000
+ 0xfe02a000 0x2000
+ 0xfe002044 0x10>;
+ reg-names = "elbi", "cfg", "config", "phy", "reset";
+ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0 0xf5600000 0x0 0x100000
+ /* downstream I/O */
+ 0x82000000 0 0xf5700000 0x0 0xf5700000 0 0x1900000>;
+ /* non-prefetchable memory */
+ linux,pci-domain = <0>;
+ num-lanes = <1>;
+ pcie-num = <1>;
+ max-link-speed = <2>;
+
+ clocks = <&clkc CLKID_PCIE_PLL
+ &clkc CLKID_PCIE
+ &clkc CLKID_PCIE_PHY
+ &clkc CLKID_PCIE_HCSL>;
+ clock-names = "pcie_refpll",
+ "pcie",
+ "pcie_phy",
+ "pcie_hcsl";
+ /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/
+ gpio-type = <2>;
+ pcie-apb-rst-bit = <14>;
+ pcie-phy-rst-bit = <13>;
+ pcie-ctrl-rst-bit = <12>;
+ pwr-ctl = <0>;
+ power-domains = <&pwrdm PDID_SC2_PCIE>;
+ status = "disabled";
+ };
+
+ sd_emmc_c: mmc@fe08c000 {
+ compatible = "amlogic,meson-axg-mmc";
+ reg = <0xfe08c000 0x800>,
+ <0xfe000168 0x4>,
+ <0xfe004000 0x4>;
+ interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>;
+ status = "okay";
+ clocks = <&clkc CLKID_NAND>,
+ <&clkc CLKID_SD_EMMC_C_CLK_MUX>,
+ <&clkc CLKID_SD_EMMC_C_CLK>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV2P5>;
+ clock-names = "core", "mux0", "mux1",
+ "clkin0", "clkin1", "clkin2";
+ no-sdio;
+ no-sd;
+ card_type = <1>;
+ tx_delay = <22>;
+ mmc_debug_flag;
+ // resets = <&reset RESET_SD_EMMC_C>;
+ };
+
+ sd_emmc_b: sd@fe08a000 {
+ compatible = "amlogic,meson-axg-mmc";
+ reg = <0xfe08a000 0x800>,
+ <0xfe000164 0x4>,
+ <0xfe004024 0x4>;
+ interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_CLK_MUX>,
+ <&clkc CLKID_SD_EMMC_B_CLK>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "mux0", "mux1",
+ "clkin0", "clkin1";
+ card_type = <5>;
+ mmc_debug_flag;
+ no-mmc;
+ no-sdio;
+ //resets = <&reset RESET_SD_EMMC_B>;
+ };
+
+ sd_emmc_a: sdio@fe088000 {
+ compatible = "amlogic,meson-axg-mmc";
+ reg = <0xfe088000 0x800>,
+ <0xfe000164 0x4>,
+ <0xfe00400c 0x4>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+ clocks = <&clkc CLKID_SD_EMMC_A>,
+ <&clkc CLKID_SD_EMMC_A_CLK_MUX>,
+ <&clkc CLKID_SD_EMMC_A_CLK>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "mux0", "mux1",
+ "clkin0", "clkin1";
+ card_type = <3>;
+ mmc_debug_flag;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ no-mmc;
+ no-sd;
+ //resets = <&reset RESET_SD_EMMC_A>;
+ };
+
+ mtd_nand: nfc@fe08c800 {
+ compatible = "amlogic,meson-nfc-full-ecc-bl2ex";
+ status = "disabled";
+ reg = <0xfe08c800 0x200>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_EDGE_RISING>;
+
+ clocks = <&clkc CLKID_NAND>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "gate", "fdiv2pll";
+ nand_clk_ctrl = <0xfe08c000>;
+ };
+
+ ethmac: ethernet@fdc00000 {
+ compatible = "amlogic,meson-axg-dwmac",
+ "snps,dwmac-3.70a",
+ "snps,dwmac";
+ reg = <0xfdc00000 0x10000>,
+ <0xfe024000 0x8>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ power-domains = <&pwrdm PDID_SC2_ETH>;
+ clocks = <&clkc CLKID_ETH>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_MPLL2>;
+ clock-names = "stmmaceth", "clkin0", "clkin1";
+ rx-fifo-depth = <4096>;
+ tx-fifo-depth = <2048>;
+ mc_val = <0x4BE0C>;
+ status = "disabled";
+
+ mdio0: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ };
+ };
+
+ uart_A: serial@fe078000 {
+ compatible = "amlogic,meson-uart";
+ reg = <0xfe078000 0x18>;
+ interrupts = <0 168 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART_A>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ xtal_tick_en = <3>;
+ fifosize = < 128 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins1>;
+ };
+
+ uart_C: serial@fe07c000 {
+ compatible = "amlogic,meson-uart";
+ reg = <0xfe07c000 0x18>;
+ interrupts = <0 170 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART_C>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins>;
+ };
+
+ uart_D: serial@fe07e000 {
+ compatible = "amlogic,meson-uart";
+ status = "disabled";
+ reg = <0xfe07e000 0x18>;
+ interrupts = <0 171 1>;
+ clocks = <&xtal
+ &clkc CLKID_UART_D>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&d_uart_pins1>;
+ };
+
+ uart_E: serial@fe080000 {
+ compatible = "amlogic,meson-uart";
+ status = "okay";
+ reg = <0xfe080000 0x18>;
+ interrupts = <0 172 1>;
+ clocks = <&xtal
+ &clkc CLKID_UART_E>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&e_uart_pins>;
+ };
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVCF_MUX
+ &clkc CLKID_HEVCB_MUX>;
+ clock-names = "vdec",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevcf_mux",
+ "clk_hevcb_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec-pm-pd";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 91 1
+ 0 92 1
+ 0 93 1
+ 0 72 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2",
+ "parser_b";
+ power-domains = <&pwrdm PDID_SC2_DOS_VDEC>,
+ <&pwrdm PDID_SC2_DOS_HCODEC>,
+ <&pwrdm PDID_SC2_DOS_HEVC>;
+ power-domain-names = "pwrc-vdec",
+ "pwrc-hcodec",
+ "pwrc-hevc";
+ };
+
+ vcodec_dec {
+ compatible = "amlogic, vcodec-dec";
+ dev_name = "aml-vcodec-dec";
+ status = "okay";
+ };
+
+ ddr_bandwidth {
+ compatible = "amlogic,ddr-bandwidth-sc2";
+ status = "okay";
+ reg = <0xfe0360C0 0x100
+ 0xfe036c00 0x100>;
+ interrupts = <0 62 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ddr_bandwidth";
+ };
+ dmc_monitor {
+ compatible = "amlogic,dmc_monitor-sc2";
+ status = "okay";
+ reg = <0xfe036000 0x100>;
+ reg_base = <0xfe036000>;
+ interrupts = <0 62 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ amhdmitx: amhdmitx{
+ compatible = "amlogic, amhdmitx-sc2";
+ dev_name = "amhdmitx";
+ status = "disabled";
+ vend-data = <&vend_data>;
+ pinctrl-names="default";
+ pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "hdmi_vapb_clk",
+ "hdmi_vpu_clk";
+ /* refer to sc2-system-registers.docx */
+ interrupts = <0 204 4
+ 0 197 1>;
+ interrupt-names = "hdmitx_hpd", "viu1_vsync";
+ /* refer to hdmi_tx_module.h */
+ ic_type = <15>;
+ reg = <0x00000000 0x000>, /* reserved */
+ <0xff000000 0x40000>,
+ <0x00000000 0x000>, /* reserved */
+ <0xfe308000 0x8000>,
+ <0xfe300000 0x8000>,
+ <0xfe032000 0x100>,
+ <0xfe008000 0x400>,
+ <0xfe00c000 0x800>,
+ <0xfe002000 0x400>,
+ <0xfe010000 0x100>,
+ <0xfe000000 0x2000>;
+ reg-names = "cbus",
+ "vpu",
+ "hiu",
+ "hdmitxdwc",
+ "hdmitxtop",
+ "esm",
+ "anactrl",
+ "pwrctrl",
+ "resetctrl",
+ "sysctrl",
+ "clkctrl";
+
+ vend_data: vend_data{ /* Should modified by Customer */
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
+ /* standards.ieee.org/develop/regauth/oui/oui.txt */
+ vendor_id = <0x000000>;
+ };
+
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmitx_to_drm: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <0>;
+ };
+ };
+ };
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-sc2";
+ dev_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0xffffff>;
+ product_desc = "SC2"; /* Max Chars: 16 */
+ cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
+ cec_version = <5>;/*5:1.4;6:2.0*/
+ port_num = <1>;
+ output = <1>;
+ cec_sel = <1>;/*1:use one ip, 2:use 2 ip*/
+ ee_cec;
+ arc_port_mask = <0x1>;
+ interrupts = <GIC_SPI 180 IRQ_TYPE_EDGE_RISING/*0:snps*/
+ GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;/*1:ts*/
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&eecec_a>;
+ pinctrl-1=<&eecec_b>;
+ pinctrl-2=<&eecec_b>;
+ clocks = <&clkc CLKID_CECA_32K_CLKOUT>,
+ <&clkc CLKID_CECB_32K_CLKOUT>;
+ clock-names = "ceca_clk","cecb_clk";
+ reg = <0xfe044000 0x2ff
+ 0xfe010000 0xfff
+ 0xfe000000 0xfff>;
+ reg-names = "ao","periphs","clock"/*ao_exit hdmirx hhi*/;
+ };
+
+ aml_dma {
+ compatible = "amlogic,aml_txlx_dma";
+ reg = <0xfe440400 0x48>;
+ interrupts = <0 24 1>;
+
+ aml_aes {
+ compatible = "amlogic,aes_g12a_dma";
+ dev_name = "aml_aes_dma";
+ status = "okay";
+ iv_swap = /bits/ 8 <0x0>;
+ };
+
+ aml_sha {
+ compatible = "amlogic,sha_dma";
+ dev_name = "aml_sha_dma";
+ status = "okay";
+ };
+
+ aml_tdes {
+ compatible = "amlogic,des_dma,tdes_dma";
+ dev_name = "aml_tdes_dma";
+ status = "okay";
+ };
+
+ crypto {
+ compatible = "amlogic,crypto_sc2";
+ dev_name = "aml_crypto_dev";
+ status = "okay";
+ thread = /bits/ 8 <0x5>;
+ interrupts = <0 29 1>;
+ };
+ };
+
+ rng {
+ compatible = "amlogic,meson-rng";
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0xfe440788 0x0c>;
+ quality = /bits/ 16 <1000>;
+ version = <2>;
+ };
+
+ canvas: canvas{
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "okay";
+ reg = <0xfe036048 0x2000>;
+ };
+
+ codec_io: codec_io {
+ compatible = "amlogic, meson-sc2, codec-io";
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ reg = <0xfe002000 0x2000>,
+ <0xfe320000 0x10000>,
+ <0x0 0x0>,
+ <0x0 0x00>,
+ <0xff000000 0x40000>,
+ <0xfe036000 0x2000>,
+ <0x0 0x0>;
+ reg-names = "cbus",
+ "dosbus",
+ "hiubus",
+ "aobus",
+ "vcbus",
+ "dmcbus",
+ "efusebus";
+ };
+
+ amvenc_avc{
+ compatible = "amlogic, amvenc_avc";
+ dev_name = "amvenc_avc";
+ status = "okay";
+ clocks = <&clkc CLKID_HCODEC_P0>;
+ clock-names = "cts_hcodec_aclk";
+ interrupts = <0 93 1>;
+ interrupt-names = "mailbox_2";
+ reset-names = "hcodec_rst";
+ resets = <&reset RESET_BRG_HCODEC_PIPL0>;
+ };
+ jpegenc{
+ compatible = "amlogic, jpegenc";
+ dev_name = "jpegenc";
+ status = "okay";
+ clocks = <&clkc CLKID_HCODEC_P0>;
+ clock-names = "clk_jpeg_enc";
+ interrupts = <0 93 1>;
+ interrupt-names = "mailbox_2";
+ reset-names = "jpegenc_rst";
+ resets = <&reset RESET_BRG_HCODEC_PIPL0>;
+ };
+ hevc_enc{
+ compatible = "cnm, HevcEnc";
+ //memory-region = <&hevc_enc_reserved>;
+ dev_name = "HevcEnc";
+ status = "okay";
+ interrupts = <0 94 1>;
+ interrupt-names = "wave420l_irq";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&clkc CLKID_WAVE_A_GATE
+ &clkc CLKID_WAVE_B_GATE
+ &clkc CLKID_WAVE_C_GATE>;
+ clock-names = "cts_wave420_aclk",
+ "cts_wave420_bclk",
+ "cts_wave420_cclk";
+ ranges;
+ io_reg_base{
+ reg = <0xfe310000 0x4000>;
+ };
+ };
+ vpu: vpu {
+ compatible = "amlogic, vpu-sc2";
+ status = "okay";
+ reg = <0xfe000000 0x100 /* clk */
+ 0xfe00c000 0x70 /* pwrctrl */
+ 0xff000000 0xa000>; /* vcbus */
+ clocks = <&clkc CLKID_VAPB>,
+ <&clkc CLKID_VPU_INTR>,
+ <&clkc CLKID_VPU_0>,
+ <&clkc CLKID_VPU_1>,
+ <&clkc CLKID_VPU>;
+ clock-names = "vapb_clk",
+ "vpu_intr_gate",
+ "vpu_clk0",
+ "vpu_clk1",
+ "vpu_clk";
+ clk_level = <7>;
+ /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
+ /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
+ };
+
+ rdma{
+ compatible = "amlogic, meson-sc2, rdma";
+ status = "okay";
+ interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "rdma";
+ /* after sc2 */
+ reset-names = "rdma";
+ resets = <&reset RESET_RDMA>;
+ };
+
+ vclk_serve: vclk_serve {
+ compatible = "amlogic, vclk_serve";
+ status = "okay";
+ reg = <0xfe008000 0x300 /* ana reg */
+ 0xfe000000 0x4a0>; /* clk reg */
+ };
+
+ vdac {
+ compatible = "amlogic, vdac-sc2";
+ status = "okay";
+ };
+
+ vout: vout {
+ compatible = "amlogic, vout";
+ status = "okay";
+
+ /* fr_policy:
+ * 0: disable
+ * 1: nearby (only for 60->59.94 and 30->29.97)
+ * 2: force (60/50/30/24/59.94/23.97)
+ */
+ fr_policy = <2>;
+ };
+
+ dummy_venc: dummy_venc {
+ compatible = "amlogic, dummy_venc_sc2";
+ status = "okay";
+ };
+
+ ir: ir@8000 {
+ compatible = "amlogic, meson-ir";
+ reg = <0xfe084040 0xA4>,
+ <0xfe084000 0x20>;
+ status = "disable";
+ protocol = <REMOTE_TYPE_NEC>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+ map = <&custom_maps>;
+ max_frame_time = <200>;
+ };
+
+ p_tsensor: p_tsensor@fe020000 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0xfe020000 0x50>,
+ <0xfe010328 0x4>;
+ cal_type = <0x1>;
+ cal_coeff = <324 424 3159 9411>;
+ rtemp = <110000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_TS_CLK_GATE>;
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ d_tsensor: d_tsensor@fe022000 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0xfe022000 0x50>,
+ <0xfe010370 0x4>;
+ cal_type = <0x1>;
+ cal_coeff = <324 424 3159 9411>;
+ rtemp = <110000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_TS_CLK_GATE>;
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "okay";
+ compatible = "amlogic, meson-cooldev";
+ cooling_devices {
+ cpucore_cool_cluster0 {
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ dyn_coeff = <140>;
+ node_name = "bifrost";
+ device_type = "gpufreq";
+ };
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };/*meson cooling devices end*/
+
+ thermal-zones {
+ soc_thermal: soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <1160>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ pswitch_on: trip-point@0 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcontrol: trip-point@1 {
+ temperature = <95000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcritical: trip-point@2 {
+ temperature = <105000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&CPU0 0 8>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpu 0 3>;
+ contribution = <1024>;
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <1410>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <95000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcritical: trip-point@2 {
+ temperature = <105000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ };/*thermal zone end*/
+
+ ion_dev {
+ compatible = "amlogic, ion_dev";
+ memory-region = <&ion_cma_reserved
+ &ion_fb_reserved>;
+ };
+
+ meson_uvm {
+ compatible = "amlogic, meson_uvm";
+ status = "okay";
+ };
+
+ meson_videotunnel{
+ compatible = "amlogic, meson_videotunnel";
+ status = "okay";
+ };
+
+ fb: fb {
+ compatible = "amlogic, fb-sc2";
+ memory-region = <&logo_reserved>;
+ status = "disabled";
+ interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 194 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ scale_mode = <1>;
+ /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ display_size_default = <1920 1080 1920 2160 32>;
+ /*1920*1080*4*3 = 0x17BB000*/
+ clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc";
+ };
+
+ irblaster: meson-irblaster@fe08410c {
+ compatible = "amlogic, meson_irblaster";
+ status = "disabled";
+ reg = <0xfe08410c 0x10>;
+ #irblaster-cells = <2>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ /*if you want to use vdin just modify status to "ok"*/
+ vdin0: vdin0 {
+ compatible = "amlogic, vdin-sc2";
+ dev_name = "vdin0";
+ /*status = "disabled";*/
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;2:cma alone*/
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ /*cma_size = <16>;*/
+ interrupts = <0 210 1>;
+ rdma-irq = <2>;
+ /*clocks = <&clkc CLKID_VPU_CLKB_GATE>,
+ * <&clkc CLKID_VPU_CLKB_TMP_MUX>;
+ *clock-names = "vpu_clkb_gate",
+ * "vpu_clkb_tmp_mux";
+ */
+ vdin_id = <0>;
+ /* vdin v4l2 */
+ v4l_support_en = <0>;
+ v4l_vd_num = <70>;
+ /* v4l2 capability */
+ driver = "vdinvideo";
+ card = "meson-sc2";
+ bus_info = "vdin0 v4l2";
+ version = <0x20220120>;
+ /* fe_ports refer to tvin.h */
+ fe_ports = <0x00001001 /* CVBS1 */
+ 0x00004000 /* HDMI0 */
+ 0x00004001 /* HDMI1 */
+ 0x00004002>; /* HDMI2 */
+ /* vdin v4l2 end */
+ };
+ vdin1: vdin1 {
+ compatible = "amlogic, vdin-sc2";
+ dev_name = "vdin1";
+ /*status = "disabled";*/
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 212 1>;
+ rdma-irq = <4>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <1>;
+ /* vdin v4l2 */
+ v4l_support_en = <0>;
+ v4l_vd_num = <71>;
+ /* v4l2 capability */
+ driver = "vdinvideo";
+ card = "meson-sc2";
+ bus_info = "vdin1 v4l2";
+ version = <0x20220120>;
+ /* fe_ports refer to tvin.h */
+ fe_ports = <0x0000a002 /* WB0_VD1 */
+ 0x0000a003 /* WB0_VD2 */
+ 0x0000a004 /* WB0_OSD1 */
+ 0x0000a005 /* WB0_OSD2 */
+ 0x0000a006 /* WB0_VPP */
+ 0x0000a007 /* WB0_VDIN_BIST */
+ 0x0000a008>; /* WB0_POST_BLEND */
+ /* vdin v4l2 end */
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom-sc2";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "vsync";
+ };
+
+ lut_dma:lut_dma {
+ compatible = "amlogic, meson-sc2, lut_dma";
+ status = "okay";
+ };
+
+ video_composer {
+ compatible = "amlogic, video_composer";
+ dev_name = "video_composer";
+ status = "okay";
+ };
+
+ vpu_security{
+ compatible = "amlogic, meson-sc2, vpu_security";
+ dev_name = "amlogic-vpu-security";
+ status = "okay";
+ interrupts = <GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "vpu_security";
+ };
+
+ dmx_aucpu: aucpu {
+ compatible = "amlogic, aucpu";
+ dev_name = "aml_aucpu";
+ status = "okay";
+ interrupts = <0 77 1>;
+ interrupt-names = "aucpu_irq";
+ reg = <0xfe09e080 0x100>;
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-sc2";
+ status = "okay";
+ interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0xff040000 0x100>;
+ power-domains = <&pwrdm PDID_SC2_GE2D>;
+ };
+
+ aml_bt: aml_bt {
+ compatible = "amlogic, aml-bt";
+ status = "disabled";
+ bt_en-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ };
+
+ aml_wifi: aml_wifi {
+ compatible = "amlogic, aml-wifi";
+ status = "disabled";
+ irq_trigger_type = "IRQF_TRIGGER_LOW";
+ wifi_static_buf = <2>; /* if use bcm wifi, config dhd_static_buf */
+ //pinctrl-0 = <&pwm_e_pins>;
+ //pinctrl-names = "default";
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ pwms = <&pwm_ef 0 30550 0>;
+ duty-cycle = <15270>;
+ times = <8>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_ef 2 30500 0>;
+ duty-cycle = <15250>;
+ times = <12>;
+ };
+ };
+
+ efuseburn: efuse_burn {
+ compatible = "amlogic, efuseburn";
+ efuse_pattern_size = <0x1200>;
+ status = "okay";
+ };
+ efusecheck: efusecheck{
+ maincmd = <0x8200003E>;
+ checknum = <3>;
+ check0 = <&check_0>;
+ check1 = <&check_1>;
+ check2 = <&check_2>;
+ check_0:check_0{
+ checkname = "dgpk1";
+ subcmd = <0x1000>;
+ };
+ check_1:check_1{
+ checkname = "dgpk2";
+ subcmd = <0x1001>;
+ };
+ check_2:check_2{
+ checkname = "aud_id";
+ subcmd = <0x1002>;
+ };
+ };
+ efuse: efuse{
+ compatible = "amlogic, efuse";
+ reg=<0xfe440040 0x4>;
+ secureboot_mask = <0x00000c00>;
+ mem_size = <0x100000>;
+ read_cmd = <0x82000030>;
+ write_cmd = <0x82000031>;
+ get_max_cmd = <0x82000033>;
+ mem_in_base_cmd = <0x82000020>;
+ mem_out_base_cmd = <0x82000021>;
+ efuse_pattern_size = <0x1200>;
+ efuse_obj_cmd_status = <0x1>;
+ key = <&efusekey>;
+ check = <&efusecheck>;
+ clock-names = "efuse_clk";
+ status = "okay";
+ };
+
+ efusekey:efusekey{
+ keynum = <4>;
+ key0 = <&key_0>;
+ key1 = <&key_1>;
+ key2 = <&key_2>;
+ key3 = <&key_3>;
+ key_0:key_0{
+ keyname = "mac";
+ offset = <0>;
+ size = <6>;
+ };
+ key_1:key_1{
+ keyname = "mac_bt";
+ offset = <6>;
+ size = <6>;
+ };
+ key_2:key_2{
+ keyname = "mac_wifi";
+ offset = <12>;
+ size = <6>;
+ };
+ key_3:key_3{
+ keyname = "usid";
+ offset = <18>;
+ size = <16>;
+ };
+ };
+
+ gpu_opp_table: gpu_opp_table {
+ compatible = "operating-points-v2";
+
+ opp-285 {
+ opp-hz = /bits/ 64 <285714281>;
+ opp-microvolt = <1150>;
+ };
+ opp-400 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1150>;
+ };
+ opp-500 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <1150>;
+ };
+ opp-666 {
+ opp-hz = /bits/ 64 <666666666>;
+ opp-microvolt = <1150>;
+ };
+ opp-846 {
+ opp-hz = /bits/ 64 <846000000>;
+ opp-microvolt = <1150>;
+ };
+ };
+
+ aml_mkl {
+ compatible = "amlogic,aml_mkl";
+ dev_name = "aml_mkl_dev";
+ status = "disabled";
+ reg = <0xfe440200 0x80>;
+ };
+
+ chosen {
+ kaslr-seed = <0x0 0x0>;
+ };
+};
+
+&periphs_pinctrl {
+ i2c0_pins1:i2c0_pins1 {
+ mux {
+ groups = "i2c0_sda_c",
+ "i2c0_scl_c";
+ function = "i2c0";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c0_pins2:i2c0_pins2 {
+ mux {
+ groups = "i2c0_sda_h",
+ "i2c0_scl_h";
+ function = "i2c0";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c0_pins3:i2c0_pins3 {
+ mux {
+ groups = "i2c0_sda_z0",
+ "i2c0_scl_z1";
+ function = "i2c0";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c0_pins4:i2c0_pins4 {
+ mux {
+ groups = "i2c0_sda_z7",
+ "i2c0_scl_z8";
+ function = "i2c0";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+
+ };
+ };
+
+ i2c1_pins1:i2c1_pins1 {
+ mux {
+ groups = "i2c1_sda_z",
+ "i2c1_scl_z";
+ function = "i2c1";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c1_pins2:i2c1_pins2 {
+ mux {
+ groups = "i2c1_sda_x",
+ "i2c1_scl_x";
+ function = "i2c1";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c1_pins3:i2c1_pins3 {
+ mux {
+ groups = "i2c1_sda_h2",
+ "i2c1_scl_h3";
+ function = "i2c1";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c1_pins4:i2c1_pins4 {
+ mux {
+ groups = "i2c1_sda_h6",
+ "i2c1_scl_h7";
+ function = "i2c1";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c2_pins1:i2c2_pins1 {
+ mux {
+ groups = "i2c2_sda_x",
+ "i2c2_scl_x";
+ function = "i2c2";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c2_pins2:i2c2_pins2 {
+ mux {
+ groups = "i2c2_sda_z10",
+ "i2c2_scl_z11";
+ function = "i2c2";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c2_pins3:i2c2_pins3 {
+ mux {
+ groups = "i2c2_sda_z14",
+ "i2c2_scl_z15";
+ function = "i2c2";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c3_pins1:i2c3_pins1 {
+ mux {
+ groups = "i2c3_sda_h",
+ "i2c3_scl_h";
+ function = "i2c3";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c3_pins2:i2c3_pins2 {
+ mux {
+ groups = "i2c3_sda_a",
+ "i2c3_scl_a";
+ function = "i2c3";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c4_pins1:i2c4_pins1 {
+ mux {
+ groups = "i2c4_sda_d",
+ "i2c4_scl_d";
+ function = "i2c4";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ i2c4_pins2:i2c4_pins2 {
+ mux {
+ groups = "i2c4_sda_e",
+ "i2c4_scl_e";
+ function = "i2c4";
+ drive-strength-microamp = <3000>;
+ bias-disable;
+ };
+ };
+
+ a_uart_pins1:a_uart1 {
+ mux {
+ groups = "uart_a_tx_d2",
+ "uart_a_rx_d3";
+ function = "uart_a";
+ };
+ };
+
+ a_uart_pins2:a_uart2 {
+ mux {
+ groups = "uart_a_tx_d8",
+ "uart_a_rx_d9";
+ function = "uart_a";
+ };
+ };
+
+ c_uart_pins:c_uart {
+ mux {
+ groups = "uart_c_tx",
+ "uart_c_rx";
+ bias-pull-up;
+ output-high;
+ function = "uart_c";
+ };
+ };
+
+ d_uart_pins1:d_uart1 {
+ mux {
+ groups = "uart_d_tx_x6",
+ "uart_d_rx_x7";
+ function = "uart_d";
+ };
+ };
+
+ d_uart_pins2:d_uart2 {
+ mux {
+ groups = "uart_d_tx_x10",
+ "uart_d_rx_x11";
+ function = "uart_d";
+ };
+ };
+
+ e_uart_pins:e_uart {
+ mux {
+ groups = "uart_e_tx",
+ "uart_e_rx",
+ "uart_e_cts",
+ "uart_e_rts";
+ bias-pull-up;
+ output-high;
+ function = "uart_e";
+ };
+ };
+ emmc_pins: emmc {
+ mux-0 {
+ groups = "emmc_nand_d0",
+ "emmc_nand_d1",
+ "emmc_nand_d2",
+ "emmc_nand_d3",
+ "emmc_nand_d4",
+ "emmc_nand_d5",
+ "emmc_nand_d6",
+ "emmc_nand_d7",
+ "emmc_cmd";
+ function = "emmc";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+
+ mux-1 {
+ groups = "emmc_clk";
+ function = "emmc";
+ bias-disable;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ emmc_ds_pins: emmc-ds {
+ mux {
+ groups = "emmc_nand_dqs";
+ function = "emmc";
+ bias-pull-down;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ emmc_clk_gate_pins: emmc_clk_gate {
+ mux {
+ groups = "GPIOB_8";
+ function = "gpio_periphs";
+ bias-pull-down;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ all_nand_pins: all_nand_pins {
+ mux {
+ groups = "emmc_nand_d0",
+ "emmc_nand_d1",
+ "emmc_nand_d2",
+ "emmc_nand_d3",
+ "emmc_nand_d4",
+ "emmc_nand_d5",
+ "emmc_nand_d6",
+ "emmc_nand_d7",
+ "nand_ce0",
+ "nand_ale",
+ "nand_cle",
+ "nand_wen_clk",
+ "nand_ren_wr";
+ function = "nand";
+ input-enable;
+ };
+ };
+
+ nand_cs_pins: nand_cs {
+ mux {
+ groups = "nand_ce0";
+ function = "nand";
+ };
+ };
+
+ sd_to_ao_uart_clr_pins: sd_to_ao_uart_clr_pins {
+ mux {
+ groups = "GPIOD_0",
+ "GPIOD_1";
+ function = "gpio_periphs";
+ };
+ };
+
+ sdcard_pins: sdcard_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_d1_c",
+ "sdcard_d2_c",
+ "sdcard_d3_c",
+ "sdcard_clk_c",
+ "sdcard_cmd_c";
+ function = "sdcard";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ ao_to_sd_uart_pins: ao_to_sd_uart_pins {
+ mux {
+ groups = "uart_b_tx_c",
+ "uart_b_rx_c";
+ function = "uart_b";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ ao_uart_pins: ao_uart_pins {
+ mux {
+ groups = "uart_b_tx_d",
+ "uart_b_rx_d";
+ function = "uart_b";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ sd_clr_all_pins: sd_clr_all_pins {
+ mux {
+ groups = "GPIOC_0",
+ "GPIOC_1",
+ "GPIOC_2",
+ "GPIOC_3",
+ "GPIOC_5";
+ function = "gpio_periphs";
+ output-high;
+ };
+ mux1 {
+ groups = "GPIOC_4";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+ sd_clr_noall_pins: sd_clr_noall_pins {
+ mux {
+ groups = "GPIOC_0",
+ "GPIOC_1",
+ "GPIOC_4",
+ "GPIOC_5";
+ function = "gpio_periphs";
+ output-high;
+ };
+ };
+
+ sd_1bit_pins: sd_1bit_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_clk_c",
+ "sdcard_cmd_c";
+ function = "sdcard";
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ sdcard_clk_gate_pins: sdio_clk_gate_pins {
+ mux {
+ groups = "GPIOC_4";
+ function = "gpio_periphs";
+ bias-pull-down;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ sdio_pins: sdio {
+ mux {
+ groups = "sdio_d0_x",
+ "sdio_d1_x",
+ "sdio_d2_x",
+ "sdio_d3_x",
+ "sdio_clk_x",
+ "sdio_cmd_x";
+ function = "sdio";
+ bias-disable;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ sdio_clk_gate_pins: sdio_clk_gate {
+ mux {
+ groups = "GPIOX_4";
+ function = "gpio_periphs";
+ bias-pull-down;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ hdmitx_hpd: hdmitx_hpd {
+ mux {
+ groups = "hdmitx_hpd_in";
+ function = "hdmitx";
+ bias-disable;
+ };
+ };
+
+ hdmitx_hpd_gpio: hdmitx_hpd_gpio {
+ mux {
+ groups = "GPIOH_1";
+ function = "gpio_periphs";
+ bias-disable;
+ };
+ };
+
+ hdmitx_ddc: hdmitx_ddc {
+ mux {
+ groups = "hdmitx_sda",
+ "hdmitx_sck";
+ function = "hdmitx";
+ bias-disable;
+ drive-strength = <3>;
+ };
+ };
+
+ eecec_a: ee_ceca {
+ mux {
+ groups = "cec_a_h";
+ function = "cec_a";
+ };
+ };
+
+ eecec_b: ee_cecb {
+ mux {
+ groups = "cec_b_h";
+ function = "cec_b";
+ };
+ };
+
+ jtag_a_pins: jtag_a_pin {
+ mux {
+ groups = "jtag_1_tdi",
+ "jtag_1_tdo",
+ "jtag_1_clk",
+ "jtag_1_tms";
+ function = "jtag_1";
+ };
+ };
+
+ jtag_b_pins: jtag_b_pin {
+ mux {
+ groups = "jtag_2_tdi",
+ "jtag_2_tdo",
+ "jtag_2_clk",
+ "jtag_2_tms";
+ function = "jtag_2";
+ };
+ };
+
+ pwm_a_pins1: pwm_a_pins1 {
+ mux {
+ groups = "pwm_a_e";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_a_pins2: pwm_a_pins2 {
+ mux {
+ groups = "pwm_a_x";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_b_pins1: pwm_b_pins1 {
+ mux {
+ groups = "pwm_b_h";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins2: pwm_b_pins2 {
+ mux {
+ groups = "pwm_b_z0";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins3: pwm_b_pins3 {
+ mux {
+ groups = "pwm_b_z13";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins4: pwm_b_pins4 {
+ mux {
+ groups = "pwm_b_x7";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins5: pwm_b_pins5 {
+ mux {
+ groups = "pwm_b_x19";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_c_pins1: pwm_c_pins1 {
+ mux {
+ groups = "pwm_c_c";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins2: pwm_c_pins2 {
+ mux {
+ groups = "pwm_c_x";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins3: pwm_c_pins3 {
+ mux {
+ groups = "pwm_c_z";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_d_pins1: pwm_d_pins1 {
+ mux {
+ groups = "pwm_d_z";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins2: pwm_d_pins2 {
+ mux {
+ groups = "pwm_d_x3";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins3: pwm_d_pins3 {
+ mux {
+ groups = "pwm_d_x6";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_e_pins: pwm_e_pins {
+ mux {
+ groups = "pwm_e";
+ function = "pwm_e";
+ drive-strength-microamp = <500>;
+ };
+ };
+
+ pwm_f_pins1: pwm_f_pins1 {
+ mux {
+ groups = "pwm_f_x";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins2: pwm_f_pins2 {
+ mux {
+ groups = "pwm_f_h";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins3: pwm_f_pins3 {
+ mux {
+ groups = "pwm_f_z";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_g_pins: pwm_g_pins {
+ mux {
+ groups = "pwm_g";
+ function = "pwm_g";
+ };
+ };
+
+ pwm_h_pins: pwm_h_pins {
+ mux {
+ groups = "pwm_h";
+ function = "pwm_h";
+ };
+ };
+
+ pwm_i_pins1: pwm_i_pins1 {
+ mux {
+ groups = "pwm_i_d4";
+ function = "pwm_i";
+ };
+ };
+
+ pwm_i_pins2: pwm_i_pins2 {
+ mux {
+ groups = "pwm_i_d6";
+ function = "pwm_i";
+ };
+ };
+
+ pwm_j_pins1: pwm_j_pins1 {
+ mux {
+ groups = "pwm_j_e";
+ function = "pwm_j";
+ };
+ };
+
+ pwm_j_pins2: pwm_j_pins2 {
+ mux {
+ groups = "pwm_j_d5";
+ function = "pwm_j";
+ };
+ };
+
+ pwm_j_pins3: pwm_j_pins3 {
+ mux {
+ groups = "pwm_j_d10";
+ function = "pwm_j";
+ };
+ };
+
+ pwm_i_hiz_pins: pwm_i_hiz_pins {
+ mux {
+ groups = "pwm_i_hiz";
+ function = "pwm_i_hiz";
+ };
+ };
+
+ pwm_g_hiz_pins: pwm_g_hiz_pins {
+ mux {
+ groups = "pwm_g_hiz";
+ function = "pwm_g_hiz";
+ };
+ };
+
+ remote_pins: remote_pin {
+ mux {
+ groups = "remote_input_d5";
+ function = "remote_input";
+ bias-disable;
+ };
+ };
+
+ spicc0_pins_x: spicc0_pins_x {
+ mux {
+ groups = "spi_a_mosi_x",
+ "spi_a_miso_x",
+ //"spi_a_ss0_x",
+ "spi_a_sclk_x";
+ function = "spi_a";
+ drive-strength = <2>;
+ };
+ };
+
+ spicc0_pins_c: spicc0_pins_c {
+ mux {
+ groups = "spi_a_mosi_c",
+ "spi_a_miso_c",
+ //"spi_a_ss0_c",
+ "spi_a_sclk_c";
+ function = "spi_a";
+ drive-strength = <2>;
+ };
+ };
+
+ spicc1_pins_h: spicc1_pins_h {
+ mux {
+ groups = "spi_b_mosi_h",
+ "spi_b_miso_h",
+ //"spi_b_ss0_h",
+ "spi_b_sclk_h";
+ function = "spi_b";
+ drive-strength = <2>;
+ };
+ };
+
+ spifc_pins:spifc_pins {
+ mux {
+ groups = "nor_hold",
+ "nor_d",
+ "nor_q",
+ "nor_c",
+ "nor_wp",
+ "nor_cs";
+ function = "nor";
+ };
+ };
+
+ irblaster_pins1:irblaster_pin1 {
+ mux {
+ groups = "remote_out_h";
+ function = "remote_out";
+ };
+ };
+
+ irblaster_pins2:irblaster_pin2 {
+ mux {
+ groups = "remote_out_z";
+ function = "remote_out";
+ };
+ };
+
+ irblaster_pins3:irblaster_pin3 {
+ mux {
+ groups = "remote_out_d4";
+ function = "remote_out";
+ };
+ };
+
+ irblaster_pins4:irblaster_pin4 {
+ mux {
+ groups = "remote_out_d9";
+ function = "remote_out";
+ };
+ };
+
+ sd_iso7816_pins:sd_iso7816_pins {
+ mux {
+ groups = "iso7816_clk_c",
+ "iso7816_data_c";
+ function = "iso7816";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ iso7816_pins_mode_0:iso7816_pins_mode_0 {
+ mux {
+ groups = "iso7816_data_c";
+ function = "iso7816";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ iso7816_pins_mode_1:iso7816_pins_mode_1 {
+ mux {
+ groups = "iso7816_data_x";
+ function = "iso7816";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ iso7816_pins_mode_2:iso7816_pins_mode_2 {
+ mux {
+ groups = "iso7816_data_h";
+ function = "iso7816";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ iso7816_pin_data_m_0_h:iso7816_pin_data_m_0_h {
+ mux {
+ groups = "GPIOC_6";
+ function = "gpio_periphs";
+ output-high;
+ bias-pull-up;
+ };
+ };
+
+ iso7816_pin_data_m_1_h:iso7816_pin_data_m_1_h {
+ mux {
+ groups = "GPIOX_9";
+ function = "gpio_periphs";
+ output-high;
+ bias-pull-up;
+ };
+ };
+
+ iso7816_pin_data_m_2_h:iso7816_pin_data_m_2_h {
+ mux {
+ groups = "GPIOH_7";
+ function = "gpio_periphs";
+ output-high;
+ bias-pull-up;
+ };
+ };
+
+ iso7816_pin_data_m_0_l:iso7816_pin_data_m_0_l {
+ mux {
+ groups = "GPIOC_6";
+ function = "gpio_periphs";
+ output-low;
+ bias-pull-up;
+ };
+ };
+
+ iso7816_pin_data_m_1_l:iso7816_pin_data_m_1_l {
+ mux {
+ groups = "GPIOX_9";
+ function = "gpio_periphs";
+ output-low;
+ bias-pull-up;
+ };
+ };
+
+ iso7816_pin_data_m_2_l:iso7816_pin_data_m_2_l {
+ mux {
+ groups = "GPIOH_7";
+ function = "gpio_periphs";
+ output-low;
+ bias-pull-up;
+ };
+ };
+};
+
+&gpu{
+ operating-points-v2 = <&gpu_opp_table>;
+ reg = <0xFE400000 0x04000>, /*mali APB bus base address*/
+ <0xFE002000 0x01000>, /*reset register*/
+ <0xFF800000 0x01000>, /*aobus TODO update*/
+ <0xFF63c000 0x01000>, /*hiubus for clk cntl*/
+ <0xFE002000 0x01000>; /*reset register*/
+
+ interrupts = <0 144 4>, <0 145 4>, <0 146 4>;
+ interrupt-names = "GPU", "MMU", "JOB";
+ clk_cntl_reg = <0x57>;
+
+ clocks = <&clkc CLKID_MALI>;
+ clock-names = "gpu_mux";
+
+ /*
+ * Mali clocking is provided by two identical clock paths
+ * MALI_0 and MALI_1 muxed to a single clock by a glitch
+ * free mux to safely change frequency while running.
+ */
+ assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
+ <&clkc CLKID_MALI_0>,
+ <&clkc CLKID_MALI>; /* Glitch free mux */
+ assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,
+ <0>, /* Do Nothing */
+ <&clkc CLKID_MALI_0>;
+ assigned-clock-rates = <0>, /* Do Nothing */
+ <800000000>,
+ <0>; /* Do Nothing */
+
+ tbl = <&dvfs285_cfg
+ &dvfs400_cfg
+ &dvfs500_cfg
+ &dvfs666_cfg
+ &dvfs850_cfg
+ &dvfs850_cfg>;
+};
diff --git a/arch/arm/boot/dts/amlogic/mesong12a-bifrost.dtsi b/arch/arm/boot/dts/amlogic/mesong12a-bifrost.dtsi
new file mode 100644
index 0000000..798bbc4
--- /dev/null
+++ b/arch/arm/boot/dts/amlogic/mesong12a-bifrost.dtsi
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+/ {
+
+ gpu:bifrost {
+ compatible = "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
+ #cooling-cells = <2>; /* min followed by max */
+ reg = <0xFFE40000 0x04000>, /*mali APB bus base address*/
+ <0xFFD01000 0x01000>, /*reset register*/
+ <0xFF800000 0x01000>, /*aobus for gpu pmu domain*/
+ <0xFF63c000 0x01000>, /*hiubus for gpu clk cntl*/
+ <0xFFD01000 0x01000>; /*reset register*/
+ interrupt-parent = <&gic>;
+ interrupts = <0 160 4>, <0 161 4>, <0 162 4>;
+ interrupt-names = "GPU", "MMU", "JOB";
+ /* ACE-Lite = 0; ACE = 1; No-coherency = 31; */
+ /* system-coherency = <31>; */
+
+ num_of_pp = <2>;
+ sc_mpp = <1>; /* number of shader cores used most of time. */
+
+ tbl = <&dvfs285_cfg
+ &dvfs400_cfg
+ &dvfs500_cfg
+ &dvfs666_cfg
+ &dvfs850_cfg
+ &dvfs850_cfg>;
+
+ dvfs125_cfg:clk125_cfg {
+ clk_freq = <125000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ clk_reg = <0xA03>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <30 120>;
+ };
+
+ dvfs250_cfg:dvfs250_cfg {
+ clk_freq = <250000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ clk_reg = <0xA01>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <0 76>;
+ };
+
+ dvfs285_cfg:dvfs285_cfg {
+ clk_freq = <285714285>;
+ clk_parent = "fclk_div7";
+ clkp_freq = <285714285>;
+ clk_reg = <0xE00>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <0 76>;
+ };
+
+ dvfs400_cfg:dvfs400_cfg {
+ clk_freq = <400000000>;
+ clk_parent = "fclk_div5";
+ clkp_freq = <400000000>;
+ clk_reg = <0xC00>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <80 120>;
+ };
+
+ dvfs500_cfg:dvfs500_cfg {
+ clk_freq = <500000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ clk_reg = <0xA00>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <80 120>;
+ };
+
+ dvfs666_cfg:dvfs666_cfg {
+ clk_freq = <666666666>;
+ clk_parent = "fclk_div3";
+ clkp_freq = <666666666>;
+ clk_reg = <0x800>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <80 120>;
+ };
+
+ dvfs800_cfg:dvfs800_cfg {
+ clk_freq = <800000000>;
+ clk_parent = "fclk_div2p5";
+ clkp_freq = <800000000>;
+ clk_reg = <0x600>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <80 255>;
+ };
+
+ dvfs850_cfg:dvfs850_cfg {
+ clk_freq = <846000000>;
+ clk_parent = "gp0_pll";
+ clkp_freq = <846000000>;
+ clk_reg = <0x200>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <80 255>;
+ };
+ };
+
+};/* end of / */
diff --git a/arch/arm/boot/dts/amlogic/mesonsc2_drm.dtsi b/arch/arm/boot/dts/amlogic/mesonsc2_drm.dtsi
new file mode 100644
index 0000000..86649cc
--- /dev/null
+++ b/arch/arm/boot/dts/amlogic/mesonsc2_drm.dtsi
@@ -0,0 +1,260 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/display/meson-drm-ids.h>
+#include "meson-sc2.dtsi"
+
+/ {
+
+ drm_amhdmitx: drm-amhdmitx {
+ status = "disabled";
+ hdcp = "disabled";
+ };
+
+ drm_amcvbsout: drm-amcvbsout {
+ status = "disabled";
+ compatible = "amlogic, drm-cvbsout";
+ dev_name = "meson-amcvbsout";
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cvbs_to_drm: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&drm_to_cvbs>;
+ };
+ };
+ };
+ };
+
+ drm_lcd: drm-lcd {
+ status = "disabled";
+ compatible = "amlogic, drm-lcd";
+ dev_name = "meson-lcd";
+
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd_in_vpu: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vpu_out_lcd>;
+ };
+ };
+ };
+ };
+
+ drm_vpu: drm-vpu@0xff900000 {
+ status = "disabled";
+ compatible = "amlogic, meson-sc2-vpu";
+ osd_ver = /bits/ 8 <OSD_V4>;
+ reg = <0xff900000 0x40000>,
+ <0xff63c000 0x2000>,
+ <0xff638000 0x2000>;
+ reg-names = "base", "hhi", "dmc";
+ interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "viu-vsync", "viu2-vsync";
+ clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc";
+ dma-coherent;
+
+ /*INTERNAL port defined and use in drm driver.*/
+ vpu_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ vpu_out_lcd: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&lcd_in_vpu>;
+ };
+ };
+
+ /*EXTERNAL port for driver outside of drm.*/
+ connectors_dev: port@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ drm_to_hdmitx: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&hdmitx_to_drm>;
+ };
+ drm_to_cvbs: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&cvbs_to_drm>;
+ };
+ };
+ };
+
+ drm_subsystem: drm-subsystem {
+ status = "okay";
+ compatible = "amlogic, drm-subsystem";
+ ports = <&vpu_out>,<&connectors_dev>;
+ fbdev_sizes = <1920 1080 1920 2160 32>;
+ vfm_mode = <1>; /** 0:drm mode 1:composer mode */
+ memory-region = <&logo_reserved>;
+ primary_plane_index = <0>; /* primary plane index for crtcs */
+ crtc_masks = <1 1 1>; /*for encoder: 0:hdmi 1:lcd 2:cvbs*/
+
+ vpu_topology: vpu_topology {
+ vpu_blocks {
+ osd1_block: block@0 {
+ id = /bits/ 8 <OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <0>;
+ block_name = "osd1_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &afbc_osd1_block>;
+ };
+ osd2_block: block@1 {
+ id = /bits/ 8 <OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <0>;
+ block_name = "osd2_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &afbc_osd2_block>;
+ };
+ osd3_block: block@2 {
+ id = /bits/ 8 <OSD3_BLOCK>;
+ index = /bits/ 8 <2>;
+ type = /bits/ 8 <0>;
+ block_name = "osd3_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &afbc_osd3_block>;
+ };
+ afbc_osd1_block: block@3 {
+ id = /bits/ 8 <AFBC_OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <1>;
+ block_name = "afbc_osd1_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd1_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &osd_blend_block>;
+ };
+ afbc_osd2_block: block@4 {
+ id = /bits/ 8 <AFBC_OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <1>;
+ block_name = "afbc_osd2_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd2_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &scaler_osd2_block>;
+ };
+ afbc_osd3_block: block@5 {
+ id = /bits/ 8 <AFBC_OSD3_BLOCK>;
+ index = /bits/ 8 <2>;
+ type = /bits/ 8 <1>;
+ block_name = "afbc_osd3_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd3_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &scaler_osd3_block>;
+ };
+ scaler_osd1_block: block@6 {
+ id = /bits/ 8 <SCALER_OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <2>;
+ block_name = "scaler_osd1_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd1_hdr_dolby_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &vpp_postblend_block>;
+ };
+ scaler_osd2_block: block@7 {
+ id = /bits/ 8 <SCALER_OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <2>;
+ block_name = "scaler_osd2_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &afbc_osd2_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <2 &osd_blend_block>;
+ };
+ scaler_osd3_block: block@8 {
+ id = /bits/ 8 <SCALER_OSD3_BLOCK>;
+ index = /bits/ 8 <2>;
+ type = /bits/ 8 <2>;
+ block_name = "scaler_osd3_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &afbc_osd3_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <3 &osd_blend_block>;
+ };
+ osd_blend_block: block@9 {
+ id = /bits/ 8 <OSD_BLEND_BLOCK>;
+ block_name = "osd_blend_block";
+ type = /bits/ 8 <3>;
+ num_in_links = /bits/ 8 <0x3>;
+ in_links = <0 &afbc_osd1_block>,
+ <0 &scaler_osd2_block>,
+ <0 &scaler_osd3_block>;
+ num_out_links = /bits/ 8 <0x2>;
+ out_links = <0 &osd1_hdr_dolby_block>,
+ <1 &vpp_postblend_block>;
+ };
+ osd1_hdr_dolby_block: block@10 {
+ id = /bits/ 8 <OSD1_HDR_BLOCK>;
+ block_name = "osd1_hdr_dolby_block";
+ type = /bits/ 8 <4>;
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd_blend_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &scaler_osd1_block>;
+ };
+ vpp_postblend_block: block@12 {
+ id = /bits/ 8 <VPP_POSTBLEND_BLOCK>;
+ block_name = "vpp_postblend_block";
+ type = /bits/ 8 <6>;
+ num_in_links = /bits/ 8 <0x2>;
+ in_links = <0 &scaler_osd1_block>,
+ <1 &osd_blend_block>;
+ num_out_links = <0x0>;
+ };
+ video1_block: block@13 {
+ id = /bits/ 8 <VIDEO1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <7>;
+ block_name = "video1_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x0>;
+ };
+ video2_block: block@14 {
+ id = /bits/ 8 <VIDEO2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <7>;
+ block_name = "video2_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x0>;
+ };
+ };
+ };
+
+ vpu_hw_para: vpu_hw_para@0 {
+ osd_ver = /bits/ 8 <0x2>;
+ afbc_type = /bits/ 8 <0x2>;
+ has_deband = /bits/ 8 <0x1>;
+ has_lut = /bits/ 8 <0x1>;
+ has_rdma = /bits/ 8 <0x1>;
+ osd_fifo_len = /bits/ 8 <64>;
+ vpp_fifo_len = /bits/ 32 <0xfff>;
+ };
+ };
+};
+
+&amhdmitx {
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmitx_to_drm: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&drm_to_hdmitx>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/amlogic/partition_mbox_ab.dtsi b/arch/arm/boot/dts/amlogic/partition_mbox_ab.dtsi
new file mode 100644
index 0000000..bf7c583
--- /dev/null
+++ b/arch/arm/boot/dts/amlogic/partition_mbox_ab.dtsi
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+#include "firmware_ab.dtsi"
+
+/ {
+ partitions: partitions{
+ parts = <25>;
+ part-0 = <&frp>;
+ part-1 = <&factory>;
+ part-2 = <&vendor_boot_a>;
+ part-3 = <&vendor_boot_b>;
+ part-4 = <&tee>;
+ part-5 = <&logo>;
+ part-6 = <&misc>;
+ part-7 = <&dtbo_a>;
+ part-8 = <&dtbo_b>;
+ part-9 = <&cri_data>;
+ part-10 = <¶m>;
+ part-11 = <&odm_ext_a>;
+ part-12 = <&odm_ext_b>;
+ part-13 = <&oem_a>;
+ part-14 = <&oem_b>;
+ part-15 = <&boot_a>;
+ part-16 = <&boot_b>;
+ part-17 = <&rsv>;
+ part-18 = <&metadata>;
+ part-19 = <&vbmeta_a>;
+ part-20 = <&vbmeta_b>;
+ part-21 = <&vbmeta_system_a>;
+ part-22 = <&vbmeta_system_b>;
+ part-23 = <&super>;
+ part-24 = <&userdata>;
+
+ frp:frp{
+ pname = "frp";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ factory:factory{
+ pname = "factory";
+ size = <0x0 0x800000>;
+ mask = <0x11>;
+ };
+ vendor_boot_a:vendor_boot_a{
+ pname = "vendor_boot_a";
+ size = <0x0 0x1800000>;
+ mask = <1>;
+ };
+ vendor_boot_b:vendor_boot_b{
+ pname = "vendor_boot_b";
+ size = <0x0 0x1800000>;
+ mask = <1>;
+ };
+ tee:tee{
+ pname = "tee";
+ size = <0x0 0x2000000>;
+ mask = <1>;
+ };
+ logo:logo{
+ pname = "logo";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ misc:misc{
+ pname = "misc";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ dtbo_a:dtbo_a{
+ pname = "dtbo_a";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ dtbo_b:dtbo_b{
+ pname = "dtbo_b";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ cri_data:cri_data
+ {
+ pname = "cri_data";
+ size = <0x0 0x800000>;
+ mask = <2>;
+ };
+ rsv:rsv{
+ pname = "rsv";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ metadata:metadata{
+ pname = "metadata";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ vbmeta_a:vbmeta_a{
+ pname = "vbmeta_a";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ vbmeta_b:vbmeta_b{
+ pname = "vbmeta_b";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ vbmeta_system_a:vbmeta_system_a{
+ pname = "vbmeta_system_a";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ vbmeta_system_b:vbmeta_system_b{
+ pname = "vbmeta_system_b";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ param:param{
+ pname = "param";
+ size = <0x0 0x1000000>;
+ mask = <2>;
+ };
+ odm_ext_a:odm_ext_a
+ {
+ pname = "odm_ext_a";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ odm_ext_b:odm_ext_b
+ {
+ pname = "odm_ext_b";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ oem_a:oem_a
+ {
+ pname = "oem_a";
+ size = <0x0 0x2000000>;
+ mask = <1>;
+ };
+ oem_b:oem_b
+ {
+ pname = "oem_b";
+ size = <0x0 0x2000000>;
+ mask = <1>;
+ };
+ boot_a:boot_a
+ {
+ pname = "boot_a";
+ size = <0x0 0x4000000>;
+ mask = <1>;
+ };
+ boot_b:boot_b
+ {
+ pname = "boot_b";
+ size = <0x0 0x4000000>;
+ mask = <1>;
+ };
+ super:super
+ {
+ pname = "super";
+ size = <0x0 0x70800000>;
+ mask = <1>;
+ };
+ userdata:userdata
+ {
+ pname = "userdata";
+ size = <0xffffffff 0xffffffff>;
+ mask = <4>;
+ };
+ };
+};/* end of / */
diff --git a/arch/arm/boot/dts/amlogic/sc2_s905x4_ah212_drm.dts b/arch/arm/boot/dts/amlogic/sc2_s905x4_ah212_drm.dts
new file mode 100644
index 0000000..98b4161
--- /dev/null
+++ b/arch/arm/boot/dts/amlogic/sc2_s905x4_ah212_drm.dts
@@ -0,0 +1,1734 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "meson-sc2.dtsi"
+#include "mesonsc2_drm.dtsi"
+#include "partition_mbox_ab.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Amlogic";
+ amlogic-dt-id = "sc2_s905x4_ah212";
+ compatible = "amlogic, sc2";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ serial0 = &uart_B;
+ serial1 = &uart_E;
+ serial2 = &uart_C;
+ serial3 = &uart_D;
+ serial4 = &uart_A;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ spi1 = &spicc0;
+ spi2 = &spicc1;
+ tsensor0 = &p_tsensor;
+ tsensor1 = &d_tsensor;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x000000 0x80000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /*swiotlb = "normal";*/ /*normal,force,noforce*/
+
+ ramdump_bl33z@00000000 {
+ reg = <0x0 0x1800000>; /* 0 ~ 24M */
+ status = "disabled";
+ };
+
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x07400000 0x00100000>;
+ record-size = <0x20000>;
+ console-size = <0x40000>;
+ ftrace-size = <0x80000>;
+ pmsg-size = <0x10000>;
+ bconsole-size = <0x10000>;
+ };
+
+ pcie_reserved: linux,pcie {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x4000000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x54c00000 0x4000000>;
+ };
+
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ /*reusable;*/
+ no-map;
+ alignment = <0x400000>;
+ reg = <0x05000000 0x3400000>;
+ };
+
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x7f800000 0x800000>;
+ };
+
+ ion_cma_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x5c00000>;
+ alignment = <0x400000>;
+ };
+ ion_fb_reserved:linux,ion-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x4x4 round up 4M align */
+ size = <0x2400000>;
+ alignment = <0x400000>;
+ };
+ dmaheap_fb_reserved:heap-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x4x4 round up 4M align */
+ size = <0x2400000>;
+ alignment = <0x400000>;
+ };
+ dmaheap_cma_reserved:heap-gfx {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x5c00000>;
+ alignment = <0x400000>;
+ };
+ /*di CMA pool */
+ //di_cma_reserved:linux,di_cma {
+ //compatible = "shared-dma-pool";
+ //status = "disabled";
+ //reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4074560(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4074560=40M(0x28) support 10bit
+ */
+ //size = <0x0 0x0B000000>;
+ //size = <0x0 0x0>;
+ //alignment = <0x0 0x400000>;
+ //};
+
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "shared-dma-pool";
+ size = <0x0>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x1b000000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ };
+
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+
+ /* vdin0 CMA pool */
+ vdin0_cma_reserved:linux,vdin0_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* up to 1920x1080 yuv422 8bit and 5 buffers
+ * 1920x1080x2x5 = 20 M
+ */
+ size = <0x01400000>;
+ alignment = <0x400000>;
+ };
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* up to 1920x1080 yuv422 8bit and 5 buffers
+ * 1920x1080x2x5 = 20 M
+ */
+ size = <0x01400000>;
+ alignment = <0x400000>;
+ };
+ dsp_fw_reserved:linux,dsp_fw {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x00800000>;
+ alignment = <0x00400000>;
+ alloc-ranges = <0x30000000 0x00800000>;
+ };
+ };
+
+ main_12v: fixregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "12V";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ };
+
+ vcc_5v_reg: fixedregulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&main_12v>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddao3v3_reg: fixedregulator@3{
+ vin-supply = <&main_12v>;
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddao1v8_reg: fixedregulator@4{
+ vin-supply = <&vddao3v3_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+ amdolby_vision {
+ compatible = "amlogic, dolby_vision_sc2";
+ dev_name = "aml_amdolby_vision_driver";
+ status = "okay";
+ tv_mode = <0>;/*1:enabel ;0:disable*/
+ };
+ cvbsout {
+ compatible = "amlogic, cvbsout-sc2";
+ status = "okay";
+
+ /* clk path */
+ /* 0:vid_pll vid2_clk */
+ /* 1:gp0_pll vid2_clk */
+ /* 2:vid_pll vid1_clk */
+ /* 3:gp0_pll vid1_clk */
+ clk_path = <0>;
+
+ /* performance: reg_address, reg_value */
+ /* sc2 */
+ performance_pal = <0x1bf0 0x3 /* default Matrx625 CTCC value */
+ 0x1b12 0x8060
+ 0x1b05 0xf9
+ 0x1b56 0x333
+ 0x1c59 0xf15e
+ 0xffff 0x0>; /* ending flag */
+ performance = <0x1bf0 0x3 /* ccitt033 SVA value */
+ 0x1b12 0x8080
+ 0x1b05 0xfc
+ 0x1b56 0x333
+ 0x1c59 0xf458
+ 0xffff 0x0>; /* ending flag */
+ performance_ntsc = <0x1bf0 0x3 /* Matrx525 TTC value */
+ 0x1b12 0x8180
+ 0x1b05 0xf0
+ 0x1b56 0x333
+ 0x1c59 0xed66
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ dvb-extern {
+ compatible = "amlogic, dvb-extern";
+ dev_name = "dvb-extern";
+ status = "okay";
+
+ fe_num = <2>;
+ fe0_demod = "cxd2856";
+ fe0_i2c_adap_id = <&i2c2>;
+ fe0_demod_i2c_addr = <0xD8>;
+ fe0_reset_value = <0>;
+ fe0_reset_gpio = <&gpio GPIOC_7 GPIO_ACTIVE_HIGH>;
+ fe0_reset_dir = <1>; /* 0: out, 1: in. */
+ fe0_ant_poweron_value = <0>;
+ fe0_ant_power_gpio = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>;
+ fe0_ts = <0>;
+ fe0_tuner0 = <0>; /* T/C */
+ fe0_tuner1 = <1>; /* S */
+
+ fe1_demod = "cxd2856";
+ fe1_i2c_adap_id = <&i2c2>;
+ fe1_demod_i2c_addr = <0xCA>;
+ fe1_reset_value = <0>;
+ fe1_reset_gpio = <&gpio GPIOC_7 GPIO_ACTIVE_HIGH>;
+ fe1_reset_dir = <1>; /* 0: out, 1: in. */
+ fe1_ant_poweron_value = <0>;
+ fe1_ant_power_gpio = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>;
+ fe1_ts = <1>;
+ fe1_tuner0 = <0>; /* T/C */
+ fe1_tuner1 = <1>; /* S */
+
+ tuner_num = <2>; /* for extern demod use tuner */
+ tuner0_name = "r836_tuner";
+ tuner1_name = "av2018_tuner";
+ };
+
+ dvb-demux {
+ compatible = "amlogic sc2, dvb-demux";
+ dev_name = "dvb-demux";
+ status = "okay";
+
+ reg = <0xfe000000 0x480000>;
+
+ dmxdev_num = <6>;
+
+ tsn_from = "demod";
+
+ /*single demod setting */
+ ts0_sid = <0x20>;
+ ts0 = "serial-4wire"; /* tsinA: serial-4wire, serial-3wire */
+ ts0_control = <0x0>;
+ ts0_invert = <0>;
+
+ ts1_sid = <0x21>;
+ ts1 = "serial-4wire";
+ ts1_control = <0x0>;
+ ts1_invert = <0>;
+
+ pinctrl-names = "s_ts0", "s_ts1";
+ pinctrl-0 = <&dvb_s_ts0_pins>;
+ pinctrl-1 = <&dvb_s_ts1_pins>;
+ };
+
+ /* SMC */
+ smartcard {
+ compatible = "amlogic,smartcard-sc2";
+ dev_name = "smartcard";
+ status = "disabled";
+
+ reg = <0xfe000000 0x480000>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+
+ reset_pin-gpios = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ detect_pin-gpios = <&gpio GPIOC_2 GPIO_ACTIVE_HIGH>;
+ enable_5v3v_pin-gpios = <&gpio GPIOC_4 GPIO_ACTIVE_HIGH>;
+ enable_pin-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>;
+
+ interrupts = <0 174 1>;
+ interrupt-names = "smc0_irq";
+ /*
+ *Smc clock source, if change this,
+ *you must adjust clk and divider in smartcard.c
+ */
+ smc0_clock_source = <0>;
+ /*0: high voltage on detect pin indicates card in.*/
+ smc0_det_invert = <0>;
+ smc0_5v3v_level = <0>;
+ /*Ordinarily,smartcard controller needs a enable pin.*/
+ smc_need_enable_pin = "yes";
+ reset_level = <0>;
+ smc0_enable_level = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_iso7816_pins>;
+
+/* For NSK2 Smartcard
+ * pinctrl-names = "default", "pins-mode0", "pins-mode1",
+ * "pins-mode2", "data-m0-h",
+ * "data-m1-h", "data-m2-h",
+ * "data-m0-l", "data-m1-l",
+ * "data-m2-l";
+ * pinctrl-0 = <&sd_iso7816_pins>;
+ * pinctrl-1 = <&iso7816_pins_mode_0>;
+ * pinctrl-2 = <&iso7816_pins_mode_1>;
+ * pinctrl-3 = <&iso7816_pins_mode_2>;
+ * pinctrl-4 = <&iso7816_pin_data_m_0_h>;
+ * pinctrl-5 = <&iso7816_pin_data_m_1_h>;
+ * pinctrl-6 = <&iso7816_pin_data_m_2_h>;
+ * pinctrl-7 = <&iso7816_pin_data_m_0_l>;
+ * pinctrl-8 = <&iso7816_pin_data_m_1_l>;
+ * pinctrl-9 = <&iso7816_pin_data_m_2_l>;
+ */
+
+ clocks = <&clkc CLKID_SC_CLK_GATE>;
+ clock-names = "smartcard";
+ /* For NSK2 Smartcard
+ * clocks = <&clkc CLKID_MPLL0>;
+ * clock-names = "smartcard_mpll0";
+ */
+ };
+
+ ionvideo {
+ compatible = "amlogic, ionvideo";
+ dev_name = "ionvideo";
+ status = "okay";
+ };
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ dev_name = "ppmgr";
+ status = "okay";
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <0>;/*1:enabel ;0:disable*/
+ wb_en = <0>;/*1:enabel ;0:disable*/
+ cm_en = <0>;/*1:enabel ;0:disable*/
+ /*0: 709/601 1: bt2020*/
+ tx_op_color_primary = <0>;
+ };
+
+ multi-di {
+ compatible = "amlogic, dim-sc2";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <4>; //<1>;
+ //memory-region = <&di_reserved>;
+ //memory-region = <&di_cma_reserved>;
+ interrupts = <0 203 1
+ 0 202 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_CLKB>,
+ <&clkc CLKID_VPU>;
+ clock-names = "vpu_clkb",
+ "vpu_mux";
+ clock-range = <334 667>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <1>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ };
+
+ gpio_keypad{
+ compatible = "amlogic, gpio_keypad";
+ status = "okay";
+ scan_period = <20>;
+ key_num = <2>;
+ key_name = "bluetooth", "mute";
+ key_code = <600 SW_MUTE_DEVICE>;
+ key_type = <EV_KEY EV_SW>;
+ key-gpios = <&gpio GPIOD_3 GPIO_ACTIVE_HIGH
+ &gpio GPIOE_2 GPIO_ACTIVE_HIGH>;
+ detect_mode = <0>;/*0:polling mode, 1:irq mode*/
+ };
+
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "vol-", "vol+", "power";
+ key_num = <3>;
+ io-channels = <&saradc 0>;
+ io-channel-names = "key-chan-0";
+ key_chan = <0 0 0>;
+ key_code = <114 115 116>;
+ key_val = <630 910 20>; //val=voltage/1800mV*1023
+ key_tolerance = <40 40 40>;
+ };
+
+ provisionkey {
+ compatible = "amlogic, provisionkey";
+ status = "disabled";
+ key-permit-default = "write";
+ //new key not need add dts if started with KEY_PROVISION_
+ KEY_PROVISION_XXX { };
+ //test_my_added_keyname { };
+ };//End provisionkey
+
+ unifykey{
+ compatible = "amlogic,unifykey";
+ status = "okay";
+ unifykey-num = <19>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11= <&keysn_11>;
+ unifykey-index-12= <&keysn_12>;
+ unifykey-index-13= <&keysn_13>;
+ unifykey-index-14= <&keysn_14>;
+ unifykey-index-15= <&keysn_15>;
+ unifykey-index-16= <&keysn_16>;
+ unifykey-index-17= <&keysn_17>;
+ unifykey-index-18= <&keysn_18>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "PlayReadykeybox25";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "region_code";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_16:key_16{
+ key-name = "netflix_mgkid";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_17:key_17{
+ key-name = "attestationdevidbox";// attest dev id box
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_18:key_18{
+ key-name = "oemkey";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ };//End unifykey
+
+ efusekey:efusekey{
+ keynum = <4>;
+ key0 = <&key_0>;
+ key1 = <&key_1>;
+ key2 = <&key_2>;
+ key3 = <&key_3>;
+ key_0:key_0{
+ keyname = "mac";
+ offset = <0>;
+ size = <6>;
+ };
+ key_1:key_1{
+ keyname = "mac_bt";
+ offset = <6>;
+ size = <6>;
+ };
+ key_2:key_2{
+ keyname = "mac_wifi";
+ offset = <12>;
+ size = <6>;
+ };
+ key_3:key_3{
+ keyname = "usid";
+ offset = <18>;
+ size = <16>;
+ };
+ };//End efusekey
+ /* Audio Related start */
+ auge_sound {
+ compatible = "amlogic, auge-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ /*avout mute gpio*/
+ avout_mute-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
+
+ spk_mute-gpios = <&gpio GPIOD_2 GPIO_ACTIVE_LOW>;
+
+ aml-audio-card,dai-link@0 {
+ format = "dsp_a";
+ mclk-fs = <512>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdma>;
+ frame-master = <&tdma>;
+ /* slave mode */
+ /*
+ * bitclock-master = <&tdmacodec>;
+ * frame-master = <&tdmacodec>;
+ */
+ suffix-name = "alsaPORT-pcm";
+ tdmacpu: cpu {
+ sound-dai = <&tdma>;
+ dai-tdm-slot-tx-mask =
+ <1>;
+ dai-tdm-slot-rx-mask =
+ <1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <16>;
+ system-clock-frequency = <256000>;
+ };
+ tdmacodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ format = "i2s";// "dsp_a";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmb>;
+ frame-master = <&tdmb>;
+ /* slave mode */
+ //bitclock-master = <&tdmbcodec>;
+ //frame-master = <&tdmbcodec>;
+ /* suffix-name, sync with android audio hal
+ * what's the dai link used for
+ */
+ suffix-name = "alsaPORT-i2s";
+ cpu {
+ sound-dai = <&tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ /*
+ * dai-tdm-slot-tx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-rx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-num = <8>;
+ */
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmbcodec: codec {
+ sound-dai = <&amlogic_codec /*&ad82584f_62*/>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmc>;
+ frame-master = <&tdmc>;
+ /* slave mode */
+ //bitclock-master = <&tdmccodec>;
+ //frame-master = <&tdmccodec>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-i2s2hdmi";
+ cpu {
+ sound-dai = <&tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmccodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ /* suffix-name, sync with android audio hal
+ * what's the dai link used for
+ */
+ suffix-name = "alsaPORT-pdm-builtinmic";
+ cpu {
+ sound-dai = <&apdm>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-spdif";
+ cpu {
+ sound-dai = <&spdifa>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ /* spdif_b to hdmi, only playback */
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ continuous-clock;
+ /* suffix-name, sync with android audio hal
+ * what's the dai link used for
+ */
+ suffix-name = "alsaPORT-spdifb";
+ cpu {
+ sound-dai = <&spdifb>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+/*
+ * aml-audio-card,dai-link@6 {
+ * mclk-fs = <256>;
+ * suffix-name = "alsaPORT-earc";
+ * cpu {
+ * sound-dai = <&earc>;
+ * system-clock-frequency = <12288000>;
+ * };
+ * codec {
+ * sound-dai = <&dummy_codec>;
+ * };
+ * };
+ */
+ aml-audio-card,dai-link@6 {
+ mclk-fs = <256>;
+ continuous-clock;
+ suffix-name = "alsaPORT-loopback";
+ cpu {
+ sound-dai = <&loopbacka>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ status = "okay";
+ };
+
+ audiolocker: locker {
+ compatible = "amlogic, audiolocker";
+ clock-names = "lock_out", "lock_in", "out_src",
+ "in_src", "out_calc", "in_ref";
+ interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq";
+ frequency = <49000000>; /* pll */
+ dividor = <49>; /* locker's parent */
+ status = "disabled";
+ };/* Audio Related end */
+};
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c2_pins3>;
+ clock-frequency = <300000>;
+};
+
+&i2c3 {
+ status = "disabled";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c3_pins2>;
+ clock-frequency = <300000>; /* default 100k */
+
+ tlc59116: tlc59116@60 {
+ compatible = "amlogic,tlc59116_led";
+ reg = <0x60>;
+ status = "disabled";
+
+ led0 {
+ default_colors = <0 0 0>;
+ r_io_number = <0>;
+ g_io_number = <10>;
+ b_io_number = <5>;
+ };
+
+ led1 {
+ default_colors = <0 0 0>;
+ r_io_number = <1>;
+ g_io_number = <11>;
+ b_io_number = <6>;
+ };
+
+ led2 {
+ default_colors = <0 0 0>;
+ r_io_number = <2>;
+ g_io_number = <12>;
+ b_io_number = <7>;
+ };
+
+ led3 {
+ default_colors = <0 0 0>;
+ r_io_number = <3>;
+ g_io_number = <13>;
+ b_io_number = <8>;
+ };
+ };
+};
+
+&audiobus {
+ tdma: tdm@0 {
+ compatible = "amlogic, tm2-revb-snd-tdma";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <0 1>;
+ dai-tdm-lane-slot-mask-out = <1 0>;
+ dai-tdm-clk-sel = <0>;
+ /*For NSK2 Smartcard
+ * clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ * &clkc CLKID_MPLL3>;
+ */
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_MPLL0>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+
+ /* Disable pinctrl-0 for NSK2 smartcard */
+ pinctrl-0 = <&tdm_a
+ &tdm_d3_pins
+ &tdm_d4_pins
+ &tdm_clk_pins>;
+
+ status = "okay";
+ };
+
+ tdmb: tdm@1 {
+ compatible = "amlogic, tm2-revb-snd-tdmb";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <0 1 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+ /*For NSK2 Smartcard
+ * clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ * &clkaudio CLKID_AUDIO_MCLK_PAD0
+ * &clkc CLKID_MPLL1>;
+ * clock-names = "mclk", "mclk_pad", "clk_srcpll";
+ */
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkaudio CLKID_AUDIO_MCLK_PAD0
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "mclk_pad", "clk_srcpll";
+
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = </*&tdmb_mclk &tdmout_b &tdmin_b*/>;
+
+ /*
+ * 0: tdmout_a;
+ * 1: tdmout_b;
+ * 2: tdmout_c;
+ * 3: spdifout;
+ * 4: spdifout_b;
+ */
+ samesource_sel = <3>;
+
+ /*enable default mclk(12.288M), before extern codec start*/
+ start_clk_enable = <1>;
+
+ /*tdm clk tuning enable*/
+ clk_tuning_enable = <1>;
+
+ status = "okay";
+ };
+
+ tdmc: tdm@2 {
+ compatible = "amlogic, tm2-revb-snd-tdmc";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-out = <1 1 1 1>;
+ dai-tdm-clk-sel = <2>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+ i2s2hdmi = <1>;
+ status = "okay";
+ };
+
+ spdifa: spdif@0 {
+ compatible = "amlogic, tm2-revb-snd-spdif-a";
+ #sound-dai-cells = <0>;
+ /* For NSK2 Smartcard
+ * clocks = <&clkc CLKID_MPLL2
+ */
+ clocks = <&clkc CLKID_MPLL0
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+ interrupts =
+ <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-names = "irq_spdifin";
+ pinctrl-names = "spdif_pins", "spdif_pins_mute";
+ pinctrl-0 = <&spdifout>;
+ pinctrl-1 = <&spdifout_a_mute>;
+
+ /*spdif clk tuning enable*/
+ clk_tuning_enable = <1>;
+
+ status = "okay";
+ };
+ spdifb: spdif@1 {
+ compatible = "amlogic, tm2-revb-snd-spdif-b";
+ #sound-dai-cells = <0>;
+ /* For NSK2 Smartcard
+ * clocks = <&clkc CLKID_MPLL3
+ */
+ clocks = <&clkc CLKID_MPLL2 /*CLKID_HIFI_PLL*/
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+ &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+ clock-names = "sysclk",
+ "gate_spdifout", "clk_spdifout";
+
+ status = "okay";
+ };
+ apdm: pdm {
+ compatible = "amlogic, sc2-snd-pdm";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+
+ /* mode 0~4, defalut:1 */
+ filter_mode = <1>;
+
+ train_sample_count = <0xe>;
+
+ status = "okay";
+ };
+
+ asrca: resample@0 {
+ compatible = "amlogic, tm2-revb-resample-a";
+ clocks = <&clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_MCLK_F
+ &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ */
+ resample_module = <4>;
+ status = "disabled";
+ };
+
+ vad:vad {
+ compatible = "amlogic, snd-vad";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_VAD>;
+ clock-names = "gate", "pll", "clk";
+
+ interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 44 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_wakeup", "irq_frame_sync";
+
+ /*
+ * Data src sel:
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ * 5: loopback_b;
+ * 6: tdmin_lb;
+ * 7: loopback_a;
+ */
+ src = <4>;
+
+ /*
+ * deal with hot word in user space or kernel space
+ * 0: in user space
+ * 1: in kernel space
+ */
+ level = <1>;
+
+ status = "okay";
+ };
+
+ loopbacka:loopback@0 {
+ compatible = "amlogic, tm2-revb-loopbacka";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ /* For NSK2 Smartcard
+ * &clkc CLKID_MPLL3
+ */
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <0>;
+ datain_chmask = <0x0>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <0 0 0 0>;
+
+ /* calc mclk for datalb */
+ mclk-fs = <256>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <1>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "okay";
+ };
+
+ loopbackb:loopback@1 {
+ compatible = "amlogic, tm2-revb-loopbackb";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ /* For NSK2 Smartcard
+ * &clkc CLKID_MPLL3
+ */
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* calc mclk for datain_lb */
+ mclk-fs = <256>;
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <1>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "disabled";
+ };
+ aed:effect {
+ compatible = "amlogic, snd-effect-v3";
+ #sound-dai-cells = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_EQDRC>;
+ clock-names = "gate", "srcpll", "eqdrc";
+ /*
+ * 0:tdmout_a
+ * 1:tdmout_b
+ * 2:tdmout_c
+ * 3:spdifout
+ * 4:spdifout_b
+ */
+ eqdrc_module = <1>;
+ /* max 0xf, each bit for one lane, usually one lane */
+ lane_mask = <0x1>;
+ /* max 0xff, each bit for one channel */
+ channel_mask = <0x3>;
+ status = "okay";
+ };
+}; /* end of audiobus */
+
+&earc {
+ status = "disabled";
+};
+
+&pinctrl_audio {
+ tdm_d3_pins: tdm_d3_pin {
+ mux {
+ groups = "tdm_d3";
+ function = "tdmina_lane1";
+ };
+ };
+
+ tdm_d4_pins: tdm_d4_pin {
+ mux {
+ groups = "tdm_d4";
+ function = "tdmouta_lane0";
+ };
+ };
+
+ tdm_clk_pins: tdm_clk_pin {
+ mux {
+ groups = "tdm_sclk0", "tdm_lrclk0";
+ function = "tdm_clk_outa";
+ };
+ };
+};
+
+&periphs_pinctrl {
+ tdm_a: tdm_a {
+ mux { /* GPIOX_11, GPIOX_10, GPIOX_8, GPIOX_9 */
+ groups = "tdm_sclk0",
+ "tdm_fs0",
+ "tdm_d3",
+
+ /* Disable for NSK2 Smartcard */
+ "tdm_d4";
+
+ function = "tdm";
+ };
+ };
+
+ tdmin_a: tdmin_a {
+ mux { /* GPIOX_8 */
+ groups = "tdma_din1";
+ function = "tdma_in";
+ };
+ };
+
+ tdmb_mclk: tdmb_mclk {
+ mux {
+ groups = "mclk0_a";
+ function = "mclk0";
+ drive-strength = <2>;
+ };
+ };
+ tdmout_b: tdmout_b {
+ mux { /* GPIOA_1, GPIOA_2, GPIOA_3 */
+ groups = "tdmb_sclk",
+ "tdmb_fs",
+ "tdmb_dout0";
+ function = "tdmb_out";
+ drive-strength = <2>;
+ };
+ };
+
+ tdmin_b:tdmin_b {
+ mux { /* GPIOA_4 */
+ groups = "tdmb_din1"
+ /*,"tdmb_slv_sclk", "tdmb_slv_fs"*/;
+ function = "tdmb_in";
+ drive-strength = <2>;
+ };
+ };
+
+ tdmc_mclk: tdmc_mclk {
+ mux { /* GPIOA_11 */
+ groups = "mclk1_a";
+ function = "mclk1";
+ };
+ };
+
+ tdmout_c:tdmout_c {
+ mux { /* GPIOA_12, GPIOA_13 */
+ groups = "tdmc_sclk_a",
+ "tdmc_fs_a"
+ /*, "tdmc_dout0_a"
+ *, "tdmc_dout2"
+ *, "tdmc_dout3"
+ */;
+ function = "tdmc_out";
+ };
+ };
+
+ tdmin_c:tdmin_c {
+ mux { /* GPIOA_10 */
+ groups = "tdmc_din0_a";
+ function = "tdmc_in";
+ };
+ };
+
+ spdifin: spdifin {
+ mux {/* GPIOH_5 */
+ groups = "spdif_in_h";
+ function = "spdif_in";
+ };
+ };
+
+ pdmin: pdmin {
+ mux { /* GPIOC_0, GPIOC_4 */
+ groups = "pdm_din0_c",
+ "pdm_dclk_c";
+ function = "pdm";
+ };
+ };
+
+ spdifout: spdifout {
+ mux { /* GPIOD_10 */
+ groups = "spdif_out_d";
+ function = "spdif_out";
+ };
+ };
+
+ spdifout_a_mute: spdifout_a_mute {
+ mux { /* GPIOD_10 */
+ groups = "GPIOD_10";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+ dvb_s_ts0_pins: dvb_s_ts0_pins {
+ tsin_a {
+ groups = "tsin_a_sop_d",
+ "tsin_a_valid_d",
+ "tsin_a_clk_d",
+ "tsin_a_din0_d";
+ function = "tsin_a";
+ };
+ };
+
+ dvb_s_ts1_pins: dvb_s_ts1_pins {
+ tsin_b {
+ groups = "tsin_b_sop",
+ "tsin_b_valid",
+ "tsin_b_clk",
+ "tsin_b_din0";
+ function = "tsin_b";
+ };
+ };
+
+ dvb_s_ts2_pins: dvb_s_ts2_pins {
+ tsin_c {
+ groups = "tsin_c_sop_z",
+ "tsin_c_valid_z",
+ "tsin_c_clk_z",
+ "tsin_c_din0_z";
+ function = "tsin_c";
+ };
+ };
+
+ dvb_s_ts3_pins: dvb_s_ts3_pins {
+ tsin_d {
+ groups = "tsin_d_sop_z",
+ "tsin_d_valid_z",
+ "tsin_d_clk_z",
+ "tsin_d_din0_z";
+ function = "tsin_d";
+ };
+ };
+}; /* end of periphs_pinctrl */
+
+&audio_data {
+ status = "okay";
+};
+
+&dwc2_a {
+ status = "okay";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <3>;
+};
+
+&dwc3 {
+ status = "okay";
+};
+
+&usb2_phy_v2 {
+ status = "okay";
+ portnum = <2>;
+};
+
+&usb3_phy_v2 {
+ status = "okay";
+ portnum = <1>;
+ otg = <1>;
+ /*gpio-vbus-power = "GPIOH_6";*/
+ /*gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;*/
+};
+
+&pcie {
+ reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ memory-region = <&pcie_reserved>;
+ status = "disable";
+};
+
+/* SDIO */
+&sd_emmc_a {
+ status = "okay";
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-1 = <&sdio_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ max-frequency = <200000000>;
+
+ non-removable;
+ disable-wp;
+
+ //vmmc-supply = <&vddao_3v3>;
+ //vqmmc-supply = <&vddio_ao1v8>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_pins>;
+ pinctrl-2 = <&sd_1bit_pins>;
+ pinctrl-3 = <&sd_to_ao_uart_clr_pins
+ &sdcard_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sdcard_pins &ao_uart_pins>;
+ pinctrl-6 = <&sd_to_ao_uart_clr_pins
+ &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sdcard_pins &ao_uart_pins>;
+ pinctrl-8 = <&sd_to_ao_uart_clr_pins
+ &ao_to_sd_uart_pins>;
+ pinctrl-names = "sd_default",
+ "clk-gate",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "sd_to_ao_jtag_pins",
+ "ao_to_sd_jtag_pins";
+ bus-width = <4>;
+ cap-sd-highspeed;
+// sd-uhs-sdr12;
+// sd-uhs-sdr25;
+// sd-uhs-sdr50;
+// sd-uhs-sdr104;
+ max-frequency = <200000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
+ dat1-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>;
+ //vmmc-supply = <&vddao_3v3>;
+ //vqmmc-supply = <&emmc_1v8>;
+};
+
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ //mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+
+// mmc-pwrseq = <&emmc_pwrseq>;
+// vmmc-supply = <&vddao_3v3>;
+// vqmmc-supply = <&vddao_1v8>;
+};
+
+&saradc {
+ status = "okay";
+};
+
+ðmac {
+ status = "okay";
+ phy-handle = <&internal_ephy>;
+ phy-mode = "rmii";
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_pins>;
+ pinctrl-names = "default";
+};
+
+&spicc0 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc0_pins_x>;
+ cs-gpios = <&gpio GPIOX_10 0>;
+};
+
+&spicc1 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc1_pins_h>;
+ cs-gpios = <&gpio GPIOH_6 0>;
+};
+
+&spifc {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spifc_pins>;
+ spi-nand@0 {
+ compatible = "spi-nand";
+ status = "disabled";
+ reg = <0>;
+ spi-max-frequency = <96000000>;
+ bl_mode = <1>;
+ fip_copies = <4>;
+ fip_size = <0x200000>;
+ partition = <&spinand_partitions>;
+ spinand_partitions: spinand_partitions{
+ bootloader{
+ offset=<0x0 0x0>;
+ size=<0x0>;
+ };
+ tpl{
+ offset=<0x0 0x0>;
+ size=<0x0>;
+ };
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x1000000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x4000000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0>;
+ };
+ };
+ };
+};
+
+&mtd_nand {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "nand_norb_mod","nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&nand_cs_pins>;
+ bl_mode = <1>;
+ fip_copies = <4>;
+ fip_size = <0x200000>;
+ ship_bad_block = <1>;
+ disa_irq_flag = <1>;
+ nand@bootloader {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-ecc-maximize;
+ partition@0 {
+ label = "bootloader";
+ reg = <0x0 0x00000000>;
+ };
+ };
+ nand@normal {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-ecc-maximize;
+
+ partition@0 {
+ label = "bl2e";
+ reg = <0x0 0x00000000>;
+ };
+ partition@1 {
+ label = "bl2x";
+ reg = <0x0 0x00000000>;
+ };
+ partition@2 {
+ label = "ddrfip";
+ reg = <0x0 0x00000000>;
+ };
+ partition@3 {
+ label = "tpl";
+ reg = <0x0 0x00000000>;
+ };
+ partition@4 {
+ label = "logo";
+ reg = <0x0 0x00200000>;
+ };
+ partition@5 {
+ label = "recovery";
+ reg = <0x0 0x1000000>;
+ };
+ partition@6 {
+ label = "boot";
+ reg = <0x0 0x0F00000>;
+ };
+ partition@7 {
+ label = "system";
+ reg = <0x0 0x11800000>;
+ };
+ partition@8 {
+ label = "data";
+ reg = <0x0 0xffffffff>;
+ };
+ };
+};
+
+&fb {
+ status = "disabled";
+ display_size_default = <1920 1080 1920 2160 32>;
+ mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>;
+ logo_addr = "0x7f800000";
+ mem_alloc = <0>;
+ pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+};
+
+&drm_vpu {
+ status = "okay";
+ logo_addr = "0x7f800000";
+};
+
+&drm_amhdmitx {
+ status = "okay";
+ hdcp = "okay";
+};
+
+&drm_amcvbsout {
+ status = "okay";
+};
+
+&drm_lcd {
+ status = "disable";
+};
+
+&amhdmitx {
+ status = "okay";
+};
+
+/*if you want to use vdin just modify status to "ok"*/
+&vdin0 {
+ /*compatible = "amlogic, vdin-sc2";*/
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ status = "okay";
+ /* up to 1920x1080 yuv422 8bit and 5 buffers
+ * 1920x1080x2x5 = 20 M
+ */
+ cma_size = <20>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <0x1>;
+};
+
+&vdin1 {
+ /*compatible = "amlogic, vdin-sc2";*/
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+};
+
+&aml_wifi{
+ status = "okay";
+ interrupt-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ power_on-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>;
+};
+
+&aml_bt {
+ status = "okay";
+ reset-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ hostwake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
+};
+
+&pwm_ef {
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&irblaster {
+ status = "disabled";
+};
+
+&uart_E {
+ status = "okay";
+ uart-has-rtscts;
+};
diff --git a/arch/arm/configs/amlogic_gki.debug b/arch/arm/configs/amlogic_gki.debug
new file mode 100644
index 0000000..21bdd30
--- /dev/null
+++ b/arch/arm/configs/amlogic_gki.debug
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+CONFIG_DEVTMPFS=y
+
+CONFIG_AMLOGIC_SERIAL_MESON=y
+
+CONFIG_AMLOGIC_DEBUG_FILE=y
+# ONFIG_AMLOGIC_SAMPLES_DEBUG_FILE_TEST=m
diff --git a/arch/arm/configs/amlogic_gki.fragment b/arch/arm/configs/amlogic_gki.fragment
new file mode 100644
index 0000000..2ae8337
--- /dev/null
+++ b/arch/arm/configs/amlogic_gki.fragment
@@ -0,0 +1,366 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+CONFIG_AMLOGIC_DRIVER=y
+CONFIG_AMLOGIC_BREAK_GKI=y
+CONFIG_AMLOGIC_MODIFY=y
+CONFIG_AMLOGIC_IN_KERNEL_MODULES=y
+CONFIG_AMLOGIC_CPU=y
+
+# amlogic-uart.ko
+CONFIG_AMLOGIC_SERIAL_MESON=m
+CONFIG_AMLOGIC_SERIAL_MESON_CONSOLE=y
+
+# debug builtin
+CONFIG_AMLOGIC_DEBUG_RELABEL_GKI=y
+
+# amlogic-clk.ko
+CONFIG_AMLOGIC_COMMON_CLK=m
+CONFIG_AMLOGIC_COMMON_CLK_MESON_AO_CLKC=y
+CONFIG_AMLOGIC_COMMON_CLK_MESON_CPU_DYNDIV=y
+CONFIG_AMLOGIC_COMMON_CLK_MESON_DUALDIV=y
+CONFIG_AMLOGIC_COMMON_CLK_MESON_EE_CLKC=y
+CONFIG_AMLOGIC_COMMON_CLK_MESON_MPLL=y
+CONFIG_AMLOGIC_COMMON_CLK_MESON_PHASE=y
+CONFIG_AMLOGIC_COMMON_CLK_MESON_PLL=y
+CONFIG_AMLOGIC_COMMON_CLK_MESON_REGMAP=y
+CONFIG_AMLOGIC_COMMON_CLK_MESON_SCLK_DIV=y
+CONFIG_AMLOGIC_COMMON_CLK_MESON_VID_PLL_DIV=y
+CONFIG_AMLOGIC_MESON_CLK_MEASURE=y
+CONFIG_AMLOGIC_CLK_DEBUG=y
+
+# amlogic-clk-soc-s4.ko
+CONFIG_AMLOGIC_COMMON_CLK_S4=m
+
+# amlogic-clk-soc-sc2.ko
+CONFIG_AMLOGIC_COMMON_CLK_SC2=m
+
+# amlogic-pinctrl.ko
+CONFIG_AMLOGIC_PINCTRL_MESON=m
+
+# amlogic-pinctrl-soc-s4.ko
+CONFIG_AMLOGIC_PINCTRL_MESON_S4=m
+
+# amlogic-pinctrl-soc-sc2.ko
+CONFIG_AMLOGIC_PINCTRL_MESON_SC2=m
+
+# amlogic-irqchip.ko
+CONFIG_AMLOGIC_MESON_IRQ_GPIO=m
+
+# amlogic-secmon.ko
+CONFIG_AMLOGIC_SECMON=m
+
+# amlogic-power.ko
+CONFIG_AMLOGIC_POWER=m
+
+# amlogic-cpuinfo.ko
+CONFIG_AMLOGIC_CPU_INFO=m
+
+# amlogic-media.ko
+CONFIG_AMLOGIC_MEDIA_MODULE=m
+CONFIG_AMLOGIC_MEDIA_ENABLE=y
+CONFIG_AMLOGIC_MEDIA_COMMON=y
+CONFIG_AMLOGIC_MEDIA_DRIVERS=y
+CONFIG_AMLOGIC_MEDIA_MULTI_DEC=y
+CONFIG_AMLOGIC_MEDIA_CANVAS=y
+CONFIG_AMLOGIC_MEDIA_GE2D=y
+CONFIG_AMLOGIC_ION=y
+CONFIG_AMLOGIC_ION_DEV=y
+CONFIG_AMLOGIC_ION_SYSTEM_HEAP=y
+CONFIG_AMLOGIC_MEDIA_VFM=y
+CONFIG_AMLOGIC_VPU=y
+CONFIG_AMLOGIC_MEDIA_RDMA=y
+CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA=y
+CONFIG_AMLOGIC_MEDIA_CODEC_MM=y
+CONFIG_AMLOGIC_MEDIA_RESMANAGE=y
+CONFIG_AMLOGIC_VIDEOBUF_RESOURCE=y
+CONFIG_AMLOGIC_MEDIA_SECURITY=y
+CONFIG_AMLOGIC_MEDIA_VIDEO=y
+CONFIG_AMLOGIC_VOUT=y
+CONFIG_AMLOGIC_VOUT_CLK_SERVE=y
+CONFIG_AMLOGIC_VOUT_SERVE=y
+CONFIG_AMLOGIC_VOUT2_SERVE=y
+CONFIG_AMLOGIC_VOUT3_SERVE=y
+CONFIG_AMLOGIC_HDMITX=y
+CONFIG_AMLOGIC_HDMITX21=y
+CONFIG_AMLOGIC_LCD=y
+CONFIG_AMLOGIC_LCD_TV=y
+CONFIG_AMLOGIC_LCD_TABLET=y
+CONFIG_AMLOGIC_LCD_EXTERN=y
+CONFIG_AMLOGIC_BACKLIGHT=y
+CONFIG_AMLOGIC_BL_EXTERN=y
+CONFIG_AMLOGIC_BL_LDIM=y
+CONFIG_AMLOGIC_BL_LDIM_IW7027=y
+CONFIG_AMLOGIC_BL_LDIM_BLMCU=y
+CONFIG_AMLOGIC_CVBS_OUTPUT=y
+CONFIG_AMLOGIC_WSS=y
+CONFIG_AMLOGIC_VDAC=y
+CONFIG_AMLOGIC_MEDIA_VRR=y
+# CONFIG_AMLOGIC_MEDIA_FB=y
+# CONFIG_AMLOGIC_MEDIA_FB_OSD_SYNC_FENCE=y
+# CONFIG_AMLOGIC_MEDIA_FB_OSD_VSYNC_RDMA=y
+# CONFIG_AMLOGIC_MEDIA_FB_OSD2_ENABLE=y
+# CONFIG_AMLOGIC_MEDIA_FB_OSD2_CURSOR=y
+CONFIG_AMLOGIC_MEDIA_VIDEO_PROCESSOR=y
+CONFIG_AMLOGIC_POST_PROCESS_MANAGER=y
+CONFIG_AMLOGIC_MEDIA_UTILS=m
+CONFIG_AMLOGIC_PIC_DEC=y
+CONFIG_AMLOGIC_MEDIA_ENHANCEMENT=y
+CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION=y
+CONFIG_AMLOGIC_MEDIA_FRAME_SYNC=y
+CONFIG_AMLOGIC_MEDIA_DEINTERLACE=y
+CONFIG_AMLOGIC_DI_V4L=y
+CONFIG_AMLOGIC_V4L_VIDEO=y
+CONFIG_AMLOGIC_V4L_VIDEO2=y
+CONFIG_AMLOGIC_VIDEOBUF2_ION=y
+CONFIG_AMLOGIC_IONVIDEO=y
+CONFIG_AMLOGIC_V4L_VIDEO3=y
+CONFIG_AMLOGIC_VIDEO_COMPOSER=y
+CONFIG_AMLOGIC_VIDEO_PP_COMMON=y
+CONFIG_AMLOGIC_VIDEO_TUNNEL=y
+CONFIG_AMLOGIC_VIDEOQUEUE=y
+CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM=y
+CONFIG_AMLOGIC_MEDIA_FRC=y
+CONFIG_AMLOGIC_MEDIA_GDC=y
+CONFIG_AMLOGIC_MEDIA_ADC=y
+CONFIG_AMLOGIC_MEDIA_VIN=y
+CONFIG_AMLOGIC_MEDIA_TVIN=y
+CONFIG_AMLOGIC_MEDIA_VDIN=y
+CONFIG_AMLOGIC_MEDIA_TVIN_HDMI=y
+CONFIG_AMLOGIC_MEDIA_TVIN_AFE=y
+CONFIG_AMLOGIC_MEDIA_TVIN_VBI=y
+CONFIG_AMLOGIC_MEDIA_TVIN_AVDETECT=y
+CONFIG_AMLOGIC_MEDIA_VIUIN=y
+CONFIG_AMLOGIC_CEC=y
+CONFIG_AMLOGIC_AO_CEC=y
+CONFIG_AMLOGIC_MEDIA_TVIN_BT656=y
+CONFIG_AMLOGIC_UVM_CORE=y
+CONFIG_AMLOGIC_UVM_ALLOCATOR=y
+CONFIG_AMLOGIC_ESM=y
+CONFIG_AMLOGIC_MEDIA_LUT_DMA=y
+CONFIG_AMLOGIC_ATV_DEMOD=y
+CONFIG_AMLOGIC_DTV_DEMOD=y
+CONFIG_AMLOGIC_MEDIA_MSYNC=y
+CONFIG_AMLOGIC_SECURE_DMABUF=y
+CONFIG_AMLOGIC_HEAP_CMA=y
+#CONFIG_AMLOGIC_HEAP_CMA_SECURE=y
+# CONFIG_DVB_CORE=y
+# CONFIG_FB=y
+
+# amlogic-pm.ko
+CONFIG_AMLOGIC_GX_SUSPEND=m
+CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND=y
+
+# amlogic-gpiolib.ko
+CONFIG_AMLOGIC_GPIOLIB=m
+
+# amlogic-wifi.ko
+CONFIG_AMLOGIC_WIFI=m
+
+# amlogic-bluetooth.ko
+CONFIG_AMLOGIC_BLUETOOTH=m
+
+# amlogic-input-gpiokey.ko
+CONFIG_AMLOGIC_GPIO_KEY=m
+
+# amlogic-i2c.ko
+CONFIG_AMLOGIC_I2C_MESON=m
+CONFIG_I2C_CHARDEV=m
+
+# amlogic-spi.ko
+CONFIG_AMLOGIC_SPI=m
+CONFIG_AMLOGIC_SPI_MESON_SPICC=y
+CONFIG_AMLOGIC_SPI_MESON_SPIFC=y
+CONFIG_AMLOGIC_SPI_MESON_SPICC_SLAVE=y
+
+# amlogic-tee.ko
+CONFIG_AMLOGIC_TEE=m
+
+# amlogic-gkitool.ko
+CONFIG_AMLOGIC_GKI_TOOL=m
+CONFIG_AMLOGIC_GKI_CONFIG=y
+
+# amlogic-ir.ko
+CONFIG_AMLOGIC_MESON_IR=m
+
+# amlogic-pwm.ko
+CONFIG_AMLOGIC_PWM_MESON=m
+
+# pwm-regulator.ko
+CONFIG_REGULATOR_PWM=m
+
+# amlogic-cpufreq.ko
+CONFIG_AMLOGIC_MESON_CPUFREQ=m
+
+# amlogic-efuse-unifykey.ko
+CONFIG_AMLOGIC_EFUSE_UNIFYKEY=m
+CONFIG_AMLOGIC_EFUSE=y
+CONFIG_AMLOGIC_EFUSE_BURN=y
+CONFIG_AMLOGIC_UNIFYKEY=y
+
+# amlogic-mailbox.ko
+CONFIG_AMLOGIC_MHU_MBOX=m
+
+# amlogic-jtag.ko
+CONFIG_AMLOGIC_JTAG_MESON=m
+
+# amlogic-watchdog.ko
+CONFIG_AMLOGIC_MESON_GXBB_WATCHDOG=m
+# CONFIG_WATCHDOG_SYSFS=y
+
+# amlogic-reg.ko
+CONFIG_AMLOGIC_REG_ACCESS=m
+
+# amlogic-adc.ko
+CONFIG_AMLOGIC_MESON_SARADC=m
+CONFIG_AMLOGIC_IIO_KFIFO_BUF=y
+
+# amlogic-rng.ko
+CONFIG_AMLOGIC_HW_RANDOM_MESON=m
+
+# amlogic-socinfo.ko
+# CONFIG_AMLOGIC_SOC_INFO=m
+
+# amlogic-reset.ko
+CONFIG_AMLOGIC_RESET_MESON=m
+
+# amlogic-ddr-tool.ko
+CONFIG_AMLOGIC_DDR_TOOL=m
+CONFIG_AMLOGIC_DDR_BANDWIDTH=y
+CONFIG_AMLOGIC_DDR_BANDWIDTH_S4=y
+CONFIG_AMLOGIC_DDR_BANDWIDTH_G12=y
+CONFIG_AMLOGIC_DMC_MONITOR=y
+CONFIG_AMLOGIC_DMC_MONITOR_S4=y
+CONFIG_AMLOGIC_DMC_MONITOR_TM2=y
+CONFIG_AMLOGIC_DMC_MONITOR_G12=y
+
+# amlogic-rtc.ko
+CONFIG_AMLOGIC_RTC_DRV_MESON_VRTC=m
+
+# amlogic-irblaster.ko
+CONFIG_AMLOGIC_IRBLASTER=m
+
+# amlogic-input-adckey.ko
+CONFIG_AMLOGIC_ADC_KEYPADS=m
+
+# amlogic-thermal.ko
+CONFIG_AMLOGIC_AMLOGIC_THERMAL=m
+CONFIG_AMLOGIC_COOLDEV=y
+CONFIG_AMLOGIC_CPUCORE_THERMAL=y
+CONFIG_AMLOGIC_GPU_THERMAL=y
+CONFIG_AMLOGIC_GPUCORE_THERMAL=y
+CONFIG_AMLOGIC_DDR_THERMAL=y
+
+# amlogic-hifidsp.ko
+CONFIG_AMLOGIC_HIFI4DSP=m
+
+# amlogic-mmc.ko
+CONFIG_AMLOGIC_MMC_MESON_GX=m
+
+# amlogic-reboot.ko
+CONFIG_AMLOGIC_GX_REBOOT=m
+
+# amlogic-crypto-dma.ko
+CONFIG_AMLOGIC_CRYPTO_DMA=m
+CONFIG_CRYPTO_DES=y
+
+# amlogic-snd-soc.ko
+CONFIG_AMLOGIC_SND_SOC=m
+CONFIG_AMLOGIC_SND_SOC_AUGE=y
+CONFIG_AMLOGIC_SND_SOC_COMMON=y
+
+# amlogic-snd-codec
+CONFIG_AMLOGIC_SND_SOC_CODECS=y
+
+# amlogic-snd-codec-dummy.ko
+CONFIG_AMLOGIC_SND_CODEC_DUMMY_CODEC=m
+
+# amlogic-snd-codec-t9015.ko
+CONFIG_AMLOGIC_SND_CODEC_AMLT9015=m
+
+# usb xxx ko
+CONFIG_AMLOGIC_USB=y
+CONFIG_AMLOGIC_USB_HOST_ELECT_TEST=y
+CONFIG_AMLOGIC_USB_SUPPORT=m
+
+# amlogic_usb2_phy.ko
+CONFIG_AMLOGIC_USB2PHY=y
+
+# amlogic_usb3_v2_phy.ko
+CONFIG_AMLOGIC_USBPHY=y
+
+# amlogic_usb_otg.ko
+CONFIG_AMLOGIC_USB3PHY=y
+
+# amlogic_usb_crg.ko
+CONFIG_AMLOGIC_CRG=y
+
+# dwc_otg.ko
+CONFIG_AMLOGIC_USB_DWC_OTG_HCD=m
+
+# audio_data.ko
+CONFIG_AMLOGIC_AUDIO_INFO=m
+
+# audiodsp_module.ko
+CONFIG_AMLOGIC_AUDIO_DSP=m
+
+# amaudio.ko
+CONFIG_AMLOGIC_AMAUDIO=m
+
+# amlogic-dolbyfw.ko
+CONFIG_AMLOGIC_DOLBY_FW=m
+
+# etherent
+CONFIG_STMMAC_ETH=m
+CONFIG_DWMAC_MESON=m
+CONFIG_DWMAC_DWC_QOS_ETH=m
+#CONFIG_MDIO_BUS_MUX_MESON_G12A=m
+CONFIG_AMLOGIC_MDIO_G12A=m
+CONFIG_AMLOGIC_INPHY=m
+CONFIG_AMLOGIC_ETH_PRIVE=m
+
+#smartcard_sc2
+CONFIG_AMLOGIC_SMARTCARD=m
+
+#enable dvb
+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
+CONFIG_DVB_CORE=m
+CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
+CONFIG_AMLOGIC_DVB_COMPAT=y
+
+# aml_dvb_extern.ko
+CONFIG_AMLOGIC_DVB_EXTERN=m
+
+# aml_aucpu.ko
+CONFIG_AMLOGIC_AUCPU=m
+
+# dvb_demux.ko
+CONFIG_AMLOGIC_DVB_DMX=m
+
+#dvb_dsm.ko
+CONFIG_AMLOGIC_DVB_DSM=m
+
+# aml_drm.ko
+CONFIG_AMLOGIC_DRM=m
+CONFIG_DRM_MESON=y
+#CONFIG_DRM_MESON_EMULATE_FBDEV=y
+CONFIG_DRM_MESON_VPU=y
+CONFIG_DRM_MESON_HDMI=y
+CONFIG_DRM_MESON_PANEL=y
+CONFIG_DRM_MESON_CVBS=y
+CONFIG_DRM_MESON_USE_ION=y
+
+CONFIG_ION=y
+CONFIG_ION_SYSTEM_HEAP=y
+
+#amlogic-pcie.ko
+CONFIG_AMLOGIC_PCIE_V2_HOST=m
+CONFIG_AMLOGIC_PCI_HOST=y
+
+#cfg80211.ko
+CONFIG_CFG80211=m
+
+#mac80211.ko
+CONFIG_MAC80211=m
+
+#ddr_scrambler.ko
+CONFIG_AMLOGIC_DDR_SCRAMBLER=m
diff --git a/arch/arm/configs/amlogic_gki.optimize b/arch/arm/configs/amlogic_gki.optimize
new file mode 100644
index 0000000..46feec1
--- /dev/null
+++ b/arch/arm/configs/amlogic_gki.optimize
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+# early console
+CONFIG_AMLOGIC_SERIAL_EARLY_CONSOLE=y
+
+# build in for amlogic memory change
+CONFIG_CMA_SIZE_MBYTES=8
+CONFIG_AMLOGIC_MEMORY_EXTEND=y
+CONFIG_AMLOGIC_PAGE_TRACE=y
+CONFIG_AMLOGIC_SLAB_TRACE=y
+CONFIG_AMLOGIC_CMA=y
+CONFIG_AMLOGIC_VMAP=y
+CONFIG_AMLOGIC_MEM_DEBUG=y
+CONFIG_AMLOGIC_FILE_CACHE=y
+CONFIG_AMLOGIC_STACKPROTECTOR=y
+CONFIG_AMLOGIC_USER_FAULT=y
+CONFIG_AMLOGIC_WATCHPOINT=y
+CONFIG_HAVE_HW_BREAKPOINT=y
+CONFIG_DMABUF_HEAPS_SYSTEM=m
+CONFIG_AMLOGIC_ZSTD=y
+CONFIG_DMA_RESTRICTED_POOL=n
+
+# debug builtin
+CONFIG_AMLOGIC_DEBUG=y
+CONFIG_AMLOGIC_DEBUG_LOCKUP=y
+CONFIG_AMLOGIC_DEBUG_ATRACE=y
+CONFIG_AMLOGIC_BOOT_TIME=y
+CONFIG_AMLOGIC_DEBUG_PRINTK=y
+CONFIG_AMLOGIC_DEBUG_FTRACE_PSTORE=y
+CONFIG_PSTORE_FTRACE=y
+CONFIG_FUNCTION_TRACER=y
+CONFIG_AMLOGIC_DEBUG_RELABEL=y
+CONFIG_AMLOGIC_DEBUG_RELABEL_GKI=n
+
+# amlogic-i2c.ko
+CONFIG_I2C_COMPAT=y
+
+# amlogic-cpuinfo.ko
+CONFIG_AMLOGIC_SHOW_CPU_CHIPID=y
+
+# usb xxx ko
+CONFIG_AMLOGIC_COMMON_USB=y
+
+#cfg80211.ko
+CONFIG_NL80211_TESTMODE=y
+CONFIG_CFG80211_WEXT=y
+
+# v4l2 vendor hooks
+CONFIG_ANDROID_KABI_RESERVE=y
+CONFIG_AMLOGIC_V4L2=y
diff --git a/arch/arm/configs/gki_defconfig b/arch/arm/configs/gki_defconfig
new file mode 100644
index 0000000..8033955
--- /dev/null
+++ b/arch/arm/configs/gki_defconfig
@@ -0,0 +1,652 @@
+CONFIG_KERNEL_LZO=y
+CONFIG_DEFAULT_HOSTNAME="(aml)"
+CONFIG_AUDIT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BPF_SYSCALL=y
+CONFIG_BPF_JIT=y
+CONFIG_BPF_JIT_ALWAYS_ON=y
+CONFIG_PREEMPT=y
+CONFIG_IRQ_TIME_ACCOUNTING=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_PSI=y
+CONFIG_RCU_EXPERT=y
+CONFIG_RCU_FAST_NO_HZ=y
+CONFIG_RCU_NOCB_CPU=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_IKHEADERS=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=14
+CONFIG_UCLAMP_TASK=y
+CONFIG_CGROUPS=y
+CONFIG_MEMCG=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_SCHED=y
+# CONFIG_FAIR_GROUP_SCHED is not set
+CONFIG_UCLAMP_TASK_GROUP=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_BPF=y
+CONFIG_NAMESPACES=y
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+# CONFIG_SYSFS_SYSCALL is not set
+# CONFIG_FHANDLE is not set
+CONFIG_KALLSYMS_ALL=y
+CONFIG_USERFAULTFD=y
+# CONFIG_RSEQ is not set
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB_MERGE_DEFAULT is not set
+CONFIG_PROFILING=y
+CONFIG_ARCH_VIRT=y
+# CONFIG_ARCH_MESON is not set
+# CONFIG_DEBUG_ALIGN_RODATA is not set
+CONFIG_SMP=y
+# CONFIG_SMP_ON_UP is not set
+CONFIG_SCHED_MC=y
+CONFIG_NR_CPUS=8
+CONFIG_HZ_250=y
+CONFIG_HIGHMEM=y
+# CONFIG_ATAGS is not set
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_ARM_PSCI_CPUIDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_PM_WAKELOCKS=y
+# CONFIG_PM_WAKELOCKS_GC is not set
+CONFIG_PM_DEBUG=y
+CONFIG_DPM_WATCHDOG=y
+CONFIG_DPM_WATCHDOG_TIMEOUT=20
+CONFIG_ENERGY_MODEL=y
+CONFIG_ARM_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM_CE=y
+CONFIG_CRYPTO_SHA2_ARM_CE=y
+CONFIG_CRYPTO_AES_ARM_CE=y
+CONFIG_CRYPTO_GHASH_ARM_CE=y
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+CONFIG_LOCK_EVENT_COUNTS=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_BLK_DEV_THROTTLING=y
+# CONFIG_BLK_DEBUG_FS is not set
+CONFIG_BLK_INLINE_ENCRYPTION=y
+CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_IOSCHED_BFQ=y
+CONFIG_BFQ_GROUP_IOSCHED=y
+CONFIG_GKI_HACKS_TO_FIX=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_CMA=y
+CONFIG_CMA_DEBUG=y
+CONFIG_CMA_DEBUGFS=y
+CONFIG_CMA_AREAS=12
+CONFIG_ZSMALLOC=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_XFRM_INTERFACE=y
+CONFIG_XFRM_MIGRATE=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_NET_KEY=y
+CONFIG_XDP_SOCKETS=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_NET_IPGRE_DEMUX=y
+CONFIG_NET_IPVTI=y
+CONFIG_INET_ESP=y
+CONFIG_INET_UDP_DIAG=y
+CONFIG_INET_DIAG_DESTROY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_VTI=y
+# CONFIG_IPV6_SIT is not set
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_NETFILTER=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_SECMARK=y
+# CONFIG_NF_CONNTRACK_PROCFS is not set
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
+CONFIG_NETFILTER_XT_TARGET_CT=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NETFILTER_XT_TARGET_SECMARK=y
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
+CONFIG_NETFILTER_XT_MATCH_BPF=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_OWNER=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_SECURITY=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_MATCH_RPFILTER=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_L2TP=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_NETEM=y
+CONFIG_NET_SCH_INGRESS=y
+CONFIG_NET_CLS_U32=y
+CONFIG_NET_CLS_BPF=y
+CONFIG_NET_CLS_MATCHALL=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+CONFIG_NET_ACT_BPF=y
+CONFIG_BT=y
+CONFIG_BT_HIDP=y
+# CONFIG_BT_LE is not set
+# CONFIG_BT_DEBUGFS is not set
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_CFG80211=y
+# CONFIG_CFG80211_DEFAULT_PS is not set
+# CONFIG_CFG80211_CRDA_SUPPORT is not set
+CONFIG_RFKILL=y
+CONFIG_RFKILL_INPUT=y
+CONFIG_RFKILL_GPIO=y
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIE_DW_PLAT_HOST=y
+CONFIG_PCIE_DW_PLAT_EP=y
+CONFIG_PCI_ENDPOINT=y
+CONFIG_DEVTMPFS=y
+# CONFIG_FW_CACHE is not set
+# CONFIG_ALLOW_DEV_COREDUMP is not set
+CONFIG_MTD=y
+# CONFIG_MTD_OF_PARTS is not set
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_NAND_MESON=y
+# CONFIG_MTD_SPI_NAND is not set
+CONFIG_MTD_SPI_NOR=y
+CONFIG_ZRAM=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=16
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_UID_SYS_STATS=y
+CONFIG_SCSI=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
+CONFIG_DM_DEFAULT_KEY=y
+CONFIG_DM_SNAPSHOT=y
+CONFIG_DM_UEVENT=y
+CONFIG_DM_VERITY=y
+CONFIG_DM_VERITY_FEC=y
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+CONFIG_TUN=y
+CONFIG_VETH=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_ADAPTEC is not set
+# CONFIG_NET_VENDOR_AGERE is not set
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+# CONFIG_NET_VENDOR_ALTEON is not set
+# CONFIG_NET_VENDOR_AMAZON is not set
+# CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_VENDOR_AQUANTIA is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_ATHEROS is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_CISCO is not set
+# CONFIG_NET_VENDOR_CORTINA is not set
+# CONFIG_NET_VENDOR_DEC is not set
+# CONFIG_NET_VENDOR_DLINK is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_GOOGLE is not set
+# CONFIG_NET_VENDOR_HISILICON is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MELLANOX is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_MICROSEMI is not set
+# CONFIG_NET_VENDOR_MYRI is not set
+# CONFIG_NET_VENDOR_NI is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NETERION is not set
+# CONFIG_NET_VENDOR_NETRONOME is not set
+# CONFIG_NET_VENDOR_NVIDIA is not set
+# CONFIG_NET_VENDOR_OKI is not set
+# CONFIG_NET_VENDOR_PACKET_ENGINES is not set
+# CONFIG_NET_VENDOR_PENSANDO is not set
+# CONFIG_NET_VENDOR_QLOGIC is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_RDC is not set
+# CONFIG_NET_VENDOR_REALTEK is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SILAN is not set
+# CONFIG_NET_VENDOR_SIS is not set
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
+CONFIG_STMMAC_ETH=y
+CONFIG_DWMAC_DWC_QOS_ETH=y
+# CONFIG_DWMAC_GENERIC is not set
+# CONFIG_NET_VENDOR_SUN is not set
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_TEHUTI is not set
+# CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_NET_VENDOR_XILINX is not set
+CONFIG_MESON_GXL_PHY=y
+CONFIG_MDIO_BUS_MUX_MESON_G12A=y
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPTP=y
+CONFIG_PPPOL2TP=y
+CONFIG_USB_RTL8152=y
+CONFIG_USB_USBNET=y
+# CONFIG_USB_NET_CDC_NCM is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_WLAN_VENDOR_ADMTEK is not set
+# CONFIG_WLAN_VENDOR_ATH is not set
+# CONFIG_WLAN_VENDOR_ATMEL is not set
+# CONFIG_WLAN_VENDOR_BROADCOM is not set
+# CONFIG_WLAN_VENDOR_CISCO is not set
+# CONFIG_WLAN_VENDOR_INTEL is not set
+# CONFIG_WLAN_VENDOR_INTERSIL is not set
+# CONFIG_WLAN_VENDOR_MARVELL is not set
+# CONFIG_WLAN_VENDOR_MEDIATEK is not set
+# CONFIG_WLAN_VENDOR_RALINK is not set
+# CONFIG_WLAN_VENDOR_REALTEK is not set
+# CONFIG_WLAN_VENDOR_RSI is not set
+# CONFIG_WLAN_VENDOR_ST is not set
+# CONFIG_WLAN_VENDOR_TI is not set
+# CONFIG_WLAN_VENDOR_ZYDAS is not set
+# CONFIG_WLAN_VENDOR_QUANTENNA is not set
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_TABLET=y
+CONFIG_TABLET_USB_ACECAD=y
+CONFIG_TABLET_USB_AIPTEK=y
+CONFIG_TABLET_USB_HANWANG=y
+CONFIG_TABLET_USB_KBTAB=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+# CONFIG_SERIO is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_DEVMEM is not set
+# CONFIG_DEVPORT is not set
+CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_HELPER_AUTO is not set
+CONFIG_I2C_MESON=y
+CONFIG_SPI=y
+CONFIG_SPI_MESON_SPICC=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_SPMI=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_STATISTICS=y
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=200
+CONFIG_THERMAL_WRITABLE_TRIPS=y
+CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y
+CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
+CONFIG_CPU_THERMAL=y
+CONFIG_DEVFREQ_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_WATCHDOG=y
+CONFIG_MESON_GXBB_WATCHDOG=y
+CONFIG_MFD_ROHM_BD718XX=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_BD718XX=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_VCTRL=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_DVB_PLATFORM_DRIVERS=y
+# CONFIG_CXD2880_SPI_DRV is not set
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MSI001 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2063 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_XC4000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+# CONFIG_MEDIA_TUNER_FC0011 is not set
+# CONFIG_MEDIA_TUNER_FC0012 is not set
+# CONFIG_MEDIA_TUNER_FC0013 is not set
+# CONFIG_MEDIA_TUNER_TDA18212 is not set
+# CONFIG_MEDIA_TUNER_E4000 is not set
+# CONFIG_MEDIA_TUNER_FC2580 is not set
+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+# CONFIG_MEDIA_TUNER_TUA9001 is not set
+# CONFIG_MEDIA_TUNER_SI2157 is not set
+# CONFIG_MEDIA_TUNER_IT913X is not set
+# CONFIG_MEDIA_TUNER_R820T is not set
+# CONFIG_MEDIA_TUNER_MXL301RF is not set
+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
+# CONFIG_VGA_ARB is not set
+CONFIG_DRM=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_PCI is not set
+CONFIG_SND_USB_AUDIO=y
+CONFIG_SND_SOC=y
+CONFIG_HIDRAW=y
+CONFIG_UHID=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_ACRUX=y
+CONFIG_HID_ACRUX_FF=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_PRODIKEYS=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_HID_EMS_FF=y
+CONFIG_HID_ELECOM=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_HOLTEK=y
+CONFIG_HID_KEYTOUCH=y
+CONFIG_HID_KYE=y
+CONFIG_HID_UCLOGIC=y
+CONFIG_HID_WALTOP=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LCPOWER=y
+CONFIG_HID_LOGITECH=y
+CONFIG_HID_LOGITECH_DJ=y
+CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_HID_NINTENDO=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_ORTEK=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_PICOLCD=y
+CONFIG_HID_PLAYSTATION=y
+CONFIG_PLAYSTATION_FF=y
+CONFIG_HID_PRIMAX=y
+CONFIG_HID_ROCCAT=y
+CONFIG_HID_SAITEK=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_SONY_FF=y
+CONFIG_HID_SPEEDLINK=y
+CONFIG_HID_STEAM=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_HID_TIVO=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_HID_WACOM=y
+CONFIG_HID_WIIMOTE=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_HID_ZYDACRON=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_OTG=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_MESON_G12A is not set
+CONFIG_USB_GPIO_VBUS=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_SNP_UDC_PLAT=y
+CONFIG_USB_BDC_UDC=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_UEVENT=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_RNDIS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_MMC=y
+# CONFIG_PWRSEQ_SIMPLE is not set
+CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_MESON_GX=y
+CONFIG_MMC_CQHCI=y
+CONFIG_LEDS_CLASS_FLASH=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_INTF_PROC is not set
+CONFIG_RTC_DRV_MESON_VRTC=y
+CONFIG_SW_SYNC=y
+CONFIG_DMABUF_HEAPS=y
+CONFIG_DMABUF_SYSFS_STATS=y
+CONFIG_UIO=y
+CONFIG_STAGING=y
+CONFIG_ASHMEM=y
+CONFIG_COMMON_CLK_BD718XX=y
+CONFIG_HWSPINLOCK=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_PM_DEVFREQ=y
+CONFIG_DEVFREQ_GOV_PERFORMANCE=y
+CONFIG_DEVFREQ_GOV_PASSIVE=y
+CONFIG_EXTCON_USB_GPIO=y
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+CONFIG_IIO_TRIGGER=y
+CONFIG_PWM=y
+CONFIG_PWM_MESON=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_BINDERFS=y
+CONFIG_ANDROID_VENDOR_HOOKS=y
+CONFIG_INTERCONNECT=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_F2FS_FS=y
+CONFIG_F2FS_FS_SECURITY=y
+CONFIG_FS_ENCRYPTION=y
+CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y
+CONFIG_FS_VERITY=y
+CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y
+CONFIG_QUOTA=y
+CONFIG_QFMT_V2=y
+CONFIG_FUSE_FS=y
+CONFIG_OVERLAY_FS=y
+CONFIG_INCREMENTAL_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_EXFAT_FS=y
+CONFIG_NTFS3_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_PSTORE=y
+CONFIG_PSTORE_CONSOLE=y
+CONFIG_PSTORE_PMSG=y
+CONFIG_PSTORE_FTRACE=y
+CONFIG_PSTORE_RAM=y
+CONFIG_EROFS_FS=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_UNICODE=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_HARDENED_USERCOPY=y
+# CONFIG_HARDENED_USERCOPY_FALLBACK is not set
+CONFIG_STATIC_USERMODEHELPER=y
+CONFIG_STATIC_USERMODEHELPER_PATH=""
+CONFIG_SECURITY_SELINUX=y
+# CONFIG_SECURITY_SELINUX_AVC_STATS is not set
+# CONFIG_INTEGRITY is not set
+CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y
+CONFIG_CRYPTO_CHACHA20POLY1305=y
+CONFIG_CRYPTO_XCBC=y
+CONFIG_CRYPTO_LZ4=y
+CONFIG_CRYPTO_LZ4HC=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_XZ_DEC=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=8
+CONFIG_CMA_ALIGNMENT=4
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+CONFIG_FRAME_WARN=2048
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_PAGE_EXTENSION=y
+CONFIG_PANIC_ON_OOPS=y
+CONFIG_PANIC_TIMEOUT=5
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHEDSTATS=y
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+CONFIG_BUG_ON_DATA_CORRUPTION=y
+CONFIG_CPU_HOTPLUG_STATE_CONTROL=y
+CONFIG_FUNCTION_TRACER=y
+CONFIG_SCHED_TRACER=y
+CONFIG_FTRACE_SYSCALLS=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+CONFIG_GPIOLIB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_MAILBOX=y
+CONFIG_ARM_SCPI_PROTOCOL=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_DWMAC_GENERIC=m
+CONFIG_CRYPTO_CCM=y
+CONFIG_DMABUF_HEAPS_DEFERRED_FREE=y
+CONFIG_DMABUF_HEAPS_PAGE_POOL=y
diff --git a/arch/arm64/boot/dts/amlogic/firmware_ab.dtsi b/arch/arm64/boot/dts/amlogic/firmware_ab.dtsi
index cdbcbb9..c857207 100644
--- a/arch/arm64/boot/dts/amlogic/firmware_ab.dtsi
+++ b/arch/arm64/boot/dts/amlogic/firmware_ab.dtsi
@@ -1,10 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Amlogic partition set for normal
- *
- * Copyright (c) 2017-2017 Amlogic Ltd
- *
- * This file is licensed under a dual GPLv2 or BSD license.
- *
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
*/
/ {
firmware {
diff --git a/arch/arm64/boot/dts/amlogic/partition_mbox_ab.dtsi b/arch/arm64/boot/dts/amlogic/partition_mbox_ab.dtsi
index 0b66994..bf7c583 100644
--- a/arch/arm64/boot/dts/amlogic/partition_mbox_ab.dtsi
+++ b/arch/arm64/boot/dts/amlogic/partition_mbox_ab.dtsi
@@ -1,10 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Amlogic partition set for normal
- *
- * Copyright (c) 2017-2017 Amlogic Ltd
- *
- * This file is licensed under a dual GPLv2 or BSD license.
- *
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
*/
#include "firmware_ab.dtsi"
diff --git a/build.config.amlogic b/build.config.amlogic
index 185876a..02a59d3 100644
--- a/build.config.amlogic
+++ b/build.config.amlogic
@@ -28,6 +28,7 @@
fi
DEFCONFIG=amlogic_gki_defconfig
+GKI_BASE_CONFIG=${KERNEL_DIR}/arch/arm64/configs/gki_defconfig
FRAGMENT_CONFIG=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/arch/arm64/configs/amlogic_gki.fragment
FRAGMENT_CONFIG_OPTIMIZE=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/arch/arm64/configs/amlogic_gki.optimize
FRAGMENT_CONFIG_DEBUG=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/arch/arm64/configs/amlogic_gki.debug
diff --git a/build.config.amlogic32 b/build.config.amlogic32
new file mode 100644
index 0000000..f5766d0
--- /dev/null
+++ b/build.config.amlogic32
@@ -0,0 +1,113 @@
+. ${ROOT_DIR}/${KERNEL_DIR}/build.config.common
+. ${ROOT_DIR}/${KERNEL_DIR}/build.config.arm
+. ${ROOT_DIR}/${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/amlogic_utils.sh
+
+DO_NOT_STRIP_MODULES= #strip modules
+# TOP_EXT_MODULE_COPY_BUILD=1
+# AUTO_ADD_EXT_SYMBOLS=1
+
+BUILD_INITRAMFS=${BUILD_INITRAMFS:-1}
+# LZ4_RAMDISK=${BUILD_INITRAMFS:-1}
+# BUILD_SYSTEM_DLKM=
+
+MODULES_ORDER=
+# COMPRESS_MODULES=1 # Package the unstripped modules for debugging
+
+MODULES_LIST=
+MODULES_BLOCKLIST=
+VENDOR_DLKM_MODULES_LIST=
+VENDOR_DLKM_MODULES_BLOCKLIST=
+
+TRIM_UNUSED_MODULES=1
+# BUILD_BOOT_IMG=1 # Need to add dtb files to FILES, otherwise an error occurs when building boot.img, such as s4d_s905y4_ap222_drm.dtb
+BUILD_VENDOR_BOOT_IMG=1 # boot.img and dtb.img will be built only when BUILD_BOOT_IMG and BUILD_VENDOR_BOOT_IMG are set to 1
+# KERNEL_BINARY=Image.lz4 # Need to set the value of AA, otherwise an error occurs when building boot.img,
+ # whether the value is Image.lz4 or vmlinux is uncertain due to different descriptions
+if [[ -n ${ANDROID_PROJECT} ]]; then
+ BUILD_DTBO_IMG=1 # Android requires dtbo
+ BUILD_GKI_BOOT_IMG_GZ_SIZE=67108864
+fi
+
+DEFCONFIG=amlogic_gki_defconfig
+GKI_BASE_CONFIG=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/arch/arm/configs/gki_defconfig
+
+FRAGMENT_CONFIG=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/arch/${ARCH}/configs/amlogic_gki.fragment
+FRAGMENT_CONFIG_OPTIMIZE=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/arch/${ARCH}/configs/amlogic_gki.optimize
+FRAGMENT_CONFIG_DEBUG=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/arch/${ARCH}/configs/amlogic_gki.debug
+
+PRE_DEFCONFIG_CMDS="pre_defconfig_cmds"
+POST_DEFCONFIG_CMDS="post_defconfig_cmds"
+
+MAKE_GOALS="
+ ${MAKE_GOALS}
+ uImage
+"
+
+FILES="
+ ${FILES}
+ arch/arm/boot/uImage
+"
+
+if [[ -n ${ANDROID_PROJECT} ]]; then
+MAKE_GOALS="
+ ${MAKE_GOALS}
+ Image.gz
+ android_overlay_dt.dtbo
+ ${MAKE_GOALS_ANDROID}
+"
+
+FILES="
+ arch/arm/boot/Image.gz
+ android_overlay_dt.dtbo
+ ${FILES_ANDROID}
+"
+for device_tree in ${KERNEL_DEVICETREE}; do
+MAKE_GOALS="
+ ${MAKE_GOALS}
+ ${device_tree}.dtb
+"
+FILES="
+ ${FILES}
+ ${device_tree}.dtb
+"
+done
+
+# s4d_s905y4_ap222_drm.dtb # configure in file build.config.meson.arm64.trunk
+else
+MAKE_GOALS="
+ ${MAKE_GOALS}
+ dtbs
+"
+
+FILES="
+ ${FILES}
+"
+fi
+
+DTS_EXT_DIR=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/arch/arm/boot/dts/amlogic
+DTC_INCLUDE=${ROOT_DIR}/${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/include
+
+EXT_MODULES="
+ ${EXT_MODULES}
+ ${EXT_MODULES_ANDROID}
+"
+
+EXT_MODULES_CONFIG="
+ ${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/scripts/amlogic/ext_modules_config
+"
+
+EXT_MODULES_PATH="
+ ${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/scripts/amlogic/ext_modules_path
+"
+
+if [[ `grep "CONFIG_AMLOGIC_IN_KERNEL_MODULES=n" ${ROOT_DIR}/${FRAGMENT_CONFIG}` ]]; then
+ EXT_MODULES="
+ ${EXT_MODULES}
+ ${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/drivers
+ "
+fi
+
+POST_KERNEL_BUILD_CMDS="prepare_module_build"
+EXTRA_CMDS="extra_cmds"
+
+# ABI_DEFINITION=${COMMON_DRIVERS_DIR}/android/abi_gki_aarch64_amlogic.xml
diff --git a/drivers/clk/meson/sc2.c b/drivers/clk/meson/sc2.c
index da88267..6e1639a 100644
--- a/drivers/clk/meson/sc2.c
+++ b/drivers/clk/meson/sc2.c
@@ -87,7 +87,9 @@
},
};
+#ifdef CONFIG_ARM
static const struct clk_ops meson_pll_clk_no_ops = {};
+#endif
/*
* the sys pll DCO value should be 3G~6G,
@@ -561,6 +563,14 @@
.shift = 10,
.width = 5,
},
+#ifdef CONFIG_ARM
+ /* for 32bit */
+ .od = {
+ .reg_off = ANACTRL_GP1PLL_CTRL0,
+ .shift = 16,
+ .width = 3,
+ },
+#endif
.frac = {
.reg_off = ANACTRL_GP1PLL_CTRL1,
.shift = 0,
@@ -593,6 +603,20 @@
},
};
+#ifdef CONFIG_ARM
+static struct clk_regmap sc2_gp1_pll = {
+ .hw.init = &(struct clk_init_data){
+ .name = "gp1_pll",
+ .ops = &meson_pll_clk_no_ops,
+ .parent_hws = (const struct clk_hw *[]) {
+ &sc2_gp1_pll_dco.hw
+ },
+ .num_parents = 1,
+ .flags = CLK_GET_RATE_NOCACHE | CLK_SET_RATE_PARENT,
+ },
+};
+
+#else
static struct clk_regmap sc2_gp1_pll = {
.data = &(struct clk_regmap_div_data){
.offset = ANACTRL_GP1PLL_CTRL0,
@@ -613,6 +637,7 @@
.flags = CLK_GET_RATE_NOCACHE | CLK_SET_RATE_PARENT,
},
};
+#endif
/*cpu_clk*/
static const struct cpu_dyn_table sc2_cpu_dyn_table[] = {
diff --git a/drivers/drm/meson_logo.c b/drivers/drm/meson_logo.c
index 0aca3fb..3ddbf00 100644
--- a/drivers/drm/meson_logo.c
+++ b/drivers/drm/meson_logo.c
@@ -78,7 +78,7 @@
static u32 drm_logo_width;
static u32 drm_logo_height;
-static int __init drm_logo_bpp_setup(char *str)
+static int drm_logo_bpp_setup(char *str)
{
int ret;
@@ -92,7 +92,7 @@
return drm_logo_bpp;
}
-static int __init drm_logo_width_setup(char *str)
+static int drm_logo_width_setup(char *str)
{
int ret;
@@ -106,7 +106,7 @@
return drm_logo_width;
}
-static int __init drm_logo_height_setup(char *str)
+static int drm_logo_height_setup(char *str)
{
int ret;
@@ -221,7 +221,7 @@
return 0;
}
-static int __init drm_logo_reverse_setup(char *str)
+static int drm_logo_reverse_setup(char *str)
{
char *ptr = str;
char sep[2];
diff --git a/drivers/dvb/dsm/aml_dsm.c b/drivers/dvb/dsm/aml_dsm.c
index 0028c8a..0fa1dc3 100644
--- a/drivers/dvb/dsm/aml_dsm.c
+++ b/drivers/dvb/dsm/aml_dsm.c
@@ -15,6 +15,7 @@
#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/compat.h>
+#include <linux/random.h>
#include "aml_dsm.h"
#define DEVICE_NAME "aml_dsm"
diff --git a/mk.sh b/mk.sh
index d9f07a2..fe0260e 100755
--- a/mk.sh
+++ b/mk.sh
@@ -3,6 +3,7 @@
function show_help {
echo "USAGE: $0 [--nongki] [--abi]"
echo
+ echo " --arch for ARCH, build 64 or 32 bit kernel, arm|arm64[default], require parameter value"
echo " --abi for ABI, call build_abi.sh not build.sh, 1|0[default], not require parameter value"
echo " --build_config for BUILD_CONFIG, common_drivers/build.config.amlogic[default]|common/build.config.gki.aarch64, require parameter value"
echo " --symbol_strict for KMI_SYMBOL_LIST_STRICT_MODE, 1[default]|0, require parameter value"
@@ -27,6 +28,11 @@
for i in "$@"
do
case $i in
+ --arch)
+ ARCH=$2
+ VA=1
+ shift
+ ;;
--abi)
ABI=1
shift
@@ -120,8 +126,14 @@
;;
esac
done
-set -- "${ARGS[@]}" # other parameters are used as script parameters of build_abi.sh or build.sh
+if [ "${ARCH}" = "arm" ]; then
+ ARGS+=("LOADADDR=0x108000")
+else
+ ARCH=arm64
+fi
+
+set -- "${ARGS[@]}" # other parameters are used as script parameters of build_abi.sh or build.sh
# amlogic parameters default value
if [[ -z "${ABI}" ]]; then
ABI=0
@@ -148,7 +160,11 @@
exit
fi
if [[ -z "${BUILD_CONFIG}" ]]; then
- BUILD_CONFIG=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/build.config.amlogic
+ if [ "${ARCH}" = "arm64" ]; then
+ BUILD_CONFIG=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/build.config.amlogic
+ elif [ "${ARCH}" = "arm" ]; then
+ BUILD_CONFIG=${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/build.config.amlogic32
+ fi
fi
if [[ -z "${BUILD_DIR}" ]]; then
BUILD_DIR=build
@@ -182,7 +198,7 @@
export KERNEL_DIR COMMON_DRIVERS_DIR BUILD_DIR ANDROID_PROJECT GKI_CONFIG
echo KERNEL_DIR=${KERNEL_DIR} COMMON_DRIVERS_DIR=${COMMON_DRIVERS_DIR} BUILD_DIR=${BUILD_DIR} GKI_CONFIG=${GKI_CONFIG}
-source ${ROOT_DIR}/${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/build.config.amlogic
+source ${ROOT_DIR}/${BUILD_CONFIG}
if [ "${ABI}" -eq "1" ]; then
export OUT_DIR_SUFFIX="_abi"
@@ -264,7 +280,7 @@
echo "========================================================"
if [ -f ${ROOT_DIR}/${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/rootfs_base.cpio.gz.uboot ]; then
echo "Rebuild rootfs in order to install modules!"
- rebuild_rootfs
+ rebuild_rootfs ${ARCH}
else
echo "There's no file ${ROOT_DIR}/${KERNEL_DIR}/${COMMON_DRIVERS_DIR}/rootfs_base.cpio.gz.uboot, so don't rebuild rootfs!"
fi