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limin.tian8c5c1e12023-02-28 03:27:14 +00001/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2019-2022 Amlogic Inc.
4 */
Ao Xu0733c432018-11-02 17:35:02 +08005#ifndef _MESON_DRM_H
6#define _MESON_DRM_H
Yalong Liubdcf9122018-01-19 18:35:02 +08007
Ao Xu0733c432018-11-02 17:35:02 +08008#include <drm/drm.h>
9
10/* Use flags */
11#define MESON_USE_NONE 0
12#define MESON_USE_SCANOUT (1ull << 0)
13#define MESON_USE_CURSOR (1ull << 1)
14#define MESON_USE_RENDERING (1ull << 2)
15#define MESON_USE_LINEAR (1ull << 3)
16#define MESON_USE_PROTECTED (1ull << 11)
17#define MESON_USE_HW_VIDEO_ENCODER (1ull << 12)
18#define MESON_USE_CAMERA_WRITE (1ull << 13)
19#define MESON_USE_CAMERA_READ (1ull << 14)
20#define MESON_USE_TEXTURE (1ull << 17)
Ao Xu6fbd0322020-04-14 18:08:22 +080021#define MESON_USE_VIDEO_PLANE (1ull << 18)
22#define MESON_USE_VIDEO_AFBC (1ull << 19)
Ao Xu6747bbd2020-09-28 20:02:09 +080023#define MESON_USE_VD1 (1ull << 20)
24#define MESON_USE_VD2 (1ull << 21)
Yalong Liubdcf9122018-01-19 18:35:02 +080025
26/**
27 * User-desired buffer creation information structure.
28 *
29 * @size: user-desired memory allocation size.
Yalong Liubdcf9122018-01-19 18:35:02 +080030 * @flags: user request for setting memory type or cache attributes.
31 * @handle: returned a handle to created gem object.
Ao Xu0733c432018-11-02 17:35:02 +080032 * - this handle will be set by gem module of kernel side.
Yalong Liubdcf9122018-01-19 18:35:02 +080033 */
Yalong Liu22dc0a52018-02-22 10:27:20 +080034struct drm_meson_gem_create {
Ao Xu0733c432018-11-02 17:35:02 +080035 __u64 size;
36 __u32 flags;
37 __u32 handle;
Yalong Liubdcf9122018-01-19 18:35:02 +080038};
39
linfang.zhao374dbdb2023-11-03 07:59:47 +000040struct drm_meson_video_zpos_target {
chen.wang133a5c832023-07-12 04:23:36 +000041 __u32 index;
42 __u32 zpos;
43 __u32 flag;
44};
linfang.zhao374dbdb2023-11-03 07:59:47 +000045
46struct drm_meson_plane_mute {
47 int plane_type; /* 0:osd plane, 1:video plane */
48 int plane_mute; /* 0:umute plane, 1:mute plane */
49};
chen.wang133a5c832023-07-12 04:23:36 +000050
sky zhouf05ca462020-10-29 18:07:40 +080051/*Memory related.*/
Ao Xu0733c432018-11-02 17:35:02 +080052#define DRM_IOCTL_MESON_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
sky zhouf05ca462020-10-29 18:07:40 +080053 0x00, struct drm_meson_gem_create)
wenlong.zhang7d32ed92023-04-12 06:08:17 +000054#define DRM_IOCTL_MESON_RMFB DRM_IOWR(DRM_COMMAND_BASE + \
55 0x01, unsigned int)
sky zhouf05ca462020-10-29 18:07:40 +080056
57/*KMS related.*/
58#define DRM_IOCTL_MESON_ASYNC_ATOMIC DRM_IOWR(DRM_COMMAND_BASE + \
59 0x10, struct drm_mode_atomic)
linfang.zhao374dbdb2023-11-03 07:59:47 +000060
chen.wang133a5c832023-07-12 04:23:36 +000061#define DRM_IOCTL_MESON_SET_VIDEO_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \
62 0x11, struct drm_meson_video_zpos_target)
linfang.zhao374dbdb2023-11-03 07:59:47 +000063#define DRM_IOCTL_MESON_MUTE_PLANE DRM_IOWR(DRM_COMMAND_BASE + \
64 0x12, struct drm_meson_plane_mute)
chen.wang133a5c832023-07-12 04:23:36 +000065
Ao Xu0733c432018-11-02 17:35:02 +080066#endif /* _MESON_DRM_H */