| commit | 419c4a979806c5e8aef4edc3829932131d4b7733 | [log] [tgz] |
|---|---|---|
| author | hanghang.luo <hanghang.luo@amlogic.com> | Fri Jul 14 07:36:07 2023 +0000 |
| committer | hanghang.luo <hanghang.luo@amlogic.com> | Mon Jul 17 07:26:23 2023 +0000 |
| tree | 8311d21d9a28891dfe0931563c6fb9092476e476 | |
| parent | 70f07efaf6d308c784d2da0b06a99a9427e4b26e [diff] |
gst-plugin-aml-v4l2dec: CB2 change interlace to progressive [1/1] PD#SWPL-130419 Problem: it will spend much time that interlace stream pass the deinterlace element, and will lost frames, if the vsink only support progressive Solution: change interlace to progressive Verify: AM301 Change-Id: I3a5928510354106fd1b3ac8538245dc658f7f213 Signed-off-by: hanghang.luo <hanghang.luo@amlogic.com>