| commit | a507a4ba679d0d9ab815aaf8ea00033d5077c275 | [log] [tgz] |
|---|---|---|
| author | xuesong.jiang <xuesong.jiang@amlogic.com> | Fri Oct 28 16:28:29 2022 +0800 |
| committer | xuesong.jiang <xuesong.jiang@amlogic.com> | Fri Oct 28 16:29:43 2022 +0800 |
| tree | 3ac746d90349d26ff1bbc31e79d5ac745a6cea6c | |
| parent | 5eb0171992471f0d9c2aad586a97c97bcc842786 [diff] |
amlvideosink: CF1 reduce buf num [2/2] PD#SWPL-98546 Problem: add prop to control use basesink sync flow Solution: (detail info) Verify: (detail info) Change-Id: Iae3f8e39a162c25c2dd2076476d34e755f290ba0 Signed-off-by: xuesong.jiang <xuesong.jiang@amlogic.com>