arch/riscv: Refactor the code for coding style. [4/4]

PD#SWPL-68240

Problem:
Refactor the code for coding style

Solution:
Refactor the code for coding style

Verify:
N/A

Change-Id: Iabe505e65531891c2b8bf65a6518dd9cf2b57d37
Signed-off-by: xiaohu.huang <xiaohu.huang@amlogic.com>
diff --git a/common.h b/common.h
index e4bf4c9..1616750 100644
--- a/common.h
+++ b/common.h
@@ -13,45 +13,46 @@
 #include <stdint.h>
 #include <errno.h>
 
-
 /* Macros to access registers */
 #define REG32_ADDR(addr) ((volatile uint32_t *)(uintptr_t)(addr))
 #define REG16_ADDR(addr) ((volatile uint16_t *)(uintptr_t)(addr))
-#define REG8_ADDR(addr)  ((volatile uint8_t  *)(uintptr_t)(addr))
+#define REG8_ADDR(addr) ((volatile uint8_t *)(uintptr_t)(addr))
 
 #define REG32(addr) (*REG32_ADDR(addr))
 #define REG16(addr) (*REG16_ADDR(addr))
-#define REG8(addr)  (*REG8_ADDR(addr))
+#define REG8(addr) (*REG8_ADDR(addr))
 
-#define BIT(nr)			(1UL << (nr))
-#define REG32_UPDATE_BITS(addr, mask, val)		\
-do {							\
-	uint32_t _v = REG32((unsigned long)addr);	\
-	_v &= (~(mask));				\
-	_v |= ((val) & (mask));				\
-	REG32((unsigned long)addr) = _v;		\
-} while(0)
+#define BIT(nr) (1UL << (nr))
+#define REG32_UPDATE_BITS(addr, mask, val)                                                         \
+	do {                                                                                       \
+		uint32_t _v = REG32((unsigned long)addr);                                          \
+		_v &= (~(mask));                                                                   \
+		_v |= ((val) & (mask));                                                            \
+		REG32((unsigned long)addr) = _v;                                                   \
+	} while (0)
 
 #ifndef FIELD_PREP
-#define FIELD_PREP(_mask, _val) \
-	(((typeof(_mask))(_val) << (ffs(_mask) - 1)) & (_mask))
+#define FIELD_PREP(_mask, _val) (((typeof(_mask))(_val) << (ffs(_mask) - 1)) & (_mask))
 #endif
 
 #ifndef FIELD_GET
-#define FIELD_GET(_mask, _reg) \
-	((typeof(_mask))(((_reg) & (_mask)) >> (ffs(_mask) - 1)))
+#define FIELD_GET(_mask, _reg) ((typeof(_mask))(((_reg) & (_mask)) >> (ffs(_mask) - 1)))
 #endif
 
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
 
 #define BITS_PER_LONG (sizeof(unsigned long) == 8 ? 64 : 32)
-#define GENMASK(h, l) \
-	(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
-#define IS_ALIGNED(x, a)		(((unsigned long)(x) & ((unsigned long)(a) - 1)) == 0)
-#define _RET_IP_		(unsigned long)__builtin_return_address(0)
-#define _THIS_IP_  ({ __label__ __here; __here: (unsigned long)&&__here; })
+#define GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
+#define IS_ALIGNED(x, a) (((unsigned long)(x) & ((unsigned long)(a)-1)) == 0)
+#define _RET_IP_ ((unsigned long)__builtin_return_address(0))
+#define _THIS_IP_                                                                                  \
+	({                                                                                         \
+		__label__ __here;                                                                  \
+__here:                                                                                    \
+		(unsigned long)&&__here;                                                           \
+	})
 #define __round_mask(x, y) ((__typeof__(x))((y)-1))
-#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1)
+#define round_up(x, y) ((((x)-1) | __round_mask(x, y)) + 1)
 #define round_down(x, y) ((x) & ~__round_mask(x, y))
 
 typedef uint64_t u64;