coredump: support riscv arch. [2/2]
PD#SWPL-123277
Problem:
coredump add new arch.
Solution:
add new arch.
Verify:
N/A
Change-Id: I1a7b01af91482d853ff12c8dc9401d82ac754d4d
Signed-off-by: shijie.xiong <shijie.xiong@amlogic.com>
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 72ec88d..99b3e12 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -15,5 +15,8 @@
)
aml_library_link_libraries(kernel__${KERNEL})
+if(CONFIG_DEBUG_COREDUMP)
+aml_library_link_libraries(utilities__coredump)
+endif()
aml_link_libraries()
diff --git a/GCC/AML_RISC-V/port.c b/GCC/AML_RISC-V/port.c
index f2285e4..38d521c 100755
--- a/GCC/AML_RISC-V/port.c
+++ b/GCC/AML_RISC-V/port.c
@@ -46,7 +46,9 @@
#include "n200_timer.h"
#include <riscv_bits.h>
#include "common.h"
-
+#ifdef CONFIG_DEBUG_COREDUMP
+#include "coredump.h"
+#endif
/* Standard Includes */
#include <stdlib.h>
@@ -169,6 +171,11 @@
*(unsigned *)((read_csr(mepc)/4) *4 + (i + 1) * REGBYTES -16));
printf("Dump Stack: \n");
vTaskDumpStack(NULL);
+#ifdef CONFIG_DEBUG_COREDUMP
+ *(uint32_t *)(sp + 32 * REGBYTES) = read_csr(mstatus);
+ *(uint32_t *)(sp + 33 * REGBYTES) = read_csr(mepc);
+ coredump(0, (void *)sp);
+#endif
//_exit(mcause);
do {}while(1);
}
diff --git a/common.h b/common.h
index 601cf33..b80d19b 100644
--- a/common.h
+++ b/common.h
@@ -10,8 +10,8 @@
#ifdef __cplusplus
extern "C" {
#endif
-#include <stdint.h>
#include <errno.h>
+#include <stdint.h>
/* Macros to access registers */
#define REG32_ADDR(addr) ((volatile uint32_t *)(uintptr_t)(addr))
@@ -23,12 +23,12 @@
#define REG8(addr) (*REG8_ADDR(addr))
#define BIT(nr) (1UL << (nr))
-#define REG32_UPDATE_BITS(addr, mask, val) \
- do { \
- uint32_t _v = REG32((unsigned long)addr); \
- _v &= (~(mask)); \
- _v |= ((val) & (mask)); \
- REG32((unsigned long)addr) = _v; \
+#define REG32_UPDATE_BITS(addr, mask, val) \
+ do { \
+ uint32_t _v = REG32((unsigned long)addr); \
+ _v &= (~(mask)); \
+ _v |= ((val) & (mask)); \
+ REG32((unsigned long)addr) = _v; \
} while (0)
static inline int generic_ffs(int x)
@@ -75,11 +75,11 @@
#define GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
#define IS_ALIGNED(x, a) (((unsigned long)(x) & ((unsigned long)(a)-1)) == 0)
#define _RET_IP_ ((unsigned long)__builtin_return_address(0))
-#define _THIS_IP_ \
- ({ \
- __label__ __here; \
-__here: \
- (unsigned long)&&__here; \
+#define _THIS_IP_ \
+ ({ \
+ __label__ __here; \
+__here: \
+ (unsigned long)&&__here; \
})
#define __round_mask(x, y) ((__typeof__(x))((y)-1))
#define round_up(x, y) ((((x)-1) | __round_mask(x, y)) + 1)
@@ -94,6 +94,16 @@
typedef int16_t s16;
typedef int8_t s8;
+/*
+ * This struct define the way the registers are
+ * stored on the stack during an exception
+ */
+struct pt_regs {
+ uint32_t regs[32]; /* include zero reg */
+ uint32_t mstatus; /* machine status register */
+ uint32_t mepc; /* machine exception program counter */
+};
+
#ifndef BIT
#define BIT(x) (1 << (x))
#endif