| Xiaohu.Huang | 83a0b70 | 2021-12-28 11:06:24 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014-2018 Amlogic, Inc. All rights reserved. |
| 3 | * |
| 4 | * All information contained herein is Amlogic confidential. |
| 5 | * |
| 6 | * This software is provided to you pursuant to Software License Agreement |
| 7 | * (SLA) with Amlogic Inc ("Amlogic"). This software may be used |
| 8 | * only in accordance with the terms of this agreement. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification is strictly prohibited without prior written permission from |
| 12 | * Amlogic. |
| 13 | * |
| 14 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 15 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 16 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 17 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 18 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 19 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 20 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 21 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 22 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 24 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 25 | */ |
| 26 | |
| 27 | |
| 28 | #ifndef __COMMON_H |
| 29 | #define __COMMON_H |
| 30 | |
| 31 | #ifdef __cplusplus |
| 32 | extern "C" { |
| 33 | #endif |
| 34 | #include <stdint.h> |
| 35 | #include <errno.h> |
| 36 | |
| 37 | |
| 38 | /* Macros to access registers */ |
| 39 | #define REG32_ADDR(addr) ((volatile uint32_t *)(uintptr_t)(addr)) |
| 40 | #define REG16_ADDR(addr) ((volatile uint16_t *)(uintptr_t)(addr)) |
| 41 | #define REG8_ADDR(addr) ((volatile uint8_t *)(uintptr_t)(addr)) |
| 42 | |
| 43 | #define REG32(addr) (*REG32_ADDR(addr)) |
| 44 | #define REG16(addr) (*REG16_ADDR(addr)) |
| 45 | #define REG8(addr) (*REG8_ADDR(addr)) |
| 46 | |
| 47 | #define BIT(nr) (1UL << (nr)) |
| 48 | #define REG32_UPDATE_BITS(addr, mask, val) \ |
| 49 | do { \ |
| 50 | uint32_t _v = REG32((unsigned long)addr); \ |
| 51 | _v &= (~(mask)); \ |
| 52 | _v |= ((val) & (mask)); \ |
| 53 | REG32((unsigned long)addr) = _v; \ |
| 54 | } while(0) |
| 55 | |
| 56 | #ifndef FIELD_PREP |
| 57 | #define FIELD_PREP(_mask, _val) \ |
| 58 | (((typeof(_mask))(_val) << (ffs(_mask) - 1)) & (_mask)) |
| 59 | #endif |
| 60 | |
| 61 | #ifndef FIELD_GET |
| 62 | #define FIELD_GET(_mask, _reg) \ |
| 63 | ((typeof(_mask))(((_reg) & (_mask)) >> (ffs(_mask) - 1))) |
| 64 | #endif |
| 65 | |
| 66 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) |
| 67 | |
| 68 | #define BITS_PER_LONG (sizeof(unsigned long) == 8 ? 64 : 32) |
| 69 | #define GENMASK(h, l) \ |
| 70 | (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h)))) |
| 71 | #define IS_ALIGNED(x, a) (((unsigned long)(x) & ((unsigned long)(a) - 1)) == 0) |
| 72 | #define _RET_IP_ (unsigned long)__builtin_return_address(0) |
| 73 | #define _THIS_IP_ ({ __label__ __here; __here: (unsigned long)&&__here; }) |
| 74 | #define __round_mask(x, y) ((__typeof__(x))((y)-1)) |
| 75 | #define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1) |
| 76 | #define round_down(x, y) ((x) & ~__round_mask(x, y)) |
| 77 | |
| 78 | typedef uint64_t u64; |
| 79 | typedef uint32_t u32; |
| 80 | typedef uint16_t u16; |
| 81 | typedef uint8_t u8; |
| 82 | typedef int64_t s64; |
| 83 | typedef int32_t s32; |
| 84 | typedef int16_t s16; |
| 85 | typedef int8_t s8; |
| 86 | |
| 87 | #ifndef BIT |
| 88 | #define BIT(x) (1 << (x)) |
| 89 | #endif |
| 90 | |
| 91 | #ifdef __cplusplus |
| 92 | } |
| 93 | #endif |
| 94 | #endif |