SoC S7: add bl30 bp201_s805x3 board [1/1]

PD#SWPL-169553

Problem:
S7 add bl30 bp201_s805x3 board.

Solution:
S7 add bl30 bp201_s805x3 board.

Verify:
s7 bp201_s805x3

Change-Id: I7ff1daa567c0b60febf5cdd431570868fbd10008
Signed-off-by: bangzheng.liu <bangzheng.liu@amlogic.com>
diff --git a/bp201_s805x3/CMakeLists.txt b/bp201_s805x3/CMakeLists.txt
new file mode 100644
index 0000000..8eda1c4
--- /dev/null
+++ b/bp201_s805x3/CMakeLists.txt
@@ -0,0 +1,18 @@
+# Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+
+# SPDX-License-Identifier: MIT
+
+aml_library_include_directories(
+	${CMAKE_CURRENT_SOURCE_DIR}
+)
+
+aml_library_sources(
+	keypad.c
+	power.c
+	hw_business.c
+)
+
+aml_library_sources_ifdef(
+	CONFIG_LEDS
+	leds_plat.c
+)
\ No newline at end of file
diff --git a/bp201_s805x3/FreeRTOSConfig.h b/bp201_s805x3/FreeRTOSConfig.h
new file mode 100644
index 0000000..26a2487
--- /dev/null
+++ b/bp201_s805x3/FreeRTOSConfig.h
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+#include <stdio.h>
+
+#define USER_MODE_TASKS 0
+
+#define configUSE_PREEMPTION 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configUSE_TICKLESS_IDLE 0
+#define configCPU_CLOCK_HZ 12000000 //Use AO Internal Timer as Tick
+#define configTICK_RATE_HZ 50
+#define configMAX_PRIORITIES 6
+#define configMINIMAL_STACK_SIZE 450
+#define configMAX_TASK_NAME_LEN 16
+#define configUSE_16_BIT_TICKS 0
+#define configIDLE_SHOULD_YIELD 1
+#define configUSE_TASK_NOTIFICATIONS 1
+#define configUSE_MUTEXES 1
+#define configUSE_RECURSIVE_MUTEXES 0
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configQUEUE_REGISTRY_SIZE 10
+#define configUSE_QUEUE_SETS 0
+#define configUSE_TIME_SLICING 1
+#define configUSE_NEWLIB_REENTRANT 0
+#define configENABLE_BACKWARD_COMPATIBILITY 0
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 5
+
+/* Memory allocation related definitions. */
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configTOTAL_HEAP_SIZE (30 * 1024)
+#define configAPPLICATION_ALLOCATED_HEAP 0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK 1
+#define configUSE_TICK_HOOK 0
+#define configCHECK_FOR_STACK_OVERFLOW 2
+#define configUSE_MALLOC_FAILED_HOOK 1
+#define configUSE_DAEMON_TASK_STARTUP_HOOK 0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS 0
+#define configUSE_TRACE_FACILITY 0
+#define configUSE_STATS_FORMATTING_FUNCTIONS 0
+
+/* Co-routine related definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES 1
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS 1
+#define configTIMER_TASK_PRIORITY 1
+#define configTIMER_QUEUE_LENGTH 10
+#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
+
+/* Interrupt nesting behavior configuration. */
+#define configKERNEL_INTERRUPT_PRIORITY 1
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 6
+#define configMAX_API_CALL_INTERRUPT_PRIORITY 6
+
+#define configSTICK_MEM_SIZE    128
+#define configDEFAULT_HEAP_ADDR 0x10000000
+#define configDEFAULT_HEAP_SIZE (32 * 1024 - configSTICK_MEM_SIZE)
+#define configSTICK_MEM_ADDR (configDEFAULT_HEAP_ADDR + configDEFAULT_HEAP_SIZE)
+
+#define portCRITICAL_NESTING_IN_TCB 1
+
+/* Define to trap errors during development. */
+#define configASSERT(x)                                                                            \
+	do {                                                                                       \
+		if ((x) == 0) {                                                                    \
+			taskDISABLE_INTERRUPTS();                                                  \
+			printf("ASSERT: %s %d\n", __FILE__, __LINE__);                             \
+			for (;;)                                                                   \
+				;                                                                  \
+		}                                                                                  \
+	} while (0)
+
+/* FreeRTOS MPU specific definitions. */
+//#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_xResumeFromISR 1
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+#define INCLUDE_xTaskGetCurrentTaskHandle 1
+#define INCLUDE_uxTaskGetStackHighWaterMark 1
+#define INCLUDE_xTaskGetIdleTaskHandle 1
+#define INCLUDE_eTaskGetState 0
+#define INCLUDE_xEventGroupSetBitFromISR 1
+#define INCLUDE_xTimerPendFunctionCall 1
+#define INCLUDE_xTaskAbortDelay 0
+#define INCLUDE_xTaskGetHandle 1
+#define INCLUDE_xTaskResumeFromISR 1
+
+/* A header file that defines trace macro can be included here. */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/bp201_s805x3/Kconfig b/bp201_s805x3/Kconfig
new file mode 100644
index 0000000..1a1a41e
--- /dev/null
+++ b/bp201_s805x3/Kconfig
@@ -0,0 +1,31 @@
+# Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+
+# SPDX-License-Identifier: MIT
+
+config BOARD_BP201_S805X3
+	bool "Amlogic BP201_S805X3 Board"
+	select SOC_S7
+	select LIBC_AML
+	select COMMON
+	select GET_VERSION
+	select STICK_MEM
+	select UART
+	select CEC
+	select MAILBOX
+	select STR
+	select GPIO
+	select KEY
+	select PWM
+	select LEDS
+#	select I2C_SLAVE
+	select TIMER_SOURCE
+	select SARADC
+	select IR
+	select ETHERNET
+	select VRTC
+	select VERSION_FULL_INFO
+	select AOCPU_ALIVE_DETECTION
+	select WIFI_BT_WAKE
+
+	help
+	  Enable Amlogic BP201_S805X3 Board.
diff --git a/bp201_s805x3/compiler_options.cmake b/bp201_s805x3/compiler_options.cmake
new file mode 100644
index 0000000..d545948
--- /dev/null
+++ b/bp201_s805x3/compiler_options.cmake
@@ -0,0 +1,6 @@
+# Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+
+# SPDX-License-Identifier: MIT
+
+#add compiler options at here which is associated with current board.
+
diff --git a/bp201_s805x3/defconfig b/bp201_s805x3/defconfig
new file mode 100644
index 0000000..3ed5d4d
--- /dev/null
+++ b/bp201_s805x3/defconfig
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: MIT
+#
+
+CONFIG_BOARD_BP201_S805X3=y
+
diff --git a/bp201_s805x3/hw_business.c b/bp201_s805x3/hw_business.c
new file mode 100644
index 0000000..4e97c58
--- /dev/null
+++ b/bp201_s805x3/hw_business.c
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include <stdio.h>
+#include "FreeRTOS.h"
+#include "queue.h"
+#include "semphr.h"
+#include "hw_business.h"
+#include "n200_eclic.h"
+#include "n200_func.h"
+#include "uart.h"
+#include "eth.h"
+#include "common.h"
+#include "riscv_encoding.h"
+#include "mailbox-api.h"
+#include "hdmi_cec.h"
+#include "stick_mem.h"
+#include "suspend.h"
+#include "vrtc.h"
+
+#define INT_TEST_NEST_DEPTH 6
+#define INT_TEST_GPIO_NUM 6
+#define INT_TEST_TASK_DELAY 50 // ms
+#define TASK_TEST_STACK_DEPTH 200
+
+//#define GPIO_INT_SOURCE(x) (SOC_PIC_INT_GPIO_BASE + x)
+
+/* Configure board type:
+ *   Board under test :        SIGNAL_BOARD_ENABLE     0
+ *   Signal generation board : SIGNAL_BOARD_ENABLE     1
+ */
+#define SIGNAL_BOARD_ENABLE 0
+
+#define INT_TEST_INT_WAVE_ENABLE 1
+
+#if INT_TEST_INT_WAVE_ENABLE
+#define INT_TEST_TIMER_PERIOD 500 // ms
+#define INT_TEST_INT_DELAY 10 // ms
+#else
+#define INT_TEST_TIMER_PERIOD 500 // ms
+#define INT_TEST_INT_DELAY 0x3ff // ms
+#endif
+
+#define INT_TEST_MAX_TIMER_PERIOD 100 // ms
+#define INT_TEST_MIN_TIMER_PERIOD 50 // ms
+#define INT_TEST_MUTE_TIMER_PERIOD 200 // ms
+
+void config_eclic_irqs(void)
+{
+	eclic_init(ECLIC_NUM_INTERRUPTS);
+	eclic_set_nlbits(0);
+}
+
+void hw_business_process(void)
+{
+	uint8_t i = 0;
+
+	config_eclic_irqs();
+	config_pmp();
+	stick_mem_init();
+	stick_mem_write(STICK_REBOOT_FLAG, WATCHDOG_REBOOT);
+	for (i = 0; i < 4; ++i)
+		printf("AOCPU_IRQ_SEL=0x%x\n", REG32(AOCPU_IRQ_SEL0 + i * 4));
+	vMbInit();
+	vCecCallbackInit(CEC_CHIP_S7);
+	vRtcInit();
+	//rtc_init();
+	vETHMailboxCallback();
+	create_str_task();
+}
diff --git a/bp201_s805x3/hw_business.h b/bp201_s805x3/hw_business.h
new file mode 100644
index 0000000..2dc1d61
--- /dev/null
+++ b/bp201_s805x3/hw_business.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef __hW_BUSINESS_H__
+#define __hW_BUSINESS_H__
+
+void hw_business_process(void);
+
+#endif
diff --git a/bp201_s805x3/keypad.c b/bp201_s805x3/keypad.c
new file mode 100644
index 0000000..16f8c8a
--- /dev/null
+++ b/bp201_s805x3/keypad.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include "FreeRTOS.h"
+#include "ir.h"
+#include "soc.h"
+#include "keypad.h"
+#include "gpio.h"
+#include "saradc.h"
+#include "suspend.h"
+
+/*KEY ID*/
+#define ADC_KEY_ID_POWER 520
+
+static void vAdcKeyCallBack(struct xReportEvent event)
+{
+	uint32_t buf[4] = { 0 };
+
+	switch (event.ulCode) {
+	case ADC_KEY_ID_POWER:
+		buf[0] = POWER_KEY_WAKEUP;
+		STR_Wakeup_src_Queue_Send_FromISR(buf);
+		break;
+	default:
+		break;
+	}
+
+	printf("ADC key event 0x%x, key code %d, responseTime %d\n", event.event, event.ulCode,
+	       event.responseTime);
+}
+
+struct xAdcKeyInfo adcKeyInfo[] = {
+	ADC_KEY_INFO(ADC_KEY_ID_POWER, 90, SARADC_CH0, EVENT_SHORT, vAdcKeyCallBack, NULL),
+};
+
+void vKeyPadInit(void)
+{
+	vCreateAdcKey(adcKeyInfo, sizeof(adcKeyInfo) / sizeof(struct xAdcKeyInfo));
+	vAdcKeyEnable();
+}
+
+void vKeyPadDeinit(void)
+{
+	vAdcKeyDisable();
+	vDestroyAdcKey();
+}
diff --git a/bp201_s805x3/leds_plat.c b/bp201_s805x3/leds_plat.c
new file mode 100644
index 0000000..344ad59
--- /dev/null
+++ b/bp201_s805x3/leds_plat.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "FreeRTOS.h"
+#include <gpio.h>
+#include <leds_plat.h>
+#include <leds_state.h>
+
+/* TODO: Temporarily use static variables instead of stick mem */
+static int32_t LedStickMem0;
+//static int32_t LedStickMem1;
+
+static struct LedCoord BreathInflections0[] = { { 0, 0 }, { 2500, 255 }, { 5000, 0 } };
+
+static struct LedCoord BreathInflections1[] = { { 0, 0 }, { 5000, 255 }, { 10000, 0 } };
+
+static struct LedCoord BreathInflections2[] = { { 0, 0 }, { 10000, 255 }, { 20000, 0 } };
+
+static struct LedCoord BreathInflections3[] = { { 0, 0 }, { 20000, 255 }, { 40000, 0 } };
+
+struct LedCoord *BreathInflections[LED_BREATH_MAX_COUNT] = {
+	BreathInflections0,
+	BreathInflections1,
+	BreathInflections2,
+	BreathInflections3,
+};
+
+struct LedDevice MesonLeds[] = {
+	{
+		.id = LED_ID_0,
+		.type = LED_TYPE_PWM,
+		.name = "sys_led",
+		.hardware_id = MESON_PWM_INVALID,
+		.pwm_chip_id = PWM_G,
+		.polarity = LED_POLARITY_POSITIVE,
+		.breathtime = 0,
+	},
+};
+
+int32_t get_led_breath_len(uint32_t breath_id)
+{
+	switch (breath_id) {
+	case 0:
+		return sizeof(BreathInflections0) / sizeof(struct LedCoord);
+	case 1:
+		return sizeof(BreathInflections1) / sizeof(struct LedCoord);
+	case 2:
+		return sizeof(BreathInflections2) / sizeof(struct LedCoord);
+	case 3:
+		return sizeof(BreathInflections3) / sizeof(struct LedCoord);
+	} /* end switch */
+
+	iprintf("%s: id: %ld leds state init!\n", DRIVER_NAME, breath_id);
+
+	return -pdFREERTOS_ERRNO_EINVAL;
+}
+
+int32_t vLedPlatInit(int32_t **stickmem)
+{
+	/* TODO: Here is initialization stickmem, but not doing so now */
+	*stickmem = &LedStickMem0;
+
+	/* off by default */
+	return xLedsStateSetBrightness(LED_ID_0, LED_OFF);
+}
+
+int32_t vLedPinmuxInit(void)
+{
+	/* set pinmux */
+	return xPinmuxSet(GPIOD_11, PIN_FUNC2);
+}
diff --git a/bp201_s805x3/leds_plat.h b/bp201_s805x3/leds_plat.h
new file mode 100644
index 0000000..b3b1ef0
--- /dev/null
+++ b/bp201_s805x3/leds_plat.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+/*
+ * platform related header file
+ */
+
+#ifndef _MESON_LEDS_PLAT_H_
+#define _MESON_LEDS_PLAT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*
+ * pwm a5 leds config
+ */
+#include <leds_state.h>
+#include <pwm_plat.h>
+
+#define LED_BREATH_MAX_COUNT 4
+
+extern struct LedDevice MesonLeds[];
+
+enum led_id {
+	LED_ID_0 = 0,
+	LED_ID_MAX,
+};
+
+int32_t get_led_breath_len(uint32_t breath_id);
+int32_t vLedPinmuxInit(void);
+int32_t vLedPlatInit(int32_t **stickmem);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _MESON_LED_PLAT_H_ */
diff --git a/bp201_s805x3/lscript.h b/bp201_s805x3/lscript.h
new file mode 100644
index 0000000..02fe12d
--- /dev/null
+++ b/bp201_s805x3/lscript.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef _LSCRIPT_H_
+#define _LSCRIPT_H_
+
+#define configMEM_START 0xf7018000
+#define configMEM_LEN (64 * 1024)
+
+#endif
diff --git a/bp201_s805x3/lscript.ld b/bp201_s805x3/lscript.ld
new file mode 100644
index 0000000..e5e75ca
--- /dev/null
+++ b/bp201_s805x3/lscript.ld
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "lscript.h"
+
+OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv",
+              "elf32-littleriscv")
+OUTPUT_ARCH("riscv")
+ENTRY( _start )
+MEMORY
+{
+    ram (rw) : ORIGIN = configMEM_START, LENGTH = configMEM_LEN
+}
+SECTIONS
+{
+    __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
+    .text :
+    {
+        . = ALIGN(4);
+ PROVIDE( _text = . );
+ *(.init)
+        *(.text* .rodata*)
+        . = ALIGN(0x400);
+        PROVIDE( _etext = . );
+ *(.vtable)
+    } > ram
+    .data :
+    {
+        _data = .;
+        *(vtable)
+        *(.sdata* .data*)
+        _edata = .;
+    } > ram
+    .bss :
+    {
+        _bss = .;
+        *(.sbss*)
+        *(.gnu.linkonce.sb.*)
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        . = ALIGN(4);
+        _ebss = .;
+    } > ram
+    .stack :
+    {
+        PROVIDE( _stack = . );
+ . = ALIGN(1024);
+        . += __stack_size;
+        PROVIDE( _sp = . );
+    } >ram
+}
diff --git a/bp201_s805x3/power.c b/bp201_s805x3/power.c
new file mode 100644
index 0000000..340c2f2
--- /dev/null
+++ b/bp201_s805x3/power.c
@@ -0,0 +1,263 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include <stdio.h>
+#include "FreeRTOS.h"
+#include "common.h"
+#include "gpio.h"
+#include "ir.h"
+#include "eth.h"
+#include "soc.h"
+#include "suspend.h"
+#include "task.h"
+#include "gpio.h"
+#include "pwm.h"
+#include "pwm_plat.h"
+#include "keypad.h"
+#include "timer_source.h"
+#if CONFIG_WIFI_BT_WAKE
+#include "wifi_bt_wake.h"
+#endif
+#include "power.h"
+#include "mailbox-api.h"
+#include "suspend_debug.h"
+#if BL30_SUSPEND_DEBUG_EN
+#include "suspend_debug_s7.h"
+#endif
+#include "rtc.h"
+
+#include "hdmi_cec.h"
+static TaskHandle_t cecTask;
+#if BL30_SUSPEND_DEBUG_EN
+static TaskHandle_t printTask;
+#endif
+
+#define VCC5V_GPIO	GPIOC_7
+#define VDDCPU_A55_GPIO	GPIO_TEST_N
+
+static int vdd_ee;
+static int vdddos_npu_vpu;
+static TaskHandle_t vadTask;
+
+static struct IRPowerKey prvPowerKeyList[] = {
+	{ 0xef10fe01, IR_NORMAL }, /* ref tv pwr */
+	{ 0xba45bd02, IR_NORMAL }, /* small ir pwr */
+	{ 0xef10fb04, IR_NORMAL }, /* old ref tv pwr */
+	{ 0xf20dfe01, IR_NORMAL },
+	{ 0xe51afb04, IR_NORMAL },
+	{ 0x3ac5bd02, IR_CUSTOM },
+	{}
+};
+
+static void vIRHandler(struct IRPowerKey *pkey)
+{
+	uint32_t buf[4] = { 0 };
+
+	if (pkey->type == IR_NORMAL)
+		buf[0] = REMOTE_WAKEUP;
+	else if (pkey->type == IR_CUSTOM)
+		buf[0] = REMOTE_CUS_WAKEUP;
+
+	/* do sth below  to wakeup*/
+	STR_Wakeup_src_Queue_Send_FromISR(buf);
+};
+
+static void *xMboxVadWakeup(void *msg)
+{
+	uint32_t buf[4] = { 0 };
+
+	buf[0] = VAD_WAKEUP;
+	STR_Wakeup_src_Queue_Send(buf);
+
+	return NULL;
+}
+
+void str_hw_init(void)
+{
+	int ret;
+
+#if BL30_SUSPEND_DEBUG_EN
+	enter_func_print();
+	/*enable device & wakeup source interrupt*/
+	if (!IS_EN(BL30_IR_WAKEUP_MASK))
+#endif
+		vIRInit(MODE_HARD_NEC, GPIOD_5, PIN_FUNC1, prvPowerKeyList,
+			ARRAY_SIZE(prvPowerKeyList), vIRHandler);
+#if BL30_SUSPEND_DEBUG_EN
+	else
+		printf("skiped IR wakeup function\n");
+
+	if (IS_EN(BL30_RTC_WAKEUP_MASK)) {
+		printf("skiped RTC wakeup function\n");
+		alarm_clr();
+	}
+#endif
+	vETHInit(0);
+
+	xTaskCreate(vCEC_task, "CECtask", configMINIMAL_STACK_SIZE,
+		    NULL, CEC_TASK_PRI, &cecTask);
+
+	vBackupAndClearGpioIrqReg();
+	vGpioIRQInit();
+#if BL30_SUSPEND_DEBUG_EN
+	if (!IS_EN(BL30_SARADC_WAKEUP_MASK))
+#endif
+		vKeyPadInit();
+#if BL30_SUSPEND_DEBUG_EN
+	else
+		printf("skiped SARADC wakeup function\n");
+#endif
+
+#if CONFIG_WIFI_BT_WAKE
+	wifi_bt_wakeup_init();
+#endif
+
+#if BL30_SUSPEND_DEBUG_EN
+	exit_func_print();
+#endif
+}
+
+void str_hw_disable(void)
+{
+#if BL30_SUSPEND_DEBUG_EN
+	enter_func_print();
+#endif
+	/*disable wakeup source interrupt*/
+#if BL30_SUSPEND_DEBUG_EN
+	if (!IS_EN(BL30_IR_WAKEUP_MASK))
+#endif
+		vIRDeint();
+	vETHDeint();
+
+	if (cecTask) {
+		vTaskDelete(cecTask);
+		cec_req_irq(0);
+	}
+
+#if CONFIG_WIFI_BT_WAKE
+	wifi_bt_wakeup_deinit();
+#endif
+
+#if BL30_SUSPEND_DEBUG_EN
+	if (!IS_EN(BL30_SARADC_WAKEUP_MASK))
+#endif
+		vKeyPadDeinit();
+	vRestoreGpioIrqReg();
+#if BL30_SUSPEND_DEBUG_EN
+	exit_func_print();
+#endif
+}
+
+void str_power_on(int shutdown_flag)
+{
+	int ret;
+
+	(void)shutdown_flag;
+#if BL30_SUSPEND_DEBUG_EN
+	enter_func_print();
+	if (!IS_EN(BL30_SKIP_POWER_SWITCH)) {
+#endif
+
+		/***power on A55 vdd_cpu***/
+		ret = xGpioSetDir(VDDCPU_A55_GPIO, GPIO_DIR_OUT);
+		if (ret < 0) {
+			printf("vdd_cpu set gpio dir fail\n");
+			return;
+		}
+
+		ret = xGpioSetValue(VDDCPU_A55_GPIO, GPIO_LEVEL_HIGH);
+		if (ret < 0) {
+			printf("vdd_cpu set gpio val fail\n");
+			return;
+		}
+
+
+		/***set vdd_ee val***/
+		ret = vPwmMesonsetvoltage(VDDEE_VOLT, vdd_ee);
+		if (ret < 0) {
+			printf("VDD_EE pwm set fail\n");
+			return;
+		}
+
+		/***power on vcc_5v***/
+		ret = xGpioSetDir(VCC5V_GPIO, GPIO_DIR_IN);
+		if (ret < 0) {
+			printf("vcc_5v set gpio dir fail\n");
+			return;
+		}
+
+		/*Wait POWERON_VDDCPU_DELAY for VDDCPU statable*/
+		vTaskDelay(POWERON_VDDCPU_DELAY);
+
+		printf("vdd_cpu on\n");
+#if BL30_SUSPEND_DEBUG_EN
+	}
+
+	/* size over load */
+	dump_cpu_fsm_regs();
+	stop_debug_task();
+	exit_func_print();
+#endif
+}
+
+void str_power_off(int shutdown_flag)
+{
+	int ret;
+
+	(void)shutdown_flag;
+#if BL30_SUSPEND_DEBUG_EN
+	enter_func_print();
+	start_debug_task();
+	if (!IS_EN(BL30_SKIP_POWER_SWITCH)) {
+#endif
+
+		/***power off vcc_5v***/
+		ret = xGpioSetDir(VCC5V_GPIO, GPIO_DIR_OUT);
+		if (ret < 0) {
+			printf("vcc_5v set gpio dir fail\n");
+			return;
+		}
+
+		ret = xGpioSetValue(VCC5V_GPIO, GPIO_LEVEL_LOW);
+		if (ret < 0) {
+			printf("vcc_5v gpio val fail\n");
+			return;
+		}
+
+		/***set vdd_ee val***/
+		vdd_ee = vPwmMesongetvoltage(VDDEE_VOLT);
+		if (vdd_ee < 0) {
+			printf("vdd_EE pwm get fail\n");
+			return;
+		}
+
+		ret = vPwmMesonsetvoltage(VDDEE_VOLT, 770);
+		if (ret < 0) {
+			printf("vdd_EE pwm set fail\n");
+			return;
+		}
+
+		/***power off A55 vdd_cpu***/
+		ret = xGpioSetDir(VDDCPU_A55_GPIO, GPIO_DIR_OUT);
+		if (ret < 0) {
+			printf("vdd_cpu set gpio dir fail\n");
+			return;
+		}
+
+		ret = xGpioSetValue(VDDCPU_A55_GPIO, GPIO_LEVEL_LOW);
+		if (ret < 0) {
+			printf("vdd_cpu set gpio val fail\n");
+			return;
+		}
+
+		printf("Power down done.\n");
+#if BL30_SUSPEND_DEBUG_EN
+	} else
+		printf("skiped power switch\n");
+	show_pwm_regs();
+	exit_func_print();
+#endif
+}
diff --git a/bp201_s805x3/power.h b/bp201_s805x3/power.h
new file mode 100644
index 0000000..8f761a1
--- /dev/null
+++ b/bp201_s805x3/power.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef __POWER_H__
+#define __POWER_H__
+
+void str_hw_init(void);
+
+void str_hw_disable(void);
+
+void str_power_on(int shutdown_flag);
+
+void str_power_off(int shutdown_flag);
+
+#endif
+
diff --git a/bp201_s805x3/save_version.h b/bp201_s805x3/save_version.h
new file mode 100644
index 0000000..9abc286
--- /dev/null
+++ b/bp201_s805x3/save_version.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef __SAVE_VERSION_H__
+#define __SAVE_VERSION_H__
+
+#define BL2E_BUFFER_BASE		(0x1200000)
+#define BL2E_VER_BUFF_BASE_ADDR		(BL2E_BUFFER_BASE + 1024 * 65) //bl2e buffer
+#define BL2E_VER_BUFF_SIZE		(0x400)
+
+#endif /* __SAVE_VERSION_H__ */
+
diff --git a/bp201_s805x3/wifi_bt_cfg.h b/bp201_s805x3/wifi_bt_cfg.h
new file mode 100644
index 0000000..c74287e
--- /dev/null
+++ b/bp201_s805x3/wifi_bt_cfg.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef __WIFI_BT_CFG_H__
+#define __WIFI_BT_CFG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//#include "gpio.h"
+
+#if CONFIG_WIFI_BT_WAKE
+
+#define WIFI_WAKE_CFG 1
+#define WIFI_WAKE_HOST GPIOX_7
+#define WIFI_PWREN GPIOX_6
+
+#define BT_WAKE_CFG 1
+#define BT_WAKE_HOST GPIOX_18
+#define BT_EN GPIOX_17
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/build_combination.in b/build_combination.in
index 3aadf3a..6f8dafd 100644
--- a/build_combination.in
+++ b/build_combination.in
@@ -27,8 +27,9 @@
 riscv s7 s7_skt aocpu
 riscv s7 bh201_s905y5 aocpu
 riscv s7 bh202_s905y5 aocpu
-riscv s7 bp202_s805x3 aocpu
 riscv s7 bh209_s905y5 aocpu
+riscv s7 bp201_s805x3 aocpu
+riscv s7 bp202_s805x3 aocpu
 riscv s7 t223_s905y5r aocpu
 riscv s7d s7d_skt aocpu
 riscv s7d bm201_s905x5m aocpu