| commit | f9a3d77eff9d3c1a8447b92d31b50df1f5fb6d80 | [log] [tgz] |
|---|---|---|
| author | Huqiang Qin <huqiang.qin@amlogic.com> | Thu Jul 04 13:32:20 2024 +0800 |
| committer | Huqiang Qin <huqiang.qin@amlogic.com> | Thu Jul 04 13:32:41 2024 +0800 |
| tree | 9837a06e0d9af4d75b8bc9cc30a263ba8cfa13f1 | |
| parent | 4388c24344068c8020ea5ce5fa7b4524964dd305 [diff] |
SoC s6: saradc: fixed the issue of sampling failure during STR [1/1] PD#SWPL-176149 Problem: Sampling failure during STR. Solution: SARADC digital clock is not enabled, just enable it. Verify: S6/BL201 S7D/BM201 Change-Id: I3d3c63e02bc3c796226b349698d1b3ca5cf7fc56 Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>