video: dw-mipi-dsi: permit configuring the escape clock rate
The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency
higher than 10MHz for the TX Escape Clock, thus make the target rate
configurable.
This is based on the Linux commit [1] and adapted to the U-Boot driver.
[1] a328ca7e4af3 ("drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/include/mipi_dsi.h b/include/mipi_dsi.h
index 55c7ab3..4ca05f7 100644
--- a/include/mipi_dsi.h
+++ b/include/mipi_dsi.h
@@ -123,6 +123,7 @@
void (*post_set_mode)(void *priv_data, unsigned long mode_flags);
int (*get_timing)(void *priv_data, unsigned int lane_mbps,
struct mipi_dsi_phy_timing *timing);
+ void (*get_esc_clk_rate)(void *priv_data, unsigned int *esc_clk_rate);
};
/**