powerpc/8xxx: Enable quad-rank DIMMs.
Previous code presumes each DIMM has up to two rank (chip select). Newer
DDR controller supports up to four chip select on one DIMM.
Signed-off-by: York Sun <yorksun@freescale.com>
diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h
index 02920db..431327e 100644
--- a/arch/powerpc/include/asm/fsl_ddr_sdram.h
+++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h
@@ -172,6 +172,7 @@
unsigned int OTF_burst_chop_en;
/* mirrior DIMMs for DDR3 */
unsigned int mirrored_dimm;
+ unsigned int quad_rank_present;
/* Global Timing Parameters */
unsigned int cas_latency_override;