| commit | 6839e695d4223b05df202430606c951a0bb40823 | [log] [tgz] |
|---|---|---|
| author | Wenjie Qiao <wenjie.qiao@amlogic.com> | Mon Dec 09 15:33:03 2024 +0800 |
| committer | gerrit autosubmit <gerrit.autosubmit@amlogic.com> | Sun Dec 15 17:56:31 2024 -0800 |
| tree | 28e81a4487fb7f495d9e7041cb9fc543fa399fce | |
| parent | e72e50ab72659806bc4cf13e961006fcbc12fb52 [diff] |
hdmitx: s6/s7d check the deep color phase [1/2] PD#SWPL-194999 Problem: check the deep color phase may make time out Solution: enable phy to dig before poll reg keep the tmds clk and pixel clk Verify: s6/s7d Test: DRM-TX-135 Change-Id: Ifa0d35a325cddf150ac12c10288814973f6709ab Signed-off-by: Wenjie Qiao <wenjie.qiao@amlogic.com>