| Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| GuanXuetao | b50f170 | 2011-01-15 18:16:59 +0800 | [diff] [blame] | 2 | /* |
| 3 | * linux/arch/unicore32/include/asm/cache.h |
| 4 | * |
| 5 | * Code specific to PKUnity SoC and UniCore ISA |
| 6 | * |
| 7 | * Copyright (C) 2001-2010 GUAN Xue-tao |
| GuanXuetao | b50f170 | 2011-01-15 18:16:59 +0800 | [diff] [blame] | 8 | */ |
| 9 | #ifndef __UNICORE_CACHE_H__ |
| 10 | #define __UNICORE_CACHE_H__ |
| 11 | |
| 12 | #define L1_CACHE_SHIFT (5) |
| 13 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| 14 | |
| 15 | /* |
| 16 | * Memory returned by kmalloc() may be used for DMA, so we must make |
| 17 | * sure that all such allocations are cache aligned. Otherwise, |
| 18 | * unrelated code may cause parts of the buffer to be read into the |
| 19 | * cache before the transfer is done, causing old data to be seen by |
| 20 | * the CPU. |
| 21 | */ |
| 22 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |
| 23 | |
| 24 | #endif |