Qiufang Dai | 141086d | 2020-05-29 17:16:41 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014-2018 Amlogic, Inc. All rights reserved. |
| 3 | * |
| 4 | * All information contained herein is Amlogic confidential. |
| 5 | * |
| 6 | * This software is provided to you pursuant to Software License Agreement |
| 7 | * (SLA) with Amlogic Inc ("Amlogic"). This software may be used |
| 8 | * only in accordance with the terms of this agreement. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification is strictly prohibited without prior written permission from |
| 12 | * Amlogic. |
| 13 | * |
| 14 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 15 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 16 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 17 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 18 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 19 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 20 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 21 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 22 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 24 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 25 | */ |
| 26 | |
| 27 | /* |
| 28 | * UART driver |
| 29 | */ |
| 30 | |
| 31 | #include "common.h" |
| 32 | #include "uart.h" |
| 33 | #include "register.h" |
Jianxiong Pan | 5e711c1 | 2020-11-19 13:42:23 +0800 | [diff] [blame] | 34 | #include "soc.h" |
Qiufang Dai | 141086d | 2020-05-29 17:16:41 +0800 | [diff] [blame] | 35 | |
Jianxiong Pan | 5e711c1 | 2020-11-19 13:42:23 +0800 | [diff] [blame] | 36 | //#define UART_PORT_CONS UART_B_WFIFO |
Qiufang Dai | 141086d | 2020-05-29 17:16:41 +0800 | [diff] [blame] | 37 | |
| 38 | #define UART_STP_BIT UART_MODE_MASK_STP_1BIT |
| 39 | #define UART_PRTY_BIT 0 |
| 40 | #define UART_CHAR_LEN UART_MODE_MASK_CHAR_8BIT |
| 41 | #define UART_MODE_RESET_MASK \ |
| 42 | (UART_MODE_MASK_RST_TX \ |
| 43 | | UART_MODE_MASK_RST_RX \ |
| 44 | | UART_MODE_MASK_CLR_ERR) |
| 45 | |
| 46 | #define UART_WFIFO (0<<2) |
| 47 | #define UART_RFIFO (1<<2) |
| 48 | #define UART_MODE (2<<2) |
| 49 | #define UART_STATUS (3<<2) |
| 50 | #define UART_IRQCTL (4<<2) |
| 51 | #define UART_CTRL (5<<2) |
| 52 | #define UART_MODE_MASK_STP_1BIT (0<<16) |
| 53 | #define UART_MODE_MASK_CHAR_8BIT (0<<20) |
| 54 | #define UART_MODE_MASK_TX_EN (1<<12) |
| 55 | #define UART_MODE_MASK_RX_EN (1<<13) |
| 56 | #define UART_MODE_MASK_RST_TX (1<<22) |
| 57 | #define UART_MODE_MASK_RST_RX (1<<23) |
| 58 | #define UART_MODE_MASK_CLR_ERR (1<<24) |
| 59 | #define UART_CTRL_USE_XTAL_CLK (1<<24) |
| 60 | #define UART_CTRL_USE_NEW_BAUD_RATE (1<<23) |
| 61 | |
| 62 | #define UART_STAT_MASK_RFIFO_FULL (1<<19) |
| 63 | #define UART_STAT_MASK_RFIFO_EMPTY (1<<20) |
| 64 | #define UART_STAT_MASK_TFIFO_FULL (1<<21) |
| 65 | #define UART_STAT_MASK_TFIFO_EMPTY (1<<22) |
| 66 | |
| 67 | #define P_UART(uart_base, reg) (uart_base+reg) |
| 68 | #define P_UART_WFIFO(uart_base) P_UART(uart_base, UART_WFIFO) |
| 69 | #define P_UART_MODE(uart_base) P_UART(uart_base, UART_MODE) |
| 70 | #define P_UART_CTRL(uart_base) P_UART(uart_base, UART_CTRL) |
| 71 | #define P_UART_STATUS(uart_base) P_UART(uart_base, UART_STATUS) |
| 72 | |
bangzheng.liu | 5f8b4c9 | 2024-02-26 13:38:08 +0800 | [diff] [blame^] | 73 | #if (ARCH_CPU == RISC_V_N205) && !defined(N200_REVA) |
| 74 | #include "stick_mem.h" |
| 75 | #include "mailbox-api.h" |
| 76 | static uint8_t bl30_print_en; |
| 77 | void enable_bl30_print(uint8_t enable) |
| 78 | { |
| 79 | /* Applied to output important logs */ |
| 80 | bl30_print_en = enable; |
| 81 | } |
| 82 | |
| 83 | /* Applied to enable or disable bl30 start logs before first |
| 84 | * suspend or shutdown when compile with '--noverbose'. |
| 85 | */ |
| 86 | static void *xMboxBL30PrintEn(void *msg) |
| 87 | { |
| 88 | stick_mem_write(STICK_BL30_PRINT_EN, *(uint32_t *)msg); |
| 89 | |
| 90 | return NULL; |
| 91 | } |
| 92 | |
| 93 | void vBL30PrintControlInit(void) |
| 94 | { |
| 95 | xInstallRemoteMessageCallbackFeedBack(AOREE_CHANNEL, |
| 96 | MBX_CMD_SET_BL30_PRINT, xMboxBL30PrintEn, 0); |
| 97 | } |
| 98 | #endif |
| 99 | |
Qiufang Dai | 141086d | 2020-05-29 17:16:41 +0800 | [diff] [blame] | 100 | static int prvUartTxIsFull(void) |
| 101 | { |
| 102 | return REG32(P_UART_STATUS(UART_PORT_CONS)) & UART_STAT_MASK_TFIFO_FULL; |
| 103 | } |
| 104 | |
| 105 | void vUartTxFlush(void) |
| 106 | { |
| 107 | while (! |
| 108 | (REG32(P_UART_STATUS(UART_PORT_CONS)) & |
| 109 | UART_STAT_MASK_TFIFO_EMPTY)); |
| 110 | } |
| 111 | |
| 112 | void vUartPutc(const char c) |
| 113 | { |
bangzheng.liu | 5f8b4c9 | 2024-02-26 13:38:08 +0800 | [diff] [blame^] | 114 | #if (ARCH_CPU == RISC_V_N205) && !defined(N200_REVA) |
| 115 | unsigned int stick_mem_bl30_print_en; |
| 116 | |
| 117 | stick_mem_read(STICK_BL30_PRINT_EN, &stick_mem_bl30_print_en); |
| 118 | if ((REG32(SYSCTRL_SEC_STATUS_REG4) & ACS_DIS_PRINT_FLAG) && !bl30_print_en |
| 119 | && (stick_mem_bl30_print_en != STICK_MEM_EN_BL30_PRINT_FLAG)) |
| 120 | return; |
| 121 | #endif |
Qiufang Dai | 141086d | 2020-05-29 17:16:41 +0800 | [diff] [blame] | 122 | if (c == '\n') |
| 123 | vUartPutc('\r'); |
| 124 | |
| 125 | while (prvUartTxIsFull()); |
| 126 | REG32(P_UART_WFIFO(UART_PORT_CONS)) = (char)c; |
| 127 | vUartTxFlush(); |
| 128 | } |
| 129 | |
| 130 | void vUartPuts(const char *s) |
| 131 | { |
| 132 | while (*s) |
| 133 | vUartPutc(*s++); |
| 134 | } |
| 135 | |
| 136 | void vUartTxStart(void) |
| 137 | { |
| 138 | /* Do not allow deep sleep while transmit in progress */ |
| 139 | #ifdef CONFIG_LOW_POWER_IDLE |
| 140 | disable_sleep(SLEEP_MASK_UART); |
| 141 | #endif |
| 142 | |
| 143 | //uart_flush_output(); |
| 144 | } |
| 145 | |
| 146 | void vUartTxStop(void) |
| 147 | { |
| 148 | |
| 149 | } |
| 150 | |
| 151 | long lUartTxReady(void) |
| 152 | { |
| 153 | return !(REG32(P_UART_STATUS(UART_PORT_CONS)) & |
| 154 | UART_STAT_MASK_TFIFO_FULL); |
| 155 | } |
| 156 | #if 0 |
| 157 | void vUartWriteChar(char c) |
| 158 | { |
| 159 | vUartPutc(c); |
| 160 | } |
| 161 | |
| 162 | int uart_tx_char(int c) |
| 163 | { |
| 164 | vUartPutc(c); |
| 165 | |
| 166 | return c; |
| 167 | } |
| 168 | /*print BCD*/ |
| 169 | void print_u32_dec(unsigned int num) { |
| 170 | char buf[16]; |
| 171 | char *s = buf + (sizeof(buf) / sizeof(buf[0])) - 1; |
| 172 | char *e = s; |
| 173 | |
| 174 | do { |
| 175 | *--s = '0' + num % 10; |
| 176 | } while (num /= 10); |
| 177 | |
| 178 | while (s < e) |
| 179 | uart_tx_char(*s++); |
| 180 | } |
| 181 | |
| 182 | void serial_put_hex(unsigned long data, unsigned int bitlen) |
| 183 | { |
| 184 | int i; |
| 185 | unsigned char s; |
| 186 | |
| 187 | for (i = bitlen - 4; i >= 0; i -= 4) |
| 188 | { |
| 189 | s = (data >> i) & 0xf; |
| 190 | if (s < 10) |
| 191 | vUartPutc(0x30 + s); |
| 192 | else if (s < 16) |
| 193 | vUartPutc(0x61 + s - 10); |
| 194 | } |
| 195 | } |
| 196 | #endif |
| 197 | #if 0 |
| 198 | /* Interrupt handler for console UART */ |
| 199 | void uart_interrupt(void) |
| 200 | { |
| 201 | /* Fill output FIFO */ |
| 202 | uart_process_output(); |
| 203 | } |
| 204 | |
| 205 | DECLARE_IRQ(IRQ_AO_UART_NUM, uart_interrupt, 1); |
| 206 | #endif |
| 207 | |
| 208 | /* |
| 209 | * Set UART to 115200-8-N-1 |
| 210 | * |
| 211 | * Using 24M XTAL as UART reference clock, *NOT* clk81 |
| 212 | * So the clk81 can be dynamically changed and not |
Yao Jie | 0ba0c41 | 2022-09-05 11:11:37 +0800 | [diff] [blame] | 213 | * disturb UART transfers. |
Qiufang Dai | 141086d | 2020-05-29 17:16:41 +0800 | [diff] [blame] | 214 | */ |
| 215 | void vUartInit(void) |
| 216 | { |
| 217 | } |