blob: 02cf449094f104033c27de938f03b5a30418a82d [file] [log] [blame]
Juergen Beiserteea643f2008-07-05 10:02:56 +02001/*
2 * Copyright (C) 1999 ARM Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
Ilya Yanok74bef9a2009-03-03 02:49:23 +03006 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
Juergen Beiserteea643f2008-07-05 10:02:56 +02007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Juergen Beiserteea643f2008-07-05 10:02:56 +020017 */
18
19#include <linux/kernel.h>
20#include <linux/clk.h>
21#include <linux/io.h>
Ilya Yanok74bef9a2009-03-03 02:49:23 +030022#include <linux/err.h>
23#include <linux/delay.h>
Juergen Beiserteea643f2008-07-05 10:02:56 +020024
David Howells9f97da72012-03-28 18:30:01 +010025#include <asm/system_misc.h>
Juergen Beiserteea643f2008-07-05 10:02:56 +020026#include <asm/proc-fns.h>
Arnaud Patard (Rtp)c2932bf2010-10-27 14:40:55 +020027#include <asm/mach-types.h>
Juergen Beiserteea643f2008-07-05 10:02:56 +020028
Shawn Guoe3372472012-09-13 21:01:00 +080029#include "common.h"
Shawn Guo50f2de62012-09-14 14:14:45 +080030#include "hardware.h"
Shawn Guoe3372472012-09-13 21:01:00 +080031
Sascha Hauerbe124c92009-06-04 12:19:02 +020032static void __iomem *wdog_base;
Shawn Guo18cb6802013-05-10 09:13:44 +080033static struct clk *wdog_clk;
Juergen Beiserteea643f2008-07-05 10:02:56 +020034
35/*
36 * Reset the system. It is called by machine_restart().
37 */
Russell King65ea7882011-11-06 17:12:08 +000038void mxc_restart(char mode, const char *cmd)
Juergen Beiserteea643f2008-07-05 10:02:56 +020039{
Sascha Hauerbe124c92009-06-04 12:19:02 +020040 unsigned int wcr_enable;
41
Shawn Guo18cb6802013-05-10 09:13:44 +080042 if (wdog_clk)
43 clk_enable(wdog_clk);
Juergen Beiserteea643f2008-07-05 10:02:56 +020044
Shawn Guo18cb6802013-05-10 09:13:44 +080045 if (cpu_is_mx1())
46 wcr_enable = (1 << 0);
47 else
Sascha Hauerbe124c92009-06-04 12:19:02 +020048 wcr_enable = (1 << 2);
Juergen Beiserteea643f2008-07-05 10:02:56 +020049
Juergen Beiserteea643f2008-07-05 10:02:56 +020050 /* Assert SRS signal */
Sascha Hauerbe124c92009-06-04 12:19:02 +020051 __raw_writew(wcr_enable, wdog_base);
Ilya Yanok74bef9a2009-03-03 02:49:23 +030052
53 /* wait for reset to assert... */
54 mdelay(500);
55
Shawn Guo18cb6802013-05-10 09:13:44 +080056 pr_err("%s: Watchdog reset failed to assert reset\n", __func__);
Ilya Yanok74bef9a2009-03-03 02:49:23 +030057
58 /* delay to allow the serial port to show the message */
59 mdelay(50);
60
61 /* we'll take a jump through zero as a poor second */
Russell Kinge879c862011-11-01 13:16:26 +000062 soft_restart(0);
Juergen Beiserteea643f2008-07-05 10:02:56 +020063}
Sascha Hauerbe124c92009-06-04 12:19:02 +020064
Shawn Guo18cb6802013-05-10 09:13:44 +080065void __init mxc_arch_reset_init(void __iomem *base)
Sascha Hauerbe124c92009-06-04 12:19:02 +020066{
67 wdog_base = base;
Shawn Guo18cb6802013-05-10 09:13:44 +080068
69 wdog_clk = clk_get_sys("imx2-wdt.0", NULL);
70 if (IS_ERR(wdog_clk)) {
71 pr_warn("%s: failed to get wdog clock\n", __func__);
72 wdog_clk = NULL;
73 return;
74 }
75
76 clk_prepare(wdog_clk);
Sascha Hauerbe124c92009-06-04 12:19:02 +020077}