Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 1 | /* |
Linus Walleij | a0719f5 | 2010-09-13 13:40:04 +0100 | [diff] [blame] | 2 | * linux/arch/arm/plat-nomadik/timer.c |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2008 STMicroelectronics |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 5 | * Copyright (C) 2010 Alessandro Rubini |
Linus Walleij | 8fbb97a2 | 2010-11-19 10:16:05 +0100 | [diff] [blame] | 6 | * Copyright (C) 2010 Linus Walleij for ST-Ericsson |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2, as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/interrupt.h> |
| 14 | #include <linux/irq.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/clockchips.h> |
Linus Walleij | ba327b1 | 2010-05-26 07:38:54 +0100 | [diff] [blame] | 17 | #include <linux/clk.h> |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 18 | #include <linux/jiffies.h> |
Linus Walleij | ba327b1 | 2010-05-26 07:38:54 +0100 | [diff] [blame] | 19 | #include <linux/err.h> |
Russell King | 5e06b64 | 2010-12-15 19:19:25 +0000 | [diff] [blame] | 20 | #include <linux/sched.h> |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 21 | #include <asm/mach/time.h> |
Russell King | ec05aa1 | 2010-12-15 21:53:02 +0000 | [diff] [blame] | 22 | #include <asm/sched_clock.h> |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 23 | |
Srinidhi Kasagar | 59b559d | 2009-11-12 06:20:54 +0100 | [diff] [blame] | 24 | #include <plat/mtu.h> |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 25 | |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 26 | static bool clkevt_periodic; |
| 27 | static u32 clk_prescale; |
| 28 | static u32 nmdk_cycle; /* write-once */ |
| 29 | |
Linus Walleij | 8fbb97a2 | 2010-11-19 10:16:05 +0100 | [diff] [blame] | 30 | void __iomem *mtu_base; /* Assigned by machine code */ |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 31 | |
Mattias Wallin | cba1383 | 2011-05-27 10:29:25 +0200 | [diff] [blame] | 32 | #ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK |
Linus Walleij | 2a84751 | 2010-05-07 10:03:02 +0100 | [diff] [blame] | 33 | /* |
Linus Walleij | 2a84751 | 2010-05-07 10:03:02 +0100 | [diff] [blame] | 34 | * Override the global weak sched_clock symbol with this |
| 35 | * local implementation which uses the clocksource to get some |
Linus Walleij | 8fbb97a2 | 2010-11-19 10:16:05 +0100 | [diff] [blame] | 36 | * better resolution when scheduling the kernel. |
Linus Walleij | 2a84751 | 2010-05-07 10:03:02 +0100 | [diff] [blame] | 37 | */ |
Russell King | ec05aa1 | 2010-12-15 21:53:02 +0000 | [diff] [blame] | 38 | static DEFINE_CLOCK_DATA(cd); |
Linus Walleij | 8fbb97a2 | 2010-11-19 10:16:05 +0100 | [diff] [blame] | 39 | |
Linus Walleij | 2a84751 | 2010-05-07 10:03:02 +0100 | [diff] [blame] | 40 | unsigned long long notrace sched_clock(void) |
| 41 | { |
Russell King | ec05aa1 | 2010-12-15 21:53:02 +0000 | [diff] [blame] | 42 | u32 cyc; |
Linus Walleij | 8fbb97a2 | 2010-11-19 10:16:05 +0100 | [diff] [blame] | 43 | |
| 44 | if (unlikely(!mtu_base)) |
| 45 | return 0; |
| 46 | |
Russell King | ec05aa1 | 2010-12-15 21:53:02 +0000 | [diff] [blame] | 47 | cyc = -readl(mtu_base + MTU_VAL(0)); |
| 48 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); |
Linus Walleij | 8fbb97a2 | 2010-11-19 10:16:05 +0100 | [diff] [blame] | 49 | } |
| 50 | |
Russell King | ec05aa1 | 2010-12-15 21:53:02 +0000 | [diff] [blame] | 51 | static void notrace nomadik_update_sched_clock(void) |
Linus Walleij | 8fbb97a2 | 2010-11-19 10:16:05 +0100 | [diff] [blame] | 52 | { |
Russell King | ec05aa1 | 2010-12-15 21:53:02 +0000 | [diff] [blame] | 53 | u32 cyc = -readl(mtu_base + MTU_VAL(0)); |
| 54 | update_sched_clock(&cd, cyc, (u32)~0); |
Linus Walleij | 2a84751 | 2010-05-07 10:03:02 +0100 | [diff] [blame] | 55 | } |
Mattias Wallin | cba1383 | 2011-05-27 10:29:25 +0200 | [diff] [blame] | 56 | #endif |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 57 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 58 | /* Clockevent device: use one-shot mode */ |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 59 | static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev) |
| 60 | { |
| 61 | writel(1 << 1, mtu_base + MTU_IMSC); |
| 62 | writel(evt, mtu_base + MTU_LR(1)); |
| 63 | /* Load highest value, enable device, enable interrupts */ |
| 64 | writel(MTU_CRn_ONESHOT | clk_prescale | |
| 65 | MTU_CRn_32BITS | MTU_CRn_ENA, |
| 66 | mtu_base + MTU_CR(1)); |
| 67 | |
| 68 | return 0; |
| 69 | } |
| 70 | |
| 71 | static void nmdk_clkevt_reset(void) |
| 72 | { |
| 73 | if (clkevt_periodic) { |
| 74 | |
| 75 | /* Timer: configure load and background-load, and fire it up */ |
| 76 | writel(nmdk_cycle, mtu_base + MTU_LR(1)); |
| 77 | writel(nmdk_cycle, mtu_base + MTU_BGLR(1)); |
| 78 | |
| 79 | writel(MTU_CRn_PERIODIC | clk_prescale | |
| 80 | MTU_CRn_32BITS | MTU_CRn_ENA, |
| 81 | mtu_base + MTU_CR(1)); |
| 82 | writel(1 << 1, mtu_base + MTU_IMSC); |
| 83 | } else { |
| 84 | /* Generate an interrupt to start the clockevent again */ |
| 85 | (void) nmdk_clkevt_next(nmdk_cycle, NULL); |
| 86 | } |
| 87 | } |
| 88 | |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 89 | static void nmdk_clkevt_mode(enum clock_event_mode mode, |
| 90 | struct clock_event_device *dev) |
| 91 | { |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 92 | |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 93 | switch (mode) { |
| 94 | case CLOCK_EVT_MODE_PERIODIC: |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 95 | clkevt_periodic = true; |
| 96 | nmdk_clkevt_reset(); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 97 | break; |
| 98 | case CLOCK_EVT_MODE_ONESHOT: |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 99 | clkevt_periodic = false; |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 100 | break; |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 101 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 102 | case CLOCK_EVT_MODE_UNUSED: |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 103 | writel(0, mtu_base + MTU_IMSC); |
Linus Walleij | 2917947 | 2010-06-01 08:26:49 +0100 | [diff] [blame] | 104 | /* disable timer */ |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 105 | writel(0, mtu_base + MTU_CR(1)); |
Linus Walleij | 2917947 | 2010-06-01 08:26:49 +0100 | [diff] [blame] | 106 | /* load some high default value */ |
| 107 | writel(0xffffffff, mtu_base + MTU_LR(1)); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 108 | break; |
| 109 | case CLOCK_EVT_MODE_RESUME: |
| 110 | break; |
| 111 | } |
| 112 | } |
| 113 | |
| 114 | static struct clock_event_device nmdk_clkevt = { |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 115 | .name = "mtu_1", |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 116 | .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 117 | .rating = 200, |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 118 | .set_mode = nmdk_clkevt_mode, |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 119 | .set_next_event = nmdk_clkevt_next, |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 120 | }; |
| 121 | |
| 122 | /* |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 123 | * IRQ Handler for timer 1 of the MTU block. |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 124 | */ |
| 125 | static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id) |
| 126 | { |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 127 | struct clock_event_device *evdev = dev_id; |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 128 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 129 | writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */ |
| 130 | evdev->event_handler(evdev); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 131 | return IRQ_HANDLED; |
| 132 | } |
| 133 | |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 134 | static struct irqaction nmdk_timer_irq = { |
| 135 | .name = "Nomadik Timer Tick", |
| 136 | .flags = IRQF_DISABLED | IRQF_TIMER, |
| 137 | .handler = nmdk_timer_interrupt, |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 138 | .dev_id = &nmdk_clkevt, |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 139 | }; |
| 140 | |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 141 | static void nmdk_clksrc_reset(void) |
| 142 | { |
| 143 | /* Disable */ |
| 144 | writel(0, mtu_base + MTU_CR(0)); |
| 145 | |
| 146 | /* ClockSource: configure load and background-load, and fire it up */ |
| 147 | writel(nmdk_cycle, mtu_base + MTU_LR(0)); |
| 148 | writel(nmdk_cycle, mtu_base + MTU_BGLR(0)); |
| 149 | |
| 150 | writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA, |
| 151 | mtu_base + MTU_CR(0)); |
| 152 | } |
| 153 | |
Srinidhi Kasagar | 59b559d | 2009-11-12 06:20:54 +0100 | [diff] [blame] | 154 | void __init nmdk_timer_init(void) |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 155 | { |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 156 | unsigned long rate; |
Linus Walleij | ba327b1 | 2010-05-26 07:38:54 +0100 | [diff] [blame] | 157 | struct clk *clk0; |
Linus Walleij | ba327b1 | 2010-05-26 07:38:54 +0100 | [diff] [blame] | 158 | |
| 159 | clk0 = clk_get_sys("mtu0", NULL); |
| 160 | BUG_ON(IS_ERR(clk0)); |
| 161 | |
Linus Walleij | ba327b1 | 2010-05-26 07:38:54 +0100 | [diff] [blame] | 162 | clk_enable(clk0); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 163 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 164 | /* |
Linus Walleij | a0719f5 | 2010-09-13 13:40:04 +0100 | [diff] [blame] | 165 | * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz |
| 166 | * for ux500. |
| 167 | * Use a divide-by-16 counter if the tick rate is more than 32MHz. |
| 168 | * At 32 MHz, the timer (with 32 bit counter) can be programmed |
| 169 | * to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer |
| 170 | * with 16 gives too low timer resolution. |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 171 | */ |
Linus Walleij | ba327b1 | 2010-05-26 07:38:54 +0100 | [diff] [blame] | 172 | rate = clk_get_rate(clk0); |
Linus Walleij | a0719f5 | 2010-09-13 13:40:04 +0100 | [diff] [blame] | 173 | if (rate > 32000000) { |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 174 | rate /= 16; |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 175 | clk_prescale = MTU_CRn_PRESCALE_16; |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 176 | } else { |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 177 | clk_prescale = MTU_CRn_PRESCALE_1; |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 178 | } |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 179 | |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 180 | nmdk_cycle = (rate + HZ/2) / HZ; |
| 181 | |
| 182 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 183 | /* Timer 0 is the free running clocksource */ |
Jonas Aaberg | 2f73a06 | 2011-09-14 10:32:51 +0200 | [diff] [blame^] | 184 | nmdk_clksrc_reset(); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 185 | |
Russell King | bfe45e0 | 2011-05-08 15:33:30 +0100 | [diff] [blame] | 186 | if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0", |
| 187 | rate, 200, 32, clocksource_mmio_readl_down)) |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 188 | pr_err("timer: failed to initialize clock source %s\n", |
Russell King | bfe45e0 | 2011-05-08 15:33:30 +0100 | [diff] [blame] | 189 | "mtu_0"); |
Mattias Wallin | cba1383 | 2011-05-27 10:29:25 +0200 | [diff] [blame] | 190 | #ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK |
Russell King | ec05aa1 | 2010-12-15 21:53:02 +0000 | [diff] [blame] | 191 | init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate); |
Mattias Wallin | cba1383 | 2011-05-27 10:29:25 +0200 | [diff] [blame] | 192 | #endif |
Linus Walleij | 99f7689 | 2010-09-13 13:38:55 +0100 | [diff] [blame] | 193 | /* Timer 1 is used for events */ |
| 194 | |
Linus Walleij | 2917947 | 2010-06-01 08:26:49 +0100 | [diff] [blame] | 195 | clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); |
| 196 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame] | 197 | nmdk_clkevt.max_delta_ns = |
| 198 | clockevent_delta2ns(0xffffffff, &nmdk_clkevt); |
| 199 | nmdk_clkevt.min_delta_ns = |
| 200 | clockevent_delta2ns(0x00000002, &nmdk_clkevt); |
| 201 | nmdk_clkevt.cpumask = cpumask_of(0); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 202 | |
| 203 | /* Register irq and clockevents */ |
| 204 | setup_irq(IRQ_MTU0, &nmdk_timer_irq); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 205 | clockevents_register_device(&nmdk_clkevt); |
| 206 | } |