blob: 490aee79e1065e2cb98fdba079e4a8bc70f40eb5 [file] [log] [blame]
Rob Clark16ea9752013-01-08 15:04:28 -06001/*
2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/* LCDC DRM driver, based on da8xx-fb */
19
20#include "tilcdc_drv.h"
21#include "tilcdc_regs.h"
22#include "tilcdc_tfp410.h"
Rob Clark6e8de0bd2013-01-22 16:02:21 -060023#include "tilcdc_slave.h"
Rob Clark0d4bbaf2012-12-18 17:34:16 -060024#include "tilcdc_panel.h"
Rob Clark16ea9752013-01-08 15:04:28 -060025
26#include "drm_fb_helper.h"
27
28static LIST_HEAD(module_list);
Darren Etheridge39de6192013-06-21 13:52:27 -050029static bool slave_probing;
Rob Clark16ea9752013-01-08 15:04:28 -060030
31void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
32 const struct tilcdc_module_ops *funcs)
33{
34 mod->name = name;
35 mod->funcs = funcs;
36 INIT_LIST_HEAD(&mod->list);
37 list_add(&mod->list, &module_list);
38}
39
40void tilcdc_module_cleanup(struct tilcdc_module *mod)
41{
42 list_del(&mod->list);
43}
44
Darren Etheridge39de6192013-06-21 13:52:27 -050045void tilcdc_slave_probedefer(bool defered)
46{
47 slave_probing = defered;
48}
49
Rob Clark16ea9752013-01-08 15:04:28 -060050static struct of_device_id tilcdc_of_match[];
51
52static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
53 struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
54{
55 return drm_fb_cma_create(dev, file_priv, mode_cmd);
56}
57
58static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
59{
60 struct tilcdc_drm_private *priv = dev->dev_private;
61 if (priv->fbdev)
62 drm_fbdev_cma_hotplug_event(priv->fbdev);
63}
64
65static const struct drm_mode_config_funcs mode_config_funcs = {
66 .fb_create = tilcdc_fb_create,
67 .output_poll_changed = tilcdc_fb_output_poll_changed,
68};
69
70static int modeset_init(struct drm_device *dev)
71{
72 struct tilcdc_drm_private *priv = dev->dev_private;
73 struct tilcdc_module *mod;
74
75 drm_mode_config_init(dev);
76
77 priv->crtc = tilcdc_crtc_create(dev);
78
79 list_for_each_entry(mod, &module_list, list) {
80 DBG("loading module: %s", mod->name);
81 mod->funcs->modeset_init(mod, dev);
82 }
83
Sachin Kamat9e488542013-03-02 15:53:06 +053084 if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
Rob Clark16ea9752013-01-08 15:04:28 -060085 /* oh nos! */
86 dev_err(dev->dev, "no encoders/connectors found\n");
87 return -ENXIO;
88 }
89
90 dev->mode_config.min_width = 0;
91 dev->mode_config.min_height = 0;
92 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
93 dev->mode_config.max_height = 2048;
94 dev->mode_config.funcs = &mode_config_funcs;
95
96 return 0;
97}
98
99#ifdef CONFIG_CPU_FREQ
100static int cpufreq_transition(struct notifier_block *nb,
101 unsigned long val, void *data)
102{
103 struct tilcdc_drm_private *priv = container_of(nb,
104 struct tilcdc_drm_private, freq_transition);
105 if (val == CPUFREQ_POSTCHANGE) {
106 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
107 priv->lcd_fck_rate = clk_get_rate(priv->clk);
108 tilcdc_crtc_update_clk(priv->crtc);
109 }
110 }
111
112 return 0;
113}
114#endif
115
116/*
117 * DRM operations:
118 */
119
120static int tilcdc_unload(struct drm_device *dev)
121{
122 struct tilcdc_drm_private *priv = dev->dev_private;
123 struct tilcdc_module *mod, *cur;
124
Guido Martínez3a490122014-06-17 11:17:07 -0300125 drm_fbdev_cma_fini(priv->fbdev);
Rob Clark16ea9752013-01-08 15:04:28 -0600126 drm_kms_helper_poll_fini(dev);
127 drm_mode_config_cleanup(dev);
128 drm_vblank_cleanup(dev);
129
130 pm_runtime_get_sync(dev->dev);
131 drm_irq_uninstall(dev);
132 pm_runtime_put_sync(dev->dev);
133
134#ifdef CONFIG_CPU_FREQ
135 cpufreq_unregister_notifier(&priv->freq_transition,
136 CPUFREQ_TRANSITION_NOTIFIER);
137#endif
138
139 if (priv->clk)
140 clk_put(priv->clk);
141
142 if (priv->mmio)
143 iounmap(priv->mmio);
144
145 flush_workqueue(priv->wq);
146 destroy_workqueue(priv->wq);
147
148 dev->dev_private = NULL;
149
150 pm_runtime_disable(dev->dev);
151
152 list_for_each_entry_safe(mod, cur, &module_list, list) {
153 DBG("destroying module: %s", mod->name);
154 mod->funcs->destroy(mod);
155 }
156
157 kfree(priv);
158
159 return 0;
160}
161
162static int tilcdc_load(struct drm_device *dev, unsigned long flags)
163{
164 struct platform_device *pdev = dev->platformdev;
165 struct device_node *node = pdev->dev.of_node;
166 struct tilcdc_drm_private *priv;
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500167 struct tilcdc_module *mod;
Rob Clark16ea9752013-01-08 15:04:28 -0600168 struct resource *res;
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500169 u32 bpp = 0;
Rob Clark16ea9752013-01-08 15:04:28 -0600170 int ret;
171
172 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
173 if (!priv) {
174 dev_err(dev->dev, "failed to allocate private data\n");
175 return -ENOMEM;
176 }
177
178 dev->dev_private = priv;
179
180 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
181
182 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
183 if (!res) {
184 dev_err(dev->dev, "failed to get memory resource\n");
185 ret = -EINVAL;
186 goto fail;
187 }
188
189 priv->mmio = ioremap_nocache(res->start, resource_size(res));
190 if (!priv->mmio) {
191 dev_err(dev->dev, "failed to ioremap\n");
192 ret = -ENOMEM;
193 goto fail;
194 }
195
196 priv->clk = clk_get(dev->dev, "fck");
197 if (IS_ERR(priv->clk)) {
198 dev_err(dev->dev, "failed to get functional clock\n");
199 ret = -ENODEV;
200 goto fail;
201 }
202
203 priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
204 if (IS_ERR(priv->clk)) {
205 dev_err(dev->dev, "failed to get display clock\n");
206 ret = -ENODEV;
207 goto fail;
208 }
209
210#ifdef CONFIG_CPU_FREQ
211 priv->lcd_fck_rate = clk_get_rate(priv->clk);
212 priv->freq_transition.notifier_call = cpufreq_transition;
213 ret = cpufreq_register_notifier(&priv->freq_transition,
214 CPUFREQ_TRANSITION_NOTIFIER);
215 if (ret) {
216 dev_err(dev->dev, "failed to register cpufreq notifier\n");
217 goto fail;
218 }
219#endif
220
221 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
Darren Etheridge4e564342013-06-21 13:52:23 -0500222 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
223
224 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
225
226 if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
227 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
228
229 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
230
231 if (of_property_read_u32(node, "ti,max-pixelclock",
232 &priv->max_pixelclock))
233 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
234
235 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
Rob Clark16ea9752013-01-08 15:04:28 -0600236
237 pm_runtime_enable(dev->dev);
238
239 /* Determine LCD IP Version */
240 pm_runtime_get_sync(dev->dev);
241 switch (tilcdc_read(dev, LCDC_PID_REG)) {
242 case 0x4c100102:
243 priv->rev = 1;
244 break;
245 case 0x4f200800:
246 case 0x4f201000:
247 priv->rev = 2;
248 break;
249 default:
250 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
251 "defaulting to LCD revision 1\n",
252 tilcdc_read(dev, LCDC_PID_REG));
253 priv->rev = 1;
254 break;
255 }
256
257 pm_runtime_put_sync(dev->dev);
258
259 ret = modeset_init(dev);
260 if (ret < 0) {
261 dev_err(dev->dev, "failed to initialize mode setting\n");
262 goto fail;
263 }
264
265 ret = drm_vblank_init(dev, 1);
266 if (ret < 0) {
267 dev_err(dev->dev, "failed to initialize vblank\n");
268 goto fail;
269 }
270
271 pm_runtime_get_sync(dev->dev);
Daniel Vetterbb0f1b52013-11-03 21:09:27 +0100272 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
Rob Clark16ea9752013-01-08 15:04:28 -0600273 pm_runtime_put_sync(dev->dev);
274 if (ret < 0) {
275 dev_err(dev->dev, "failed to install IRQ handler\n");
276 goto fail;
277 }
278
279 platform_set_drvdata(pdev, dev);
280
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500281
282 list_for_each_entry(mod, &module_list, list) {
283 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
284 bpp = mod->preferred_bpp;
285 if (bpp > 0)
286 break;
287 }
288
289 priv->fbdev = drm_fbdev_cma_init(dev, bpp,
Rob Clark16ea9752013-01-08 15:04:28 -0600290 dev->mode_config.num_crtc,
291 dev->mode_config.num_connector);
292
293 drm_kms_helper_poll_init(dev);
294
295 return 0;
296
297fail:
298 tilcdc_unload(dev);
299 return ret;
300}
301
302static void tilcdc_preclose(struct drm_device *dev, struct drm_file *file)
303{
304 struct tilcdc_drm_private *priv = dev->dev_private;
305
306 tilcdc_crtc_cancel_page_flip(priv->crtc, file);
307}
308
309static void tilcdc_lastclose(struct drm_device *dev)
310{
311 struct tilcdc_drm_private *priv = dev->dev_private;
312 drm_fbdev_cma_restore_mode(priv->fbdev);
313}
314
Daniel Vettere9f0d762013-12-11 11:34:42 +0100315static irqreturn_t tilcdc_irq(int irq, void *arg)
Rob Clark16ea9752013-01-08 15:04:28 -0600316{
317 struct drm_device *dev = arg;
318 struct tilcdc_drm_private *priv = dev->dev_private;
319 return tilcdc_crtc_irq(priv->crtc);
320}
321
322static void tilcdc_irq_preinstall(struct drm_device *dev)
323{
324 tilcdc_clear_irqstatus(dev, 0xffffffff);
325}
326
327static int tilcdc_irq_postinstall(struct drm_device *dev)
328{
329 struct tilcdc_drm_private *priv = dev->dev_private;
330
331 /* enable FIFO underflow irq: */
Sachin Kamata50b24f2013-03-02 15:53:07 +0530332 if (priv->rev == 1)
Rob Clark16ea9752013-01-08 15:04:28 -0600333 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
Sachin Kamata50b24f2013-03-02 15:53:07 +0530334 else
Rob Clark16ea9752013-01-08 15:04:28 -0600335 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
Rob Clark16ea9752013-01-08 15:04:28 -0600336
337 return 0;
338}
339
340static void tilcdc_irq_uninstall(struct drm_device *dev)
341{
342 struct tilcdc_drm_private *priv = dev->dev_private;
343
344 /* disable irqs that we might have enabled: */
345 if (priv->rev == 1) {
346 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
347 LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
348 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
349 } else {
350 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
351 LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
352 LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
353 LCDC_FRAME_DONE);
354 }
355
356}
357
358static void enable_vblank(struct drm_device *dev, bool enable)
359{
360 struct tilcdc_drm_private *priv = dev->dev_private;
361 u32 reg, mask;
362
363 if (priv->rev == 1) {
364 reg = LCDC_DMA_CTRL_REG;
365 mask = LCDC_V1_END_OF_FRAME_INT_ENA;
366 } else {
367 reg = LCDC_INT_ENABLE_SET_REG;
368 mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
369 LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
370 }
371
372 if (enable)
373 tilcdc_set(dev, reg, mask);
374 else
375 tilcdc_clear(dev, reg, mask);
376}
377
378static int tilcdc_enable_vblank(struct drm_device *dev, int crtc)
379{
380 enable_vblank(dev, true);
381 return 0;
382}
383
384static void tilcdc_disable_vblank(struct drm_device *dev, int crtc)
385{
386 enable_vblank(dev, false);
387}
388
389#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
390static const struct {
391 const char *name;
392 uint8_t rev;
393 uint8_t save;
394 uint32_t reg;
Sachin Kamat32501452013-03-02 15:53:08 +0530395} registers[] = {
Rob Clark16ea9752013-01-08 15:04:28 -0600396#define REG(rev, save, reg) { #reg, rev, save, reg }
397 /* exists in revision 1: */
398 REG(1, false, LCDC_PID_REG),
399 REG(1, true, LCDC_CTRL_REG),
400 REG(1, false, LCDC_STAT_REG),
401 REG(1, true, LCDC_RASTER_CTRL_REG),
402 REG(1, true, LCDC_RASTER_TIMING_0_REG),
403 REG(1, true, LCDC_RASTER_TIMING_1_REG),
404 REG(1, true, LCDC_RASTER_TIMING_2_REG),
405 REG(1, true, LCDC_DMA_CTRL_REG),
406 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
407 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
408 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
409 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
410 /* new in revision 2: */
411 REG(2, false, LCDC_RAW_STAT_REG),
412 REG(2, false, LCDC_MASKED_STAT_REG),
413 REG(2, false, LCDC_INT_ENABLE_SET_REG),
414 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
415 REG(2, false, LCDC_END_OF_INT_IND_REG),
416 REG(2, true, LCDC_CLK_ENABLE_REG),
417 REG(2, true, LCDC_INT_ENABLE_SET_REG),
418#undef REG
419};
420#endif
421
422#ifdef CONFIG_DEBUG_FS
423static int tilcdc_regs_show(struct seq_file *m, void *arg)
424{
425 struct drm_info_node *node = (struct drm_info_node *) m->private;
426 struct drm_device *dev = node->minor->dev;
427 struct tilcdc_drm_private *priv = dev->dev_private;
428 unsigned i;
429
430 pm_runtime_get_sync(dev->dev);
431
432 seq_printf(m, "revision: %d\n", priv->rev);
433
434 for (i = 0; i < ARRAY_SIZE(registers); i++)
435 if (priv->rev >= registers[i].rev)
436 seq_printf(m, "%s:\t %08x\n", registers[i].name,
437 tilcdc_read(dev, registers[i].reg));
438
439 pm_runtime_put_sync(dev->dev);
440
441 return 0;
442}
443
444static int tilcdc_mm_show(struct seq_file *m, void *arg)
445{
446 struct drm_info_node *node = (struct drm_info_node *) m->private;
447 struct drm_device *dev = node->minor->dev;
Daniel Vetterb04a5902013-12-11 14:24:46 +0100448 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
Rob Clark16ea9752013-01-08 15:04:28 -0600449}
450
451static struct drm_info_list tilcdc_debugfs_list[] = {
452 { "regs", tilcdc_regs_show, 0 },
453 { "mm", tilcdc_mm_show, 0 },
454 { "fb", drm_fb_cma_debugfs_show, 0 },
455};
456
457static int tilcdc_debugfs_init(struct drm_minor *minor)
458{
459 struct drm_device *dev = minor->dev;
460 struct tilcdc_module *mod;
461 int ret;
462
463 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
464 ARRAY_SIZE(tilcdc_debugfs_list),
465 minor->debugfs_root, minor);
466
467 list_for_each_entry(mod, &module_list, list)
468 if (mod->funcs->debugfs_init)
469 mod->funcs->debugfs_init(mod, minor);
470
471 if (ret) {
472 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
473 return ret;
474 }
475
476 return ret;
477}
478
479static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
480{
481 struct tilcdc_module *mod;
482 drm_debugfs_remove_files(tilcdc_debugfs_list,
483 ARRAY_SIZE(tilcdc_debugfs_list), minor);
484
485 list_for_each_entry(mod, &module_list, list)
486 if (mod->funcs->debugfs_cleanup)
487 mod->funcs->debugfs_cleanup(mod, minor);
488}
489#endif
490
491static const struct file_operations fops = {
492 .owner = THIS_MODULE,
493 .open = drm_open,
494 .release = drm_release,
495 .unlocked_ioctl = drm_ioctl,
496#ifdef CONFIG_COMPAT
497 .compat_ioctl = drm_compat_ioctl,
498#endif
499 .poll = drm_poll,
500 .read = drm_read,
Rob Clark16ea9752013-01-08 15:04:28 -0600501 .llseek = no_llseek,
502 .mmap = drm_gem_cma_mmap,
503};
504
505static struct drm_driver tilcdc_driver = {
506 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
507 .load = tilcdc_load,
508 .unload = tilcdc_unload,
509 .preclose = tilcdc_preclose,
510 .lastclose = tilcdc_lastclose,
511 .irq_handler = tilcdc_irq,
512 .irq_preinstall = tilcdc_irq_preinstall,
513 .irq_postinstall = tilcdc_irq_postinstall,
514 .irq_uninstall = tilcdc_irq_uninstall,
515 .get_vblank_counter = drm_vblank_count,
516 .enable_vblank = tilcdc_enable_vblank,
517 .disable_vblank = tilcdc_disable_vblank,
518 .gem_free_object = drm_gem_cma_free_object,
519 .gem_vm_ops = &drm_gem_cma_vm_ops,
520 .dumb_create = drm_gem_cma_dumb_create,
521 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200522 .dumb_destroy = drm_gem_dumb_destroy,
Rob Clark16ea9752013-01-08 15:04:28 -0600523#ifdef CONFIG_DEBUG_FS
524 .debugfs_init = tilcdc_debugfs_init,
525 .debugfs_cleanup = tilcdc_debugfs_cleanup,
526#endif
527 .fops = &fops,
528 .name = "tilcdc",
529 .desc = "TI LCD Controller DRM",
530 .date = "20121205",
531 .major = 1,
532 .minor = 0,
533};
534
535/*
536 * Power management:
537 */
538
539#ifdef CONFIG_PM_SLEEP
540static int tilcdc_pm_suspend(struct device *dev)
541{
542 struct drm_device *ddev = dev_get_drvdata(dev);
543 struct tilcdc_drm_private *priv = ddev->dev_private;
544 unsigned i, n = 0;
545
546 drm_kms_helper_poll_disable(ddev);
547
548 /* Save register state: */
549 for (i = 0; i < ARRAY_SIZE(registers); i++)
550 if (registers[i].save && (priv->rev >= registers[i].rev))
551 priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
552
553 return 0;
554}
555
556static int tilcdc_pm_resume(struct device *dev)
557{
558 struct drm_device *ddev = dev_get_drvdata(dev);
559 struct tilcdc_drm_private *priv = ddev->dev_private;
560 unsigned i, n = 0;
561
562 /* Restore register state: */
563 for (i = 0; i < ARRAY_SIZE(registers); i++)
564 if (registers[i].save && (priv->rev >= registers[i].rev))
565 tilcdc_write(ddev, registers[i].reg, priv->saved_register[n++]);
566
567 drm_kms_helper_poll_enable(ddev);
568
569 return 0;
570}
571#endif
572
573static const struct dev_pm_ops tilcdc_pm_ops = {
574 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
575};
576
577/*
578 * Platform driver:
579 */
580
581static int tilcdc_pdev_probe(struct platform_device *pdev)
582{
583 /* bail out early if no DT data: */
584 if (!pdev->dev.of_node) {
585 dev_err(&pdev->dev, "device-tree data is missing\n");
586 return -ENXIO;
587 }
588
Darren Etheridge39de6192013-06-21 13:52:27 -0500589 /* defer probing if slave is in deferred probing */
590 if (slave_probing == true)
591 return -EPROBE_DEFER;
592
Rob Clark16ea9752013-01-08 15:04:28 -0600593 return drm_platform_init(&tilcdc_driver, pdev);
594}
595
596static int tilcdc_pdev_remove(struct platform_device *pdev)
597{
Daniel Vetterc84b4352013-12-11 11:34:25 +0100598 drm_put_dev(platform_get_drvdata(pdev));
Rob Clark16ea9752013-01-08 15:04:28 -0600599
600 return 0;
601}
602
603static struct of_device_id tilcdc_of_match[] = {
604 { .compatible = "ti,am33xx-tilcdc", },
605 { },
606};
607MODULE_DEVICE_TABLE(of, tilcdc_of_match);
608
609static struct platform_driver tilcdc_platform_driver = {
610 .probe = tilcdc_pdev_probe,
611 .remove = tilcdc_pdev_remove,
612 .driver = {
613 .owner = THIS_MODULE,
614 .name = "tilcdc",
615 .pm = &tilcdc_pm_ops,
616 .of_match_table = tilcdc_of_match,
617 },
618};
619
620static int __init tilcdc_drm_init(void)
621{
622 DBG("init");
623 tilcdc_tfp410_init();
Rob Clark6e8de0bd2013-01-22 16:02:21 -0600624 tilcdc_slave_init();
Rob Clark0d4bbaf2012-12-18 17:34:16 -0600625 tilcdc_panel_init();
Rob Clark16ea9752013-01-08 15:04:28 -0600626 return platform_driver_register(&tilcdc_platform_driver);
627}
628
629static void __exit tilcdc_drm_fini(void)
630{
631 DBG("fini");
632 tilcdc_tfp410_fini();
Rob Clark6e8de0bd2013-01-22 16:02:21 -0600633 tilcdc_slave_fini();
Rob Clark0d4bbaf2012-12-18 17:34:16 -0600634 tilcdc_panel_fini();
Rob Clark16ea9752013-01-08 15:04:28 -0600635 platform_driver_unregister(&tilcdc_platform_driver);
636}
637
Rob Clark6e8de0bd2013-01-22 16:02:21 -0600638late_initcall(tilcdc_drm_init);
Rob Clark16ea9752013-01-08 15:04:28 -0600639module_exit(tilcdc_drm_fini);
640
641MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
642MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
643MODULE_LICENSE("GPL");