blob: 1f29a9314d114f4b4ea3470b5cd9e127c5f17985 [file] [log] [blame]
Rob Clark16ea9752013-01-08 15:04:28 -06001/*
2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/* LCDC DRM driver, based on da8xx-fb */
19
Jyri Sarha103cd8b2015-02-10 14:13:23 +020020#include <linux/component.h>
Dave Gerlach416a07f2014-07-29 06:27:58 +000021#include <linux/pinctrl/consumer.h>
22#include <linux/suspend.h>
Jyri Sarhaedc43302015-12-30 17:40:24 +020023#include <drm/drm_atomic.h>
24#include <drm/drm_atomic_helper.h>
Jyri Sarha103cd8b2015-02-10 14:13:23 +020025
Rob Clark16ea9752013-01-08 15:04:28 -060026#include "tilcdc_drv.h"
27#include "tilcdc_regs.h"
28#include "tilcdc_tfp410.h"
Rob Clark0d4bbaf2012-12-18 17:34:16 -060029#include "tilcdc_panel.h"
Jyri Sarha103cd8b2015-02-10 14:13:23 +020030#include "tilcdc_external.h"
Rob Clark16ea9752013-01-08 15:04:28 -060031
32#include "drm_fb_helper.h"
33
34static LIST_HEAD(module_list);
35
36void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
37 const struct tilcdc_module_ops *funcs)
38{
39 mod->name = name;
40 mod->funcs = funcs;
41 INIT_LIST_HEAD(&mod->list);
42 list_add(&mod->list, &module_list);
43}
44
45void tilcdc_module_cleanup(struct tilcdc_module *mod)
46{
47 list_del(&mod->list);
48}
49
50static struct of_device_id tilcdc_of_match[];
51
52static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
Ville Syrjälä1eb834512015-11-11 19:11:29 +020053 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
Rob Clark16ea9752013-01-08 15:04:28 -060054{
55 return drm_fb_cma_create(dev, file_priv, mode_cmd);
56}
57
58static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
59{
60 struct tilcdc_drm_private *priv = dev->dev_private;
Markus Elfringc08448172014-11-19 17:05:20 +010061 drm_fbdev_cma_hotplug_event(priv->fbdev);
Rob Clark16ea9752013-01-08 15:04:28 -060062}
63
Jyri Sarhaedc43302015-12-30 17:40:24 +020064int tilcdc_atomic_check(struct drm_device *dev,
65 struct drm_atomic_state *state)
66{
67 int ret;
68
69 ret = drm_atomic_helper_check_modeset(dev, state);
70 if (ret)
71 return ret;
72
73 ret = drm_atomic_helper_check_planes(dev, state);
74 if (ret)
75 return ret;
76
77 /*
78 * tilcdc ->atomic_check can update ->mode_changed if pixel format
79 * changes, hence will we check modeset changes again.
80 */
81 ret = drm_atomic_helper_check_modeset(dev, state);
82 if (ret)
83 return ret;
84
85 return ret;
86}
87
88static int tilcdc_commit(struct drm_device *dev,
89 struct drm_atomic_state *state,
90 bool async)
91{
92 int ret;
93
94 ret = drm_atomic_helper_prepare_planes(dev, state);
95 if (ret)
96 return ret;
97
98 drm_atomic_helper_swap_state(state, true);
99
100 /*
101 * Everything below can be run asynchronously without the need to grab
102 * any modeset locks at all under one condition: It must be guaranteed
103 * that the asynchronous work has either been cancelled (if the driver
104 * supports it, which at least requires that the framebuffers get
105 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
106 * before the new state gets committed on the software side with
107 * drm_atomic_helper_swap_state().
108 *
109 * This scheme allows new atomic state updates to be prepared and
110 * checked in parallel to the asynchronous completion of the previous
111 * update. Which is important since compositors need to figure out the
112 * composition of the next frame right after having submitted the
113 * current layout.
114 */
115
Jyri Sarha47bfd6c2016-06-22 16:27:54 +0300116 /* Keep HW on while we commit the state. */
117 pm_runtime_get_sync(dev->dev);
118
Jyri Sarhaedc43302015-12-30 17:40:24 +0200119 drm_atomic_helper_commit_modeset_disables(dev, state);
120
Liu Ying2b58e982016-08-29 17:12:03 +0800121 drm_atomic_helper_commit_planes(dev, state, 0);
Jyri Sarhaedc43302015-12-30 17:40:24 +0200122
123 drm_atomic_helper_commit_modeset_enables(dev, state);
124
Jyri Sarha47bfd6c2016-06-22 16:27:54 +0300125 /* Now HW should remain on if need becase the crtc is enabled */
126 pm_runtime_put_sync(dev->dev);
127
Jyri Sarhaedc43302015-12-30 17:40:24 +0200128 drm_atomic_helper_wait_for_vblanks(dev, state);
129
130 drm_atomic_helper_cleanup_planes(dev, state);
131
132 drm_atomic_state_free(state);
133
134 return 0;
135}
136
Rob Clark16ea9752013-01-08 15:04:28 -0600137static const struct drm_mode_config_funcs mode_config_funcs = {
138 .fb_create = tilcdc_fb_create,
139 .output_poll_changed = tilcdc_fb_output_poll_changed,
Jyri Sarhaedc43302015-12-30 17:40:24 +0200140 .atomic_check = tilcdc_atomic_check,
141 .atomic_commit = tilcdc_commit,
Rob Clark16ea9752013-01-08 15:04:28 -0600142};
143
144static int modeset_init(struct drm_device *dev)
145{
146 struct tilcdc_drm_private *priv = dev->dev_private;
147 struct tilcdc_module *mod;
148
149 drm_mode_config_init(dev);
150
151 priv->crtc = tilcdc_crtc_create(dev);
152
153 list_for_each_entry(mod, &module_list, list) {
154 DBG("loading module: %s", mod->name);
155 mod->funcs->modeset_init(mod, dev);
156 }
157
Rob Clark16ea9752013-01-08 15:04:28 -0600158 dev->mode_config.min_width = 0;
159 dev->mode_config.min_height = 0;
160 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
161 dev->mode_config.max_height = 2048;
162 dev->mode_config.funcs = &mode_config_funcs;
163
164 return 0;
165}
166
167#ifdef CONFIG_CPU_FREQ
168static int cpufreq_transition(struct notifier_block *nb,
169 unsigned long val, void *data)
170{
171 struct tilcdc_drm_private *priv = container_of(nb,
172 struct tilcdc_drm_private, freq_transition);
173 if (val == CPUFREQ_POSTCHANGE) {
174 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
175 priv->lcd_fck_rate = clk_get_rate(priv->clk);
176 tilcdc_crtc_update_clk(priv->crtc);
177 }
178 }
179
180 return 0;
181}
182#endif
183
184/*
185 * DRM operations:
186 */
187
188static int tilcdc_unload(struct drm_device *dev)
189{
190 struct tilcdc_drm_private *priv = dev->dev_private;
Rob Clark16ea9752013-01-08 15:04:28 -0600191
Jyri Sarha47bfd6c2016-06-22 16:27:54 +0300192 tilcdc_crtc_disable(priv->crtc);
Tomi Valkeinen1aea1e72015-10-19 14:15:26 +0300193
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200194 tilcdc_remove_external_encoders(dev);
195
Guido Martínez3a490122014-06-17 11:17:07 -0300196 drm_fbdev_cma_fini(priv->fbdev);
Rob Clark16ea9752013-01-08 15:04:28 -0600197 drm_kms_helper_poll_fini(dev);
198 drm_mode_config_cleanup(dev);
199 drm_vblank_cleanup(dev);
200
Rob Clark16ea9752013-01-08 15:04:28 -0600201 drm_irq_uninstall(dev);
Rob Clark16ea9752013-01-08 15:04:28 -0600202
203#ifdef CONFIG_CPU_FREQ
204 cpufreq_unregister_notifier(&priv->freq_transition,
205 CPUFREQ_TRANSITION_NOTIFIER);
206#endif
207
208 if (priv->clk)
209 clk_put(priv->clk);
210
211 if (priv->mmio)
212 iounmap(priv->mmio);
213
214 flush_workqueue(priv->wq);
215 destroy_workqueue(priv->wq);
216
217 dev->dev_private = NULL;
218
219 pm_runtime_disable(dev->dev);
220
Rob Clark16ea9752013-01-08 15:04:28 -0600221 return 0;
222}
223
224static int tilcdc_load(struct drm_device *dev, unsigned long flags)
225{
226 struct platform_device *pdev = dev->platformdev;
227 struct device_node *node = pdev->dev.of_node;
228 struct tilcdc_drm_private *priv;
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500229 struct tilcdc_module *mod;
Rob Clark16ea9752013-01-08 15:04:28 -0600230 struct resource *res;
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500231 u32 bpp = 0;
Rob Clark16ea9752013-01-08 15:04:28 -0600232 int ret;
233
Jyri Sarhad0ec32c2016-02-23 12:44:27 +0200234 priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
Jyri Sarha514d1a12016-06-16 11:28:23 +0300235 if (!priv) {
Rob Clark16ea9752013-01-08 15:04:28 -0600236 dev_err(dev->dev, "failed to allocate private data\n");
237 return -ENOMEM;
238 }
239
240 dev->dev_private = priv;
241
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200242 priv->is_componentized =
243 tilcdc_get_external_components(dev->dev, NULL) > 0;
244
Rob Clark16ea9752013-01-08 15:04:28 -0600245 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300246 if (!priv->wq) {
247 ret = -ENOMEM;
Jyri Sarhad0ec32c2016-02-23 12:44:27 +0200248 goto fail_unset_priv;
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300249 }
Rob Clark16ea9752013-01-08 15:04:28 -0600250
251 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
252 if (!res) {
253 dev_err(dev->dev, "failed to get memory resource\n");
254 ret = -EINVAL;
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300255 goto fail_free_wq;
Rob Clark16ea9752013-01-08 15:04:28 -0600256 }
257
258 priv->mmio = ioremap_nocache(res->start, resource_size(res));
259 if (!priv->mmio) {
260 dev_err(dev->dev, "failed to ioremap\n");
261 ret = -ENOMEM;
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300262 goto fail_free_wq;
Rob Clark16ea9752013-01-08 15:04:28 -0600263 }
264
265 priv->clk = clk_get(dev->dev, "fck");
266 if (IS_ERR(priv->clk)) {
267 dev_err(dev->dev, "failed to get functional clock\n");
268 ret = -ENODEV;
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300269 goto fail_iounmap;
Rob Clark16ea9752013-01-08 15:04:28 -0600270 }
271
Rob Clark16ea9752013-01-08 15:04:28 -0600272#ifdef CONFIG_CPU_FREQ
273 priv->lcd_fck_rate = clk_get_rate(priv->clk);
274 priv->freq_transition.notifier_call = cpufreq_transition;
275 ret = cpufreq_register_notifier(&priv->freq_transition,
276 CPUFREQ_TRANSITION_NOTIFIER);
277 if (ret) {
278 dev_err(dev->dev, "failed to register cpufreq notifier\n");
Darren Etheridge3d193062014-01-15 15:52:36 -0600279 goto fail_put_clk;
Rob Clark16ea9752013-01-08 15:04:28 -0600280 }
281#endif
282
283 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
Darren Etheridge4e564342013-06-21 13:52:23 -0500284 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
285
286 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
287
288 if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
289 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
290
291 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
292
293 if (of_property_read_u32(node, "ti,max-pixelclock",
294 &priv->max_pixelclock))
295 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
296
297 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
Rob Clark16ea9752013-01-08 15:04:28 -0600298
299 pm_runtime_enable(dev->dev);
300
301 /* Determine LCD IP Version */
302 pm_runtime_get_sync(dev->dev);
303 switch (tilcdc_read(dev, LCDC_PID_REG)) {
304 case 0x4c100102:
305 priv->rev = 1;
306 break;
307 case 0x4f200800:
308 case 0x4f201000:
309 priv->rev = 2;
310 break;
311 default:
312 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
313 "defaulting to LCD revision 1\n",
314 tilcdc_read(dev, LCDC_PID_REG));
315 priv->rev = 1;
316 break;
317 }
318
319 pm_runtime_put_sync(dev->dev);
320
321 ret = modeset_init(dev);
322 if (ret < 0) {
323 dev_err(dev->dev, "failed to initialize mode setting\n");
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300324 goto fail_cpufreq_unregister;
Rob Clark16ea9752013-01-08 15:04:28 -0600325 }
326
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200327 platform_set_drvdata(pdev, dev);
328
329 if (priv->is_componentized) {
330 ret = component_bind_all(dev->dev, dev);
331 if (ret < 0)
332 goto fail_mode_config_cleanup;
333
334 ret = tilcdc_add_external_encoders(dev, &bpp);
335 if (ret < 0)
336 goto fail_component_cleanup;
337 }
338
339 if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
340 dev_err(dev->dev, "no encoders/connectors found\n");
341 ret = -ENXIO;
342 goto fail_external_cleanup;
343 }
344
Rob Clark16ea9752013-01-08 15:04:28 -0600345 ret = drm_vblank_init(dev, 1);
346 if (ret < 0) {
347 dev_err(dev->dev, "failed to initialize vblank\n");
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200348 goto fail_external_cleanup;
Rob Clark16ea9752013-01-08 15:04:28 -0600349 }
350
Daniel Vetterbb0f1b52013-11-03 21:09:27 +0100351 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
Rob Clark16ea9752013-01-08 15:04:28 -0600352 if (ret < 0) {
353 dev_err(dev->dev, "failed to install IRQ handler\n");
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300354 goto fail_vblank_cleanup;
Rob Clark16ea9752013-01-08 15:04:28 -0600355 }
356
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500357 list_for_each_entry(mod, &module_list, list) {
358 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
359 bpp = mod->preferred_bpp;
360 if (bpp > 0)
361 break;
362 }
363
Jyri Sarha522a76f2015-12-29 17:27:32 +0200364 drm_mode_config_reset(dev);
365
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500366 priv->fbdev = drm_fbdev_cma_init(dev, bpp,
Rob Clark16ea9752013-01-08 15:04:28 -0600367 dev->mode_config.num_crtc,
368 dev->mode_config.num_connector);
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300369 if (IS_ERR(priv->fbdev)) {
370 ret = PTR_ERR(priv->fbdev);
371 goto fail_irq_uninstall;
372 }
Rob Clark16ea9752013-01-08 15:04:28 -0600373
374 drm_kms_helper_poll_init(dev);
375
376 return 0;
377
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300378fail_irq_uninstall:
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300379 drm_irq_uninstall(dev);
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300380
381fail_vblank_cleanup:
382 drm_vblank_cleanup(dev);
383
384fail_mode_config_cleanup:
385 drm_mode_config_cleanup(dev);
386
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200387fail_component_cleanup:
388 if (priv->is_componentized)
389 component_unbind_all(dev->dev, dev);
390
391fail_external_cleanup:
392 tilcdc_remove_external_encoders(dev);
393
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300394fail_cpufreq_unregister:
395 pm_runtime_disable(dev->dev);
396#ifdef CONFIG_CPU_FREQ
397 cpufreq_unregister_notifier(&priv->freq_transition,
398 CPUFREQ_TRANSITION_NOTIFIER);
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300399
400fail_put_clk:
Grygorii Strashko7974dff2015-02-25 18:19:43 +0200401#endif
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300402 clk_put(priv->clk);
403
404fail_iounmap:
405 iounmap(priv->mmio);
406
407fail_free_wq:
408 flush_workqueue(priv->wq);
409 destroy_workqueue(priv->wq);
410
Jyri Sarhad0ec32c2016-02-23 12:44:27 +0200411fail_unset_priv:
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300412 dev->dev_private = NULL;
Jyri Sarhad0ec32c2016-02-23 12:44:27 +0200413
Rob Clark16ea9752013-01-08 15:04:28 -0600414 return ret;
415}
416
Rob Clark16ea9752013-01-08 15:04:28 -0600417static void tilcdc_lastclose(struct drm_device *dev)
418{
419 struct tilcdc_drm_private *priv = dev->dev_private;
420 drm_fbdev_cma_restore_mode(priv->fbdev);
421}
422
Daniel Vettere9f0d762013-12-11 11:34:42 +0100423static irqreturn_t tilcdc_irq(int irq, void *arg)
Rob Clark16ea9752013-01-08 15:04:28 -0600424{
425 struct drm_device *dev = arg;
426 struct tilcdc_drm_private *priv = dev->dev_private;
427 return tilcdc_crtc_irq(priv->crtc);
428}
429
Thierry Reding88e72712015-09-24 18:35:31 +0200430static int tilcdc_enable_vblank(struct drm_device *dev, unsigned int pipe)
Rob Clark16ea9752013-01-08 15:04:28 -0600431{
Rob Clark16ea9752013-01-08 15:04:28 -0600432 return 0;
433}
434
Thierry Reding88e72712015-09-24 18:35:31 +0200435static void tilcdc_disable_vblank(struct drm_device *dev, unsigned int pipe)
Rob Clark16ea9752013-01-08 15:04:28 -0600436{
Tomi Valkeinen2b2080d2015-10-20 09:37:27 +0300437 return;
Rob Clark16ea9752013-01-08 15:04:28 -0600438}
439
Jyri Sarha514d1a12016-06-16 11:28:23 +0300440#if defined(CONFIG_DEBUG_FS)
Rob Clark16ea9752013-01-08 15:04:28 -0600441static const struct {
442 const char *name;
443 uint8_t rev;
444 uint8_t save;
445 uint32_t reg;
Sachin Kamat32501452013-03-02 15:53:08 +0530446} registers[] = {
Rob Clark16ea9752013-01-08 15:04:28 -0600447#define REG(rev, save, reg) { #reg, rev, save, reg }
448 /* exists in revision 1: */
449 REG(1, false, LCDC_PID_REG),
450 REG(1, true, LCDC_CTRL_REG),
451 REG(1, false, LCDC_STAT_REG),
452 REG(1, true, LCDC_RASTER_CTRL_REG),
453 REG(1, true, LCDC_RASTER_TIMING_0_REG),
454 REG(1, true, LCDC_RASTER_TIMING_1_REG),
455 REG(1, true, LCDC_RASTER_TIMING_2_REG),
456 REG(1, true, LCDC_DMA_CTRL_REG),
457 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
458 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
459 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
460 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
461 /* new in revision 2: */
462 REG(2, false, LCDC_RAW_STAT_REG),
463 REG(2, false, LCDC_MASKED_STAT_REG),
Jyri Sarhaf3a99942016-01-08 12:17:50 +0200464 REG(2, true, LCDC_INT_ENABLE_SET_REG),
Rob Clark16ea9752013-01-08 15:04:28 -0600465 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
466 REG(2, false, LCDC_END_OF_INT_IND_REG),
467 REG(2, true, LCDC_CLK_ENABLE_REG),
Rob Clark16ea9752013-01-08 15:04:28 -0600468#undef REG
469};
Jyri Sarha29ddd6e2015-07-02 16:26:12 +0300470
Rob Clark16ea9752013-01-08 15:04:28 -0600471#endif
472
473#ifdef CONFIG_DEBUG_FS
474static int tilcdc_regs_show(struct seq_file *m, void *arg)
475{
476 struct drm_info_node *node = (struct drm_info_node *) m->private;
477 struct drm_device *dev = node->minor->dev;
478 struct tilcdc_drm_private *priv = dev->dev_private;
479 unsigned i;
480
481 pm_runtime_get_sync(dev->dev);
482
483 seq_printf(m, "revision: %d\n", priv->rev);
484
485 for (i = 0; i < ARRAY_SIZE(registers); i++)
486 if (priv->rev >= registers[i].rev)
487 seq_printf(m, "%s:\t %08x\n", registers[i].name,
488 tilcdc_read(dev, registers[i].reg));
489
490 pm_runtime_put_sync(dev->dev);
491
492 return 0;
493}
494
495static int tilcdc_mm_show(struct seq_file *m, void *arg)
496{
497 struct drm_info_node *node = (struct drm_info_node *) m->private;
498 struct drm_device *dev = node->minor->dev;
Daniel Vetterb04a5902013-12-11 14:24:46 +0100499 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
Rob Clark16ea9752013-01-08 15:04:28 -0600500}
501
502static struct drm_info_list tilcdc_debugfs_list[] = {
503 { "regs", tilcdc_regs_show, 0 },
504 { "mm", tilcdc_mm_show, 0 },
505 { "fb", drm_fb_cma_debugfs_show, 0 },
506};
507
508static int tilcdc_debugfs_init(struct drm_minor *minor)
509{
510 struct drm_device *dev = minor->dev;
511 struct tilcdc_module *mod;
512 int ret;
513
514 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
515 ARRAY_SIZE(tilcdc_debugfs_list),
516 minor->debugfs_root, minor);
517
518 list_for_each_entry(mod, &module_list, list)
519 if (mod->funcs->debugfs_init)
520 mod->funcs->debugfs_init(mod, minor);
521
522 if (ret) {
523 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
524 return ret;
525 }
526
527 return ret;
528}
529
530static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
531{
532 struct tilcdc_module *mod;
533 drm_debugfs_remove_files(tilcdc_debugfs_list,
534 ARRAY_SIZE(tilcdc_debugfs_list), minor);
535
536 list_for_each_entry(mod, &module_list, list)
537 if (mod->funcs->debugfs_cleanup)
538 mod->funcs->debugfs_cleanup(mod, minor);
539}
540#endif
541
542static const struct file_operations fops = {
543 .owner = THIS_MODULE,
544 .open = drm_open,
545 .release = drm_release,
546 .unlocked_ioctl = drm_ioctl,
547#ifdef CONFIG_COMPAT
548 .compat_ioctl = drm_compat_ioctl,
549#endif
550 .poll = drm_poll,
551 .read = drm_read,
Rob Clark16ea9752013-01-08 15:04:28 -0600552 .llseek = no_llseek,
553 .mmap = drm_gem_cma_mmap,
554};
555
556static struct drm_driver tilcdc_driver = {
Jyri Sarha9c153902015-06-23 14:31:17 +0300557 .driver_features = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET |
Jyri Sarha305198d2016-04-07 15:05:16 +0300558 DRIVER_PRIME | DRIVER_ATOMIC),
Rob Clark16ea9752013-01-08 15:04:28 -0600559 .load = tilcdc_load,
560 .unload = tilcdc_unload,
Rob Clark16ea9752013-01-08 15:04:28 -0600561 .lastclose = tilcdc_lastclose,
562 .irq_handler = tilcdc_irq,
Ville Syrjäläb44f8402015-09-30 16:46:48 +0300563 .get_vblank_counter = drm_vblank_no_hw_counter,
Rob Clark16ea9752013-01-08 15:04:28 -0600564 .enable_vblank = tilcdc_enable_vblank,
565 .disable_vblank = tilcdc_disable_vblank,
Daniel Vetteraa0438c2016-05-30 19:53:05 +0200566 .gem_free_object_unlocked = drm_gem_cma_free_object,
Rob Clark16ea9752013-01-08 15:04:28 -0600567 .gem_vm_ops = &drm_gem_cma_vm_ops,
568 .dumb_create = drm_gem_cma_dumb_create,
569 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200570 .dumb_destroy = drm_gem_dumb_destroy,
Jyri Sarha9c153902015-06-23 14:31:17 +0300571
572 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
573 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
574 .gem_prime_import = drm_gem_prime_import,
575 .gem_prime_export = drm_gem_prime_export,
576 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
577 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
578 .gem_prime_vmap = drm_gem_cma_prime_vmap,
579 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
580 .gem_prime_mmap = drm_gem_cma_prime_mmap,
Rob Clark16ea9752013-01-08 15:04:28 -0600581#ifdef CONFIG_DEBUG_FS
582 .debugfs_init = tilcdc_debugfs_init,
583 .debugfs_cleanup = tilcdc_debugfs_cleanup,
584#endif
585 .fops = &fops,
586 .name = "tilcdc",
587 .desc = "TI LCD Controller DRM",
588 .date = "20121205",
589 .major = 1,
590 .minor = 0,
591};
592
593/*
594 * Power management:
595 */
596
597#ifdef CONFIG_PM_SLEEP
598static int tilcdc_pm_suspend(struct device *dev)
599{
600 struct drm_device *ddev = dev_get_drvdata(dev);
601 struct tilcdc_drm_private *priv = ddev->dev_private;
Rob Clark16ea9752013-01-08 15:04:28 -0600602
Jyri Sarha514d1a12016-06-16 11:28:23 +0300603 priv->saved_state = drm_atomic_helper_suspend(ddev);
Rob Clark16ea9752013-01-08 15:04:28 -0600604
Darren Etheridge85fd27f2014-09-19 01:42:57 +0000605 /* Select sleep pin state */
606 pinctrl_pm_select_sleep_state(dev);
607
Rob Clark16ea9752013-01-08 15:04:28 -0600608 return 0;
609}
610
611static int tilcdc_pm_resume(struct device *dev)
612{
613 struct drm_device *ddev = dev_get_drvdata(dev);
614 struct tilcdc_drm_private *priv = ddev->dev_private;
Jyri Sarha514d1a12016-06-16 11:28:23 +0300615 int ret = 0;
Rob Clark16ea9752013-01-08 15:04:28 -0600616
Dave Gerlach416a07f2014-07-29 06:27:58 +0000617 /* Select default pin state */
618 pinctrl_pm_select_default_state(dev);
619
Jyri Sarha514d1a12016-06-16 11:28:23 +0300620 if (priv->saved_state)
621 ret = drm_atomic_helper_resume(ddev, priv->saved_state);
Rob Clark16ea9752013-01-08 15:04:28 -0600622
Jyri Sarha514d1a12016-06-16 11:28:23 +0300623 return ret;
Rob Clark16ea9752013-01-08 15:04:28 -0600624}
625#endif
626
627static const struct dev_pm_ops tilcdc_pm_ops = {
628 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
629};
630
631/*
632 * Platform driver:
633 */
634
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200635static int tilcdc_bind(struct device *dev)
636{
637 return drm_platform_init(&tilcdc_driver, to_platform_device(dev));
638}
639
640static void tilcdc_unbind(struct device *dev)
641{
Jyri Sarha20a98ac2016-06-23 11:07:16 +0300642 struct drm_device *ddev = dev_get_drvdata(dev);
643
644 /* Check if a subcomponent has already triggered the unloading. */
645 if (!ddev->dev_private)
646 return;
647
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200648 drm_put_dev(dev_get_drvdata(dev));
649}
650
651static const struct component_master_ops tilcdc_comp_ops = {
652 .bind = tilcdc_bind,
653 .unbind = tilcdc_unbind,
654};
655
Rob Clark16ea9752013-01-08 15:04:28 -0600656static int tilcdc_pdev_probe(struct platform_device *pdev)
657{
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200658 struct component_match *match = NULL;
659 int ret;
660
Rob Clark16ea9752013-01-08 15:04:28 -0600661 /* bail out early if no DT data: */
662 if (!pdev->dev.of_node) {
663 dev_err(&pdev->dev, "device-tree data is missing\n");
664 return -ENXIO;
665 }
666
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200667 ret = tilcdc_get_external_components(&pdev->dev, &match);
668 if (ret < 0)
669 return ret;
670 else if (ret == 0)
671 return drm_platform_init(&tilcdc_driver, pdev);
672 else
673 return component_master_add_with_match(&pdev->dev,
674 &tilcdc_comp_ops,
675 match);
Rob Clark16ea9752013-01-08 15:04:28 -0600676}
677
678static int tilcdc_pdev_remove(struct platform_device *pdev)
679{
Jyri Sarha20a98ac2016-06-23 11:07:16 +0300680 int ret;
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200681
Jyri Sarha20a98ac2016-06-23 11:07:16 +0300682 ret = tilcdc_get_external_components(&pdev->dev, NULL);
683 if (ret < 0)
684 return ret;
685 else if (ret == 0)
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200686 drm_put_dev(platform_get_drvdata(pdev));
Jyri Sarha20a98ac2016-06-23 11:07:16 +0300687 else
688 component_master_del(&pdev->dev, &tilcdc_comp_ops);
Rob Clark16ea9752013-01-08 15:04:28 -0600689
690 return 0;
691}
692
693static struct of_device_id tilcdc_of_match[] = {
694 { .compatible = "ti,am33xx-tilcdc", },
695 { },
696};
697MODULE_DEVICE_TABLE(of, tilcdc_of_match);
698
699static struct platform_driver tilcdc_platform_driver = {
700 .probe = tilcdc_pdev_probe,
701 .remove = tilcdc_pdev_remove,
702 .driver = {
Rob Clark16ea9752013-01-08 15:04:28 -0600703 .name = "tilcdc",
704 .pm = &tilcdc_pm_ops,
705 .of_match_table = tilcdc_of_match,
706 },
707};
708
709static int __init tilcdc_drm_init(void)
710{
711 DBG("init");
712 tilcdc_tfp410_init();
Rob Clark0d4bbaf2012-12-18 17:34:16 -0600713 tilcdc_panel_init();
Rob Clark16ea9752013-01-08 15:04:28 -0600714 return platform_driver_register(&tilcdc_platform_driver);
715}
716
717static void __exit tilcdc_drm_fini(void)
718{
719 DBG("fini");
Rob Clark16ea9752013-01-08 15:04:28 -0600720 platform_driver_unregister(&tilcdc_platform_driver);
Guido Martínezeb565a22014-06-17 11:17:08 -0300721 tilcdc_panel_fini();
Guido Martínezeb565a22014-06-17 11:17:08 -0300722 tilcdc_tfp410_fini();
Rob Clark16ea9752013-01-08 15:04:28 -0600723}
724
Guido Martínez2023d842014-06-17 11:17:11 -0300725module_init(tilcdc_drm_init);
Rob Clark16ea9752013-01-08 15:04:28 -0600726module_exit(tilcdc_drm_fini);
727
728MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
729MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
730MODULE_LICENSE("GPL");