| A.s. Dong | a73900b | 2018-11-10 15:13:12 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2016 Freescale Semiconductor, Inc. |
| 4 | * Copyright 2017-2018 NXP |
| 5 | * Dong Aisheng <aisheng.dong@nxp.com> |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | |
| 10 | #include "imx7ulp.dtsi" |
| 11 | |
| 12 | / { |
| 13 | model = "NXP i.MX7ULP EVK"; |
| 14 | compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp"; |
| 15 | |
| 16 | chosen { |
| 17 | stdout-path = &lpuart4; |
| 18 | }; |
| 19 | |
| 20 | memory@60000000 { |
| 21 | device_type = "memory"; |
| 22 | reg = <0x60000000 0x40000000>; |
| 23 | }; |
| 24 | |
| 25 | reg_vsd_3v3: regulator-vsd-3v3 { |
| 26 | compatible = "regulator-fixed"; |
| 27 | regulator-name = "VSD_3V3"; |
| 28 | regulator-min-microvolt = <3300000>; |
| 29 | regulator-max-microvolt = <3300000>; |
| 30 | pinctrl-names = "default"; |
| 31 | pinctrl-0 = <&pinctrl_usdhc0_rst>; |
| 32 | gpio = <&gpio_ptd 0 GPIO_ACTIVE_HIGH>; |
| 33 | enable-active-high; |
| 34 | }; |
| 35 | }; |
| 36 | |
| 37 | &lpuart4 { |
| 38 | pinctrl-names = "default"; |
| 39 | pinctrl-0 = <&pinctrl_lpuart4>; |
| 40 | status = "okay"; |
| 41 | }; |
| 42 | |
| 43 | &usdhc0 { |
| 44 | pinctrl-names = "default"; |
| 45 | pinctrl-0 = <&pinctrl_usdhc0>; |
| 46 | cd-gpios = <&gpio_ptc 10 GPIO_ACTIVE_LOW>; |
| 47 | vmmc-supply = <®_vsd_3v3>; |
| 48 | status = "okay"; |
| 49 | }; |
| 50 | |
| 51 | &iomuxc1 { |
| 52 | pinctrl_lpuart4: lpuart4grp { |
| 53 | fsl,pins = < |
| 54 | IMX7ULP_PAD_PTC3__LPUART4_RX 0x3 |
| 55 | IMX7ULP_PAD_PTC2__LPUART4_TX 0x3 |
| 56 | >; |
| 57 | bias-pull-up; |
| 58 | }; |
| 59 | |
| 60 | pinctrl_usdhc0: usdhc0grp { |
| 61 | fsl,pins = < |
| 62 | IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43 |
| 63 | IMX7ULP_PAD_PTD2__SDHC0_CLK 0x40 |
| 64 | IMX7ULP_PAD_PTD7__SDHC0_D3 0x43 |
| 65 | IMX7ULP_PAD_PTD8__SDHC0_D2 0x43 |
| 66 | IMX7ULP_PAD_PTD9__SDHC0_D1 0x43 |
| 67 | IMX7ULP_PAD_PTD10__SDHC0_D0 0x43 |
| 68 | IMX7ULP_PAD_PTC10__PTC10 0x3 /* CD */ |
| 69 | >; |
| 70 | }; |
| 71 | |
| 72 | pinctrl_usdhc0_rst: usdhc0-gpio-rst-grp { |
| 73 | fsl,pins = < |
| 74 | IMX7ULP_PAD_PTD0__PTD0 0x3 |
| 75 | >; |
| 76 | }; |
| 77 | }; |