Thomas Gleixner | 1621633 | 2019-05-19 15:51:31 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Peter Horton | cdc3f10 | 2010-12-06 11:37:38 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) BitBox Ltd 2010 |
Peter Horton | cdc3f10 | 2010-12-06 11:37:38 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __PLAT_MXC_IRQ_COMMON_H__ |
| 7 | #define __PLAT_MXC_IRQ_COMMON_H__ |
| 8 | |
Shawn Guo | 1e66210 | 2012-09-16 22:16:44 +0800 | [diff] [blame] | 9 | /* all normal IRQs can be FIQs */ |
| 10 | #define FIQ_START 0 |
| 11 | |
Hui Wang | 3439a39 | 2011-09-22 17:40:08 +0800 | [diff] [blame] | 12 | struct mxc_extra_irq |
Peter Horton | cdc3f10 | 2010-12-06 11:37:38 +0000 | [diff] [blame] | 13 | { |
Peter Horton | cdc3f10 | 2010-12-06 11:37:38 +0000 | [diff] [blame] | 14 | int (*set_irq_fiq)(unsigned int irq, unsigned int type); |
| 15 | }; |
| 16 | |
| 17 | #endif |