blob: f6f102fa9e23a0f8b321d5a3bb72b601e8b0f22a [file] [log] [blame]
Thomas Gleixnerc942fdd2019-05-27 08:55:06 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Matthias Bruggerf682a212014-05-13 01:06:13 +02002/*
3 * Device Tree support for Mediatek SoCs
4 *
5 * Copyright (c) 2014 MundoReader S.L.
6 * Author: Matthias Brugger <matthias.bgg@gmail.com>
Matthias Bruggerf682a212014-05-13 01:06:13 +02007 */
8#include <linux/init.h>
Stephen Boyd62e59c42019-04-18 15:20:22 -07009#include <linux/io.h>
Matthias Bruggerf682a212014-05-13 01:06:13 +020010#include <asm/mach/arch.h>
Matthias Brugger9821e542015-10-02 23:19:37 +080011#include <linux/of.h>
12#include <linux/clk-provider.h>
13#include <linux/clocksource.h>
14
15
16#define GPT6_CON_MT65xx 0x10008060
17#define GPT_ENABLE 0x31
18
19static void __init mediatek_timer_init(void)
20{
21 void __iomem *gpt_base;
22
23 if (of_machine_is_compatible("mediatek,mt6589") ||
John Crispin601bac72016-04-07 20:18:35 +020024 of_machine_is_compatible("mediatek,mt7623") ||
Matthias Brugger9821e542015-10-02 23:19:37 +080025 of_machine_is_compatible("mediatek,mt8135") ||
26 of_machine_is_compatible("mediatek,mt8127")) {
27 /* turn on GPT6 which ungates arch timer clocks */
28 gpt_base = ioremap(GPT6_CON_MT65xx, 0x04);
29
30 /* enable clock and set to free-run */
31 writel(GPT_ENABLE, gpt_base);
32 iounmap(gpt_base);
33 }
34
35 of_clk_init(NULL);
Daniel Lezcanoba5d08c2017-05-26 17:40:46 +020036 timer_probe();
Matthias Brugger9821e542015-10-02 23:19:37 +080037};
Matthias Bruggerf682a212014-05-13 01:06:13 +020038
39static const char * const mediatek_board_dt_compat[] = {
Erin Lo74d25722015-10-20 14:34:31 +080040 "mediatek,mt2701",
Matthias Bruggerf682a212014-05-13 01:06:13 +020041 "mediatek,mt6589",
Howard Chen45421722014-11-14 13:14:52 +080042 "mediatek,mt6592",
John Crispin31ac0d692016-01-05 17:24:27 +010043 "mediatek,mt7623",
Ryder Leea43379d2019-01-29 12:31:18 +080044 "mediatek,mt7629",
Joe.C1ccd6532014-11-11 15:53:41 +080045 "mediatek,mt8127",
Joe.C0c3fb202014-11-11 15:53:43 +080046 "mediatek,mt8135",
Matthias Bruggerf682a212014-05-13 01:06:13 +020047 NULL,
48};
49
50DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
51 .dt_compat = mediatek_board_dt_compat,
Matthias Brugger9821e542015-10-02 23:19:37 +080052 .init_time = mediatek_timer_init,
Matthias Bruggerf682a212014-05-13 01:06:13 +020053MACHINE_END