blob: 933119262943c7066eae87d6cc7d102f3dffade1 [file] [log] [blame]
Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Paul Burtoneed0eab2016-10-05 18:18:20 +01002/*
3 * Copyright (C) 2016 Imagination Technologies
Paul Burtonfb615d62017-10-25 17:04:33 -07004 * Author: Paul Burton <paul.burton@mips.com>
Paul Burtoneed0eab2016-10-05 18:18:20 +01005 */
6
7#include <linux/clk.h>
8#include <linux/clk-provider.h>
9#include <linux/clocksource.h>
10#include <linux/init.h>
Paul Burtoneed0eab2016-10-05 18:18:20 +010011#include <linux/types.h>
12
13#include <asm/irq.h>
Paul Burton72eb2992017-08-12 21:36:34 -070014#include <asm/mips-cps.h>
Paul Burton2904cdb2017-08-23 11:17:45 -070015#include <asm/time.h>
Paul Burtoneed0eab2016-10-05 18:18:20 +010016
17int get_c0_fdc_int(void)
18{
19 int mips_cpu_fdc_irq;
20
Matt Redfearn7bf8b162018-01-05 10:31:07 +000021 if (mips_gic_present())
Paul Burtoneed0eab2016-10-05 18:18:20 +010022 mips_cpu_fdc_irq = gic_get_c0_fdc_int();
Matt Redfearn7bf8b162018-01-05 10:31:07 +000023 else if (cpu_has_veic)
24 panic("Unimplemented!");
Paul Burtoneed0eab2016-10-05 18:18:20 +010025 else if (cp0_fdc_irq >= 0)
26 mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq;
27 else
28 mips_cpu_fdc_irq = -1;
29
30 return mips_cpu_fdc_irq;
31}
32
33int get_c0_perfcount_int(void)
34{
35 int mips_cpu_perf_irq;
36
Matt Redfearn7bf8b162018-01-05 10:31:07 +000037 if (mips_gic_present())
Paul Burtoneed0eab2016-10-05 18:18:20 +010038 mips_cpu_perf_irq = gic_get_c0_perfcount_int();
Matt Redfearn7bf8b162018-01-05 10:31:07 +000039 else if (cpu_has_veic)
40 panic("Unimplemented!");
Paul Burtoneed0eab2016-10-05 18:18:20 +010041 else if (cp0_perfcount_irq >= 0)
42 mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
43 else
44 mips_cpu_perf_irq = -1;
45
46 return mips_cpu_perf_irq;
47}
48
49unsigned int get_c0_compare_int(void)
50{
51 int mips_cpu_timer_irq;
52
Matt Redfearn7bf8b162018-01-05 10:31:07 +000053 if (mips_gic_present())
Paul Burtoneed0eab2016-10-05 18:18:20 +010054 mips_cpu_timer_irq = gic_get_c0_compare_int();
Matt Redfearn7bf8b162018-01-05 10:31:07 +000055 else if (cpu_has_veic)
56 panic("Unimplemented!");
Paul Burtoneed0eab2016-10-05 18:18:20 +010057 else
58 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
59
60 return mips_cpu_timer_irq;
61}