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Thomas Gleixnerc942fdd2019-05-27 08:55:06 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Boris Brezillonc51d0ac2016-06-08 10:22:19 +02002/*
3 * Copyright (C) 2017 Free Electrons
4 * Copyright (C) 2017 NextThing Co
5 *
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Boris Brezillonc51d0ac2016-06-08 10:22:19 +02007 */
8
Boris Brezillon348d56a2018-09-07 00:38:48 +02009#include "internals.h"
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020010
11static void samsung_nand_decode_id(struct nand_chip *chip)
12{
13 struct mtd_info *mtd = nand_to_mtd(chip);
Boris Brezillon629a4422018-10-25 17:10:37 +020014 struct nand_memory_organization *memorg;
15
16 memorg = nanddev_get_memorg(&chip->base);
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020017
18 /* New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44) */
19 if (chip->id.len == 6 && !nand_is_slc(chip) &&
20 chip->id.data[5] != 0x00) {
21 u8 extid = chip->id.data[3];
22
23 /* Get pagesize */
Boris Brezillon629a4422018-10-25 17:10:37 +020024 memorg->pagesize = 2048 << (extid & 0x03);
25 mtd->writesize = memorg->pagesize;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020026
27 extid >>= 2;
28
29 /* Get oobsize */
30 switch (((extid >> 2) & 0x4) | (extid & 0x3)) {
31 case 1:
Boris Brezillon629a4422018-10-25 17:10:37 +020032 memorg->oobsize = 128;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020033 break;
34 case 2:
Boris Brezillon629a4422018-10-25 17:10:37 +020035 memorg->oobsize = 218;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020036 break;
37 case 3:
Boris Brezillon629a4422018-10-25 17:10:37 +020038 memorg->oobsize = 400;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020039 break;
40 case 4:
Boris Brezillon629a4422018-10-25 17:10:37 +020041 memorg->oobsize = 436;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020042 break;
43 case 5:
Boris Brezillon629a4422018-10-25 17:10:37 +020044 memorg->oobsize = 512;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020045 break;
46 case 6:
Boris Brezillon629a4422018-10-25 17:10:37 +020047 memorg->oobsize = 640;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020048 break;
49 default:
50 /*
51 * We should never reach this case, but if that
52 * happens, this probably means Samsung decided to use
53 * a different extended ID format, and we should find
54 * a way to support it.
55 */
56 WARN(1, "Invalid OOB size value");
57 break;
58 }
59
Boris Brezillon629a4422018-10-25 17:10:37 +020060 mtd->oobsize = memorg->oobsize;
61
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020062 /* Get blocksize */
63 extid >>= 2;
Boris Brezillon629a4422018-10-25 17:10:37 +020064 memorg->pages_per_eraseblock = (128 * 1024) <<
65 (((extid >> 1) & 0x04) |
66 (extid & 0x03)) /
67 memorg->pagesize;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020068 mtd->erasesize = (128 * 1024) <<
69 (((extid >> 1) & 0x04) | (extid & 0x03));
Hans de Goede8fc82d42016-06-08 10:45:28 +020070
71 /* Extract ECC requirements from 5th id byte*/
72 extid = (chip->id.data[4] >> 4) & 0x07;
73 if (extid < 5) {
Boris Brezillon6a1b66d2018-11-04 16:09:42 +010074 chip->base.eccreq.step_size = 512;
75 chip->base.eccreq.strength = 1 << extid;
Hans de Goede8fc82d42016-06-08 10:45:28 +020076 } else {
Boris Brezillon6a1b66d2018-11-04 16:09:42 +010077 chip->base.eccreq.step_size = 1024;
Hans de Goede8fc82d42016-06-08 10:45:28 +020078 switch (extid) {
79 case 5:
Boris Brezillon6a1b66d2018-11-04 16:09:42 +010080 chip->base.eccreq.strength = 24;
Hans de Goede8fc82d42016-06-08 10:45:28 +020081 break;
82 case 6:
Boris Brezillon6a1b66d2018-11-04 16:09:42 +010083 chip->base.eccreq.strength = 40;
Hans de Goede8fc82d42016-06-08 10:45:28 +020084 break;
85 case 7:
Boris Brezillon6a1b66d2018-11-04 16:09:42 +010086 chip->base.eccreq.strength = 60;
Hans de Goede8fc82d42016-06-08 10:45:28 +020087 break;
Brian Norrisd2419792017-05-01 17:04:55 -070088 default:
89 WARN(1, "Could not decode ECC info");
Boris Brezillon6a1b66d2018-11-04 16:09:42 +010090 chip->base.eccreq.step_size = 0;
Hans de Goede8fc82d42016-06-08 10:45:28 +020091 }
92 }
Boris Brezillonc51d0ac2016-06-08 10:22:19 +020093 } else {
94 nand_decode_ext_id(chip);
Miquel Raynal707d8152017-12-07 10:33:58 +010095
Ladislav Michl09ec4172018-01-09 14:19:11 +010096 if (nand_is_slc(chip)) {
97 switch (chip->id.data[1]) {
98 /* K9F4G08U0D-S[I|C]B0(T00) */
99 case 0xDC:
Boris Brezillon6a1b66d2018-11-04 16:09:42 +0100100 chip->base.eccreq.step_size = 512;
101 chip->base.eccreq.strength = 1;
Ladislav Michl09ec4172018-01-09 14:19:11 +0100102 break;
103
104 /* K9F1G08U0E 21nm chips do not support subpage write */
105 case 0xF1:
106 if (chip->id.len > 4 &&
107 (chip->id.data[4] & GENMASK(1, 0)) == 0x1)
108 chip->options |= NAND_NO_SUBPAGE_WRITE;
109 break;
110 default:
111 break;
112 }
Miquel Raynal707d8152017-12-07 10:33:58 +0100113 }
Boris Brezillonc51d0ac2016-06-08 10:22:19 +0200114 }
115}
116
117static int samsung_nand_init(struct nand_chip *chip)
118{
119 struct mtd_info *mtd = nand_to_mtd(chip);
120
121 if (mtd->writesize > 512)
122 chip->options |= NAND_SAMSUNG_LP_OPTIONS;
123
124 if (!nand_is_slc(chip))
Frieder Schrempf04649ec2019-04-17 12:36:34 +0000125 chip->options |= NAND_BBM_LASTPAGE;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +0200126 else
Frieder Schrempfbb592542019-04-17 12:36:36 +0000127 chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE;
Boris Brezillonc51d0ac2016-06-08 10:22:19 +0200128
129 return 0;
130}
131
132const struct nand_manufacturer_ops samsung_nand_manuf_ops = {
133 .detect = samsung_nand_decode_id,
134 .init = samsung_nand_init,
135};