blob: 08d85e336bd43f51c1d4624acd673c981d58f848 [file] [log] [blame]
Jeff Kirsherae06c702018-03-22 10:08:48 -07001/* SPDX-License-Identifier: GPL-2.0 */
Jeff Kirsher51dce242018-04-26 08:08:09 -07002/* Copyright(c) 1999 - 2018 Intel Corporation. */
Auke Kok9a799d72007-09-15 14:07:45 -07003
4#ifndef _IXGBE_H_
5#define _IXGBE_H_
6
Jesse Grossf62bbb52010-10-20 13:56:10 +00007#include <linux/bitops.h>
Auke Kok9a799d72007-09-15 14:07:45 -07008#include <linux/types.h>
9#include <linux/pci.h>
10#include <linux/netdevice.h>
Peter Waskiewiczb25ebfd2010-10-05 01:27:49 +000011#include <linux/cpumask.h>
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -080012#include <linux/aer.h>
Jesse Grossf62bbb52010-10-20 13:56:10 +000013#include <linux/if_vlan.h>
Jacob Keller6cb562d2012-12-05 07:24:41 +000014#include <linux/jiffies.h>
Steve Douthit8fa10ef2018-12-06 15:50:39 +000015#include <linux/phy.h>
Auke Kok9a799d72007-09-15 14:07:45 -070016
Richard Cochran74d23cc2014-12-21 19:46:56 +010017#include <linux/timecounter.h>
Jacob Keller3a6a4ed2012-05-01 05:24:58 +000018#include <linux/net_tstamp.h>
19#include <linux/ptp_clock_kernel.h>
Jacob Keller3a6a4ed2012-05-01 05:24:58 +000020
Auke Kok9a799d72007-09-15 14:07:45 -070021#include "ixgbe_type.h"
22#include "ixgbe_common.h"
Alexander Duyck2f90b862008-11-20 20:52:10 -080023#include "ixgbe_dcb.h"
Javier Martinez Canillasee58c112016-09-12 10:03:39 -040024#if IS_ENABLED(CONFIG_FCOE)
Yi Zoueacd73f2009-05-13 13:11:06 +000025#define IXGBE_FCOE
26#include "ixgbe_fcoe.h"
Javier Martinez Canillasee58c112016-09-12 10:03:39 -040027#endif /* IS_ENABLED(CONFIG_FCOE) */
Jeff Garzik5dd2d332008-10-16 05:09:31 -040028#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -080029#include <linux/dca.h>
30#endif
Shannon Nelson8bbbc5e2017-12-19 15:59:54 -080031#include "ixgbe_ipsec.h"
Auke Kok9a799d72007-09-15 14:07:45 -070032
Jesper Dangaard Brouer99ffc5a2018-01-03 11:25:29 +010033#include <net/xdp.h>
Eliezer Tamir5a85e732013-06-10 11:40:20 +030034
Emil Tantilov849c4542010-06-03 16:53:41 +000035/* common prefix used by pr_<> macros */
36#undef pr_fmt
37#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
Auke Kok9a799d72007-09-15 14:07:45 -070038
39/* TX/RX descriptor defines */
Jesse Brandeburg6bacb302009-12-03 11:33:07 +000040#define IXGBE_DEFAULT_TXD 512
Alexander Duyck59224552011-08-31 00:01:06 +000041#define IXGBE_DEFAULT_TX_WORK 256
Auke Kok9a799d72007-09-15 14:07:45 -070042#define IXGBE_MAX_TXD 4096
43#define IXGBE_MIN_TXD 64
44
Anton Blanchardfb445192013-10-22 18:34:01 +000045#if (PAGE_SIZE < 8192)
Jesse Brandeburg6bacb302009-12-03 11:33:07 +000046#define IXGBE_DEFAULT_RXD 512
Anton Blanchardfb445192013-10-22 18:34:01 +000047#else
48#define IXGBE_DEFAULT_RXD 128
49#endif
Auke Kok9a799d72007-09-15 14:07:45 -070050#define IXGBE_MAX_RXD 4096
51#define IXGBE_MIN_RXD 64
52
Don Skidmore5b7f0002015-01-28 07:03:38 +000053#define IXGBE_ETH_P_LLDP 0x88CC
54
Auke Kok9a799d72007-09-15 14:07:45 -070055/* flow control */
Jesse Brandeburg2b9ade92008-08-26 04:27:10 -070056#define IXGBE_MIN_FCRTL 0x40
Auke Kok9a799d72007-09-15 14:07:45 -070057#define IXGBE_MAX_FCRTL 0x7FF80
Jesse Brandeburg2b9ade92008-08-26 04:27:10 -070058#define IXGBE_MIN_FCRTH 0x600
Auke Kok9a799d72007-09-15 14:07:45 -070059#define IXGBE_MAX_FCRTH 0x7FFF0
Jesse Brandeburg2b9ade92008-08-26 04:27:10 -070060#define IXGBE_DEFAULT_FCPAUSE 0xFFFF
Auke Kok9a799d72007-09-15 14:07:45 -070061#define IXGBE_MIN_FCPAUSE 0
62#define IXGBE_MAX_FCPAUSE 0xFFFF
63
64/* Supported Rx Buffer Sizes */
Alexander Duyck252562c2012-05-24 01:59:27 +000065#define IXGBE_RXBUFFER_256 256 /* Used for skb receive header */
Alexander Duyck541ea692017-03-02 15:01:05 -080066#define IXGBE_RXBUFFER_1536 1536
Alexander Duyck09816fb2012-07-20 08:08:23 +000067#define IXGBE_RXBUFFER_2K 2048
68#define IXGBE_RXBUFFER_3K 3072
69#define IXGBE_RXBUFFER_4K 4096
Alexander Duyck919e78a2011-08-26 09:52:38 +000070#define IXGBE_MAX_RXBUFFER 16384 /* largest size for a single descriptor */
Auke Kok9a799d72007-09-15 14:07:45 -070071
Alexander Duyck541ea692017-03-02 15:01:05 -080072/* Attempt to maximize the headroom available for incoming frames. We
73 * use a 2K buffer for receives and need 1536/1534 to store the data for
74 * the frame. This leaves us with 512 bytes of room. From that we need
75 * to deduct the space needed for the shared info and the padding needed
76 * to IP align the frame.
77 *
78 * Note: For cache line sizes 256 or larger this value is going to end
79 * up negative. In these cases we should fall back to the 3K
80 * buffers.
81 */
Alexander Duyck2de6aa32017-01-17 08:36:54 -080082#if (PAGE_SIZE < 8192)
Alexander Duyck541ea692017-03-02 15:01:05 -080083#define IXGBE_MAX_2K_FRAME_BUILD_SKB (IXGBE_RXBUFFER_1536 - NET_IP_ALIGN)
84#define IXGBE_2K_TOO_SMALL_WITH_PADDING \
85((NET_SKB_PAD + IXGBE_RXBUFFER_1536) > SKB_WITH_OVERHEAD(IXGBE_RXBUFFER_2K))
86
87static inline int ixgbe_compute_pad(int rx_buf_len)
88{
89 int page_size, pad_size;
90
91 page_size = ALIGN(rx_buf_len, PAGE_SIZE / 2);
92 pad_size = SKB_WITH_OVERHEAD(page_size) - rx_buf_len;
93
94 return pad_size;
95}
96
97static inline int ixgbe_skb_pad(void)
98{
99 int rx_buf_len;
100
101 /* If a 2K buffer cannot handle a standard Ethernet frame then
102 * optimize padding for a 3K buffer instead of a 1.5K buffer.
103 *
104 * For a 3K buffer we need to add enough padding to allow for
105 * tailroom due to NET_IP_ALIGN possibly shifting us out of
106 * cache-line alignment.
107 */
108 if (IXGBE_2K_TOO_SMALL_WITH_PADDING)
109 rx_buf_len = IXGBE_RXBUFFER_3K + SKB_DATA_ALIGN(NET_IP_ALIGN);
110 else
111 rx_buf_len = IXGBE_RXBUFFER_1536;
112
113 /* if needed make room for NET_IP_ALIGN */
114 rx_buf_len -= NET_IP_ALIGN;
115
116 return ixgbe_compute_pad(rx_buf_len);
117}
118
119#define IXGBE_SKB_PAD ixgbe_skb_pad()
Alexander Duyck2de6aa32017-01-17 08:36:54 -0800120#else
Alexander Duyck541ea692017-03-02 15:01:05 -0800121#define IXGBE_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN)
Alexander Duyck2de6aa32017-01-17 08:36:54 -0800122#endif
123
Alexander Duyck13958072010-08-19 13:37:21 +0000124/*
Alexander Duyck252562c2012-05-24 01:59:27 +0000125 * NOTE: netdev_alloc_skb reserves up to 64 bytes, NET_IP_ALIGN means we
126 * reserve 64 more, and skb_shared_info adds an additional 320 bytes more,
127 * this adds up to 448 bytes of extra data.
128 *
129 * Since netdev_alloc_skb now allocates a page fragment we can use a value
130 * of 256 and the resultant skb will have a truesize of 960 or less.
Alexander Duyck13958072010-08-19 13:37:21 +0000131 */
Alexander Duyck252562c2012-05-24 01:59:27 +0000132#define IXGBE_RX_HDR_SIZE IXGBE_RXBUFFER_256
Auke Kok9a799d72007-09-15 14:07:45 -0700133
Auke Kok9a799d72007-09-15 14:07:45 -0700134/* How many Rx Buffers do we bundle into one write to the hardware ? */
135#define IXGBE_RX_BUFFER_WRITE 16 /* Must be power of 2 */
136
Alexander Duyckf3213d92017-01-17 08:35:54 -0800137#define IXGBE_RX_DMA_ATTR \
138 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
139
Alexander Duyck472148c2012-11-07 02:34:28 +0000140enum ixgbe_tx_flags {
141 /* cmd_type flags */
142 IXGBE_TX_FLAGS_HW_VLAN = 0x01,
143 IXGBE_TX_FLAGS_TSO = 0x02,
144 IXGBE_TX_FLAGS_TSTAMP = 0x04,
145
146 /* olinfo flags */
147 IXGBE_TX_FLAGS_CC = 0x08,
148 IXGBE_TX_FLAGS_IPV4 = 0x10,
149 IXGBE_TX_FLAGS_CSUM = 0x20,
Shannon Nelson59259472017-12-19 16:00:00 -0800150 IXGBE_TX_FLAGS_IPSEC = 0x40,
Alexander Duyck472148c2012-11-07 02:34:28 +0000151
152 /* software defined flags */
Shannon Nelson59259472017-12-19 16:00:00 -0800153 IXGBE_TX_FLAGS_SW_VLAN = 0x80,
154 IXGBE_TX_FLAGS_FCOE = 0x100,
Alexander Duyck472148c2012-11-07 02:34:28 +0000155};
156
157/* VLAN info */
Auke Kok9a799d72007-09-15 14:07:45 -0700158#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
Alexander Duyck66f32a82011-06-29 05:43:22 +0000159#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0xe0000000
160#define IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT 29
Auke Kok9a799d72007-09-15 14:07:45 -0700161#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
162
Greg Rose7f870472010-01-09 02:25:29 +0000163#define IXGBE_MAX_VF_MC_ENTRIES 30
164#define IXGBE_MAX_VF_FUNCTIONS 64
165#define IXGBE_MAX_VFTA_ENTRIES 128
166#define MAX_EMULATION_MAC_ADDRS 16
Greg Rosea1cbb15c2011-05-13 01:33:48 +0000167#define IXGBE_MAX_PF_MACVLANS 15
Alexander Duyck1d9c0bf2012-05-05 05:32:21 +0000168#define VMDQ_P(p) ((p) + adapter->ring_feature[RING_F_VMDQ].offset)
Greg Rose83c61fa2011-09-07 05:59:35 +0000169#define IXGBE_82599_VF_DEVICE_ID 0x10ED
170#define IXGBE_X540_VF_DEVICE_ID 0x1515
Greg Rose7f870472010-01-09 02:25:29 +0000171
172struct vf_data_storage {
Mark Rustad988d1302015-10-30 15:29:34 -0700173 struct pci_dev *vfdev;
Greg Rose7f870472010-01-09 02:25:29 +0000174 unsigned char vf_mac_addresses[ETH_ALEN];
175 u16 vf_mc_hashes[IXGBE_MAX_VF_MC_ENTRIES];
176 u16 num_vf_mc_hashes;
Greg Rose7f870472010-01-09 02:25:29 +0000177 bool clear_to_send;
Greg Rose7f016482010-05-04 22:12:06 +0000178 bool pf_set_mac;
Greg Rose7f016482010-05-04 22:12:06 +0000179 u16 pf_vlan; /* When set, guest VLAN config not allowed. */
180 u16 pf_qos;
Lior Levyff4ab202011-03-11 02:03:07 +0000181 u16 tx_rate;
Greg Rosede4c7f62011-09-29 05:57:33 +0000182 u8 spoofchk_enabled;
Vlad Zolotarove65ce0d2015-03-30 21:35:24 +0300183 bool rss_query_enabled;
Hiroshi Shimamoto54011e42015-08-28 06:58:33 +0000184 u8 trusted;
Hiroshi Shimamoto8443c1a42015-08-28 06:59:03 +0000185 int xcast_mode;
Alexander Duyck374c65d2012-07-20 08:09:22 +0000186 unsigned int vf_api;
Greg Rose7f870472010-01-09 02:25:29 +0000187};
188
Hiroshi Shimamoto8443c1a42015-08-28 06:59:03 +0000189enum ixgbevf_xcast_modes {
190 IXGBEVF_XCAST_MODE_NONE = 0,
191 IXGBEVF_XCAST_MODE_MULTI,
192 IXGBEVF_XCAST_MODE_ALLMULTI,
Don Skidmore07eea572016-12-15 21:18:32 -0500193 IXGBEVF_XCAST_MODE_PROMISC,
Hiroshi Shimamoto8443c1a42015-08-28 06:59:03 +0000194};
195
Greg Rosea1cbb15c2011-05-13 01:33:48 +0000196struct vf_macvlans {
197 struct list_head l;
198 int vf;
Greg Rosea1cbb15c2011-05-13 01:33:48 +0000199 bool free;
200 bool is_macvlan;
201 u8 vf_macvlan[ETH_ALEN];
202};
203
Alexander Duycka535c302011-05-27 05:31:52 +0000204#define IXGBE_MAX_TXD_PWR 14
Jacob Kellerb4f47a42016-04-13 16:08:22 -0700205#define IXGBE_MAX_DATA_PER_TXD (1u << IXGBE_MAX_TXD_PWR)
Alexander Duycka535c302011-05-27 05:31:52 +0000206
207/* Tx Descriptors needed, worst case */
208#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
Alexander Duyck990a3152013-01-26 02:08:14 +0000209#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
Alexander Duycka535c302011-05-27 05:31:52 +0000210
Auke Kok9a799d72007-09-15 14:07:45 -0700211/* wrapper around a pointer to a socket buffer,
212 * so a DMA handle can be stored along with the buffer */
213struct ixgbe_tx_buffer {
Alexander Duyckd3d00232011-07-15 02:31:25 +0000214 union ixgbe_adv_tx_desc *next_to_watch;
Auke Kok9a799d72007-09-15 14:07:45 -0700215 unsigned long time_stamp;
John Fastabend33fdc822017-04-24 03:30:18 -0700216 union {
217 struct sk_buff *skb;
Jesper Dangaard Brouer03993092018-04-17 16:46:32 +0200218 struct xdp_frame *xdpf;
John Fastabend33fdc822017-04-24 03:30:18 -0700219 };
Alexander Duyckfd0db0e2012-02-08 07:50:56 +0000220 unsigned int bytecount;
221 unsigned short gso_segs;
Alexander Duyck244e27a2012-02-08 07:51:11 +0000222 __be16 protocol;
Alexander Duyck729739b2012-02-08 07:51:06 +0000223 DEFINE_DMA_UNMAP_ADDR(dma);
224 DEFINE_DMA_UNMAP_LEN(len);
Alexander Duyckfd0db0e2012-02-08 07:50:56 +0000225 u32 tx_flags;
Auke Kok9a799d72007-09-15 14:07:45 -0700226};
227
228struct ixgbe_rx_buffer {
229 struct sk_buff *skb;
230 dma_addr_t dma;
Björn Töpeld0bcacd2018-10-02 10:00:32 +0200231 union {
232 struct {
233 struct page *page;
234 __u32 page_offset;
235 __u16 pagecnt_bias;
236 };
237 struct {
238 void *addr;
239 u64 handle;
240 };
241 };
Auke Kok9a799d72007-09-15 14:07:45 -0700242};
243
244struct ixgbe_queue_stats {
245 u64 packets;
246 u64 bytes;
247};
248
Alexander Duyck5b7da512010-11-16 19:26:50 -0800249struct ixgbe_tx_queue_stats {
250 u64 restart_queue;
251 u64 tx_busy;
John Fastabendc84d3242010-11-16 19:27:12 -0800252 u64 tx_done_old;
Alexander Duyck5b7da512010-11-16 19:26:50 -0800253};
254
255struct ixgbe_rx_queue_stats {
256 u64 rsc_count;
257 u64 rsc_flush;
258 u64 non_eop_descs;
Jesper Dangaard Brouer86e23492017-09-04 20:40:22 +0200259 u64 alloc_rx_page;
Alexander Duyck5b7da512010-11-16 19:26:50 -0800260 u64 alloc_rx_page_failed;
261 u64 alloc_rx_buff_failed;
Alexander Duyck8a0da212012-01-31 02:59:49 +0000262 u64 csum_err;
Alexander Duyck5b7da512010-11-16 19:26:50 -0800263};
264
Mark Rustada9763f32015-10-27 09:58:07 -0700265#define IXGBE_TS_HDR_LEN 8
266
Alexander Duyckf8003262012-03-03 02:35:52 +0000267enum ixgbe_ring_state_t {
Alexander Duyck4f4542b2017-01-17 08:36:14 -0800268 __IXGBE_RX_3K_BUFFER,
Alexander Duyck2de6aa32017-01-17 08:36:54 -0800269 __IXGBE_RX_BUILD_SKB_ENABLED,
Alexander Duyck4f4542b2017-01-17 08:36:14 -0800270 __IXGBE_RX_RSC_ENABLED,
271 __IXGBE_RX_CSUM_UDP_ZERO_ERR,
272 __IXGBE_RX_FCOE,
Alexander Duyck7d637bc2010-11-16 19:26:56 -0800273 __IXGBE_TX_FDIR_INIT_DONE,
Alexander Duyckfd786b72013-01-12 06:33:31 +0000274 __IXGBE_TX_XPS_INIT_DONE,
Alexander Duyck7d637bc2010-11-16 19:26:56 -0800275 __IXGBE_TX_DETECT_HANG,
John Fastabendc84d3242010-11-16 19:27:12 -0800276 __IXGBE_HANG_CHECK_ARMED,
John Fastabend33fdc822017-04-24 03:30:18 -0700277 __IXGBE_TX_XDP_RING,
Björn Töpel024aa582018-10-02 10:00:30 +0200278 __IXGBE_TX_DISABLED,
Alexander Duyck7d637bc2010-11-16 19:26:56 -0800279};
280
Alexander Duyck2de6aa32017-01-17 08:36:54 -0800281#define ring_uses_build_skb(ring) \
282 test_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &(ring)->state)
283
John Fastabend2a47fa42013-11-06 09:54:52 -0800284struct ixgbe_fwd_adapter {
285 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
286 struct net_device *netdev;
John Fastabend2a47fa42013-11-06 09:54:52 -0800287 unsigned int tx_base_queue;
288 unsigned int rx_base_queue;
289 int pool;
290};
291
Alexander Duyck7d637bc2010-11-16 19:26:56 -0800292#define check_for_tx_hang(ring) \
293 test_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state)
294#define set_check_for_tx_hang(ring) \
295 set_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state)
296#define clear_check_for_tx_hang(ring) \
297 clear_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state)
298#define ring_is_rsc_enabled(ring) \
299 test_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state)
300#define set_ring_rsc_enabled(ring) \
301 set_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state)
302#define clear_ring_rsc_enabled(ring) \
303 clear_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state)
John Fastabend33fdc822017-04-24 03:30:18 -0700304#define ring_is_xdp(ring) \
305 test_bit(__IXGBE_TX_XDP_RING, &(ring)->state)
306#define set_ring_xdp(ring) \
307 set_bit(__IXGBE_TX_XDP_RING, &(ring)->state)
308#define clear_ring_xdp(ring) \
309 clear_bit(__IXGBE_TX_XDP_RING, &(ring)->state)
Auke Kok9a799d72007-09-15 14:07:45 -0700310struct ixgbe_ring {
Alexander Duyckefe3d3c2011-07-15 03:05:21 +0000311 struct ixgbe_ring *next; /* pointer to next ring in q_vector */
Alexander Duyckd3ee4292012-02-08 07:51:16 +0000312 struct ixgbe_q_vector *q_vector; /* backpointer to host q_vector */
313 struct net_device *netdev; /* netdev ring belongs to */
John Fastabend92470802017-04-24 03:30:17 -0700314 struct bpf_prog *xdp_prog;
Alexander Duyckd3ee4292012-02-08 07:51:16 +0000315 struct device *dev; /* device for DMA mapping */
Auke Kok9a799d72007-09-15 14:07:45 -0700316 void *desc; /* descriptor ring memory */
Auke Kok9a799d72007-09-15 14:07:45 -0700317 union {
318 struct ixgbe_tx_buffer *tx_buffer_info;
319 struct ixgbe_rx_buffer *rx_buffer_info;
320 };
Alexander Duyck7d637bc2010-11-16 19:26:56 -0800321 unsigned long state;
Alexander Duyckbd198052011-06-11 01:45:08 +0000322 u8 __iomem *tail;
Alexander Duyckd3ee4292012-02-08 07:51:16 +0000323 dma_addr_t dma; /* phys. address of descriptor ring */
324 unsigned int size; /* length in bytes */
Alexander Duyckbd198052011-06-11 01:45:08 +0000325
Jesse Brandeburgae540af2009-06-04 16:02:04 +0000326 u16 count; /* amount of descriptors */
Jesse Brandeburgae540af2009-06-04 16:02:04 +0000327
328 u8 queue_index; /* needed for multiqueue queue management */
Alexander Duyck7d637bc2010-11-16 19:26:56 -0800329 u8 reg_idx; /* holds the special value that gets
Jesse Brandeburgae540af2009-06-04 16:02:04 +0000330 * the hardware register offset
331 * associated with this ring, which is
332 * different for DCB and RSS modes
333 */
Alexander Duyckd3ee4292012-02-08 07:51:16 +0000334 u16 next_to_use;
335 u16 next_to_clean;
336
Mark Rustada9763f32015-10-27 09:58:07 -0700337 unsigned long last_rx_timestamp;
338
Alexander Duyckf8003262012-03-03 02:35:52 +0000339 union {
Alexander Duyckd3ee4292012-02-08 07:51:16 +0000340 u16 next_to_alloc;
Alexander Duyckf8003262012-03-03 02:35:52 +0000341 struct {
342 u8 atr_sample_rate;
343 u8 atr_count;
344 };
Alexander Duyckf8003262012-03-03 02:35:52 +0000345 };
Alexander Duyckbd198052011-06-11 01:45:08 +0000346
John Fastabende5b64632011-03-08 03:44:52 +0000347 u8 dcb_tc;
Auke Kok9a799d72007-09-15 14:07:45 -0700348 struct ixgbe_queue_stats stats;
Eric Dumazetde1036b2010-10-20 23:00:04 +0000349 struct u64_stats_sync syncp;
Alexander Duyck5b7da512010-11-16 19:26:50 -0800350 union {
351 struct ixgbe_tx_queue_stats tx_stats;
352 struct ixgbe_rx_queue_stats rx_stats;
353 };
Jesper Dangaard Brouer99ffc5a2018-01-03 11:25:29 +0100354 struct xdp_rxq_info xdp_rxq;
Björn Töpeld0bcacd2018-10-02 10:00:32 +0200355 struct xdp_umem *xsk_umem;
356 struct zero_copy_allocator zca; /* ZC allocator anchor */
357 u16 ring_idx; /* {rx,tx,xdp}_ring back reference idx */
358 u16 rx_buf_len;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +0000359} ____cacheline_internodealigned_in_smp;
Auke Kok9a799d72007-09-15 14:07:45 -0700360
Shannon Nelsonc7e43582009-02-24 16:36:38 -0800361enum ixgbe_ring_f_enum {
362 RING_F_NONE = 0,
Greg Rose7f870472010-01-09 02:25:29 +0000363 RING_F_VMDQ, /* SR-IOV uses the same ring feature */
Shannon Nelsonc7e43582009-02-24 16:36:38 -0800364 RING_F_RSS,
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +0000365 RING_F_FDIR,
Yi Zou0331a832009-05-17 12:33:52 +0000366#ifdef IXGBE_FCOE
367 RING_F_FCOE,
368#endif /* IXGBE_FCOE */
Shannon Nelsonc7e43582009-02-24 16:36:38 -0800369
370 RING_F_ARRAY_SIZE /* must be last in enum set */
371};
372
Don Skidmore0f9b2322014-11-18 09:35:08 +0000373#define IXGBE_MAX_RSS_INDICES 16
Emil Tantilove9ee3232015-11-20 13:02:16 -0800374#define IXGBE_MAX_RSS_INDICES_X550 63
Don Skidmore0f9b2322014-11-18 09:35:08 +0000375#define IXGBE_MAX_VMDQ_INDICES 64
376#define IXGBE_MAX_FDIR_INDICES 63 /* based on q_vector limit */
377#define IXGBE_MAX_FCOE_INDICES 8
378#define MAX_RX_QUEUES (IXGBE_MAX_FDIR_INDICES + 1)
379#define MAX_TX_QUEUES (IXGBE_MAX_FDIR_INDICES + 1)
John Fastabend33fdc822017-04-24 03:30:18 -0700380#define MAX_XDP_QUEUES (IXGBE_MAX_FDIR_INDICES + 1)
Don Skidmore0f9b2322014-11-18 09:35:08 +0000381#define IXGBE_MAX_L2A_QUEUES 4
382#define IXGBE_BAD_L2A_QUEUE 3
Alexander Duyck4e039c12017-11-22 10:56:40 -0800383#define IXGBE_MAX_MACVLANS 63
John Fastabend2a47fa42013-11-06 09:54:52 -0800384
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -0800385struct ixgbe_ring_feature {
Alexander Duyckc0876632012-05-10 00:01:46 +0000386 u16 limit; /* upper limit on feature indices */
387 u16 indices; /* current value of indices */
Alexander Duycke4b317e2012-05-05 05:30:53 +0000388 u16 mask; /* Mask used for feature to ring mapping */
389 u16 offset; /* offset to start of feature */
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +0000390} ____cacheline_internodealigned_in_smp;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -0800391
Alexander Duyck73079ea2012-07-14 06:48:49 +0000392#define IXGBE_82599_VMDQ_8Q_MASK 0x78
393#define IXGBE_82599_VMDQ_4Q_MASK 0x7C
394#define IXGBE_82599_VMDQ_2Q_MASK 0x7E
395
Alexander Duyckf8003262012-03-03 02:35:52 +0000396/*
397 * FCoE requires that all Rx buffers be over 2200 bytes in length. Since
398 * this is twice the size of a half page we need to double the page order
399 * for FCoE enabled Rx queues.
400 */
Alexander Duyck09816fb2012-07-20 08:08:23 +0000401static inline unsigned int ixgbe_rx_bufsz(struct ixgbe_ring *ring)
402{
Alexander Duyck4f4542b2017-01-17 08:36:14 -0800403 if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
404 return IXGBE_RXBUFFER_3K;
Alexander Duyck2de6aa32017-01-17 08:36:54 -0800405#if (PAGE_SIZE < 8192)
406 if (ring_uses_build_skb(ring))
Alexander Duyck541ea692017-03-02 15:01:05 -0800407 return IXGBE_MAX_2K_FRAME_BUILD_SKB;
Alexander Duyck2de6aa32017-01-17 08:36:54 -0800408#endif
Alexander Duyck09816fb2012-07-20 08:08:23 +0000409 return IXGBE_RXBUFFER_2K;
410}
411
Alexander Duyckf8003262012-03-03 02:35:52 +0000412static inline unsigned int ixgbe_rx_pg_order(struct ixgbe_ring *ring)
413{
Alexander Duyck4f4542b2017-01-17 08:36:14 -0800414#if (PAGE_SIZE < 8192)
415 if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
416 return 1;
Alexander Duyckf8003262012-03-03 02:35:52 +0000417#endif
Alexander Duyck09816fb2012-07-20 08:08:23 +0000418 return 0;
419}
Alexander Duyckf8003262012-03-03 02:35:52 +0000420#define ixgbe_rx_pg_size(_ring) (PAGE_SIZE << ixgbe_rx_pg_order(_ring))
Alexander Duyckf8003262012-03-03 02:35:52 +0000421
Alexander Duyckb4ded832017-09-25 14:55:36 -0700422#define IXGBE_ITR_ADAPTIVE_MIN_INC 2
423#define IXGBE_ITR_ADAPTIVE_MIN_USECS 10
424#define IXGBE_ITR_ADAPTIVE_MAX_USECS 126
425#define IXGBE_ITR_ADAPTIVE_LATENCY 0x80
426#define IXGBE_ITR_ADAPTIVE_BULK 0x00
427
Alexander Duyck08c88332011-06-11 01:45:03 +0000428struct ixgbe_ring_container {
Alexander Duyckefe3d3c2011-07-15 03:05:21 +0000429 struct ixgbe_ring *ring; /* pointer to linked list of rings */
Alexander Duyckb4ded832017-09-25 14:55:36 -0700430 unsigned long next_update; /* jiffies value of last update */
Alexander Duyckbd198052011-06-11 01:45:08 +0000431 unsigned int total_bytes; /* total bytes processed this int */
432 unsigned int total_packets; /* total packets processed this int */
433 u16 work_limit; /* total work allowed per interrupt */
Alexander Duyck08c88332011-06-11 01:45:03 +0000434 u8 count; /* total number of rings in vector */
435 u8 itr; /* current ITR setting for ring */
436};
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -0800437
Alexander Duycka5579282012-02-08 07:50:04 +0000438/* iterator for handling rings in ring container */
439#define ixgbe_for_each_ring(pos, head) \
440 for (pos = (head).ring; pos != NULL; pos = pos->next)
441
Alexander Duyck2f90b862008-11-20 20:52:10 -0800442#define MAX_RX_PACKET_BUFFERS ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) \
Jacob Kellere7cf7452014-04-09 06:03:10 +0000443 ? 8 : 1)
Alexander Duyck2f90b862008-11-20 20:52:10 -0800444#define MAX_TX_PACKET_BUFFERS MAX_RX_PACKET_BUFFERS
445
Alexander Duyck49c7ffb2012-05-05 05:30:43 +0000446/* MAX_Q_VECTORS of these are allocated,
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -0800447 * but we only use one per queue-specific vector.
448 */
449struct ixgbe_q_vector {
450 struct ixgbe_adapter *adapter;
Alexander Duyck33cf09c2010-11-16 19:26:55 -0800451#ifdef CONFIG_IXGBE_DCA
452 int cpu; /* CPU for DCA */
453#endif
Emil Tantilovd5bf4f62011-08-31 00:01:16 +0000454 u16 v_idx; /* index of q_vector within array, also used for
455 * finding the bit in EICR and friends that
456 * represents the vector for this ring */
457 u16 itr; /* Interrupt throttle rate written to EITR */
Alexander Duyck08c88332011-06-11 01:45:03 +0000458 struct ixgbe_ring_container rx, tx;
Emil Tantilovd5bf4f62011-08-31 00:01:16 +0000459
460 struct napi_struct napi;
Alexander Duyckde88eee2012-02-08 07:49:59 +0000461 cpumask_t affinity_mask;
462 int numa_node;
463 struct rcu_head rcu; /* to avoid race with update stats on free */
Alexander Duyckd0759eb2010-11-16 19:27:09 -0800464 char name[IFNAMSIZ + 9];
Alexander Duyckde88eee2012-02-08 07:49:59 +0000465
466 /* for dynamic allocation of rings associated with this q_vector */
467 struct ixgbe_ring ring[0] ____cacheline_internodealigned_in_smp;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -0800468};
Alexander Duyckadc810902014-07-26 02:42:44 +0000469
Don Skidmore3ca8bc62012-04-12 00:33:31 +0000470#ifdef CONFIG_IXGBE_HWMON
471
472#define IXGBE_HWMON_TYPE_LOC 0
473#define IXGBE_HWMON_TYPE_TEMP 1
474#define IXGBE_HWMON_TYPE_CAUTION 2
475#define IXGBE_HWMON_TYPE_MAX 3
476
477struct hwmon_attr {
478 struct device_attribute dev_attr;
479 struct ixgbe_hw *hw;
480 struct ixgbe_thermal_diode_data *sensor;
481 char name[12];
482};
483
484struct hwmon_buff {
Guenter Roeck03b77d82013-11-26 07:15:28 +0000485 struct attribute_group group;
486 const struct attribute_group *groups[2];
487 struct attribute *attrs[IXGBE_MAX_SENSORS * 4 + 1];
488 struct hwmon_attr hwmon_list[IXGBE_MAX_SENSORS * 4];
Don Skidmore3ca8bc62012-04-12 00:33:31 +0000489 unsigned int n_hwmon;
490};
491#endif /* CONFIG_IXGBE_HWMON */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -0800492
Emil Tantilovd5bf4f62011-08-31 00:01:16 +0000493/*
494 * microsecond values for various ITR rates shifted by 2 to fit itr register
495 * with the first 3 bits reserved 0
Auke Kok9a799d72007-09-15 14:07:45 -0700496 */
Emil Tantilovd5bf4f62011-08-31 00:01:16 +0000497#define IXGBE_MIN_RSC_ITR 24
498#define IXGBE_100K_ITR 40
499#define IXGBE_20K_ITR 200
Alexander Duyck8ac34f12015-07-30 15:19:28 -0700500#define IXGBE_12K_ITR 336
Auke Kok9a799d72007-09-15 14:07:45 -0700501
Alexander Duyckf56e0cb2012-01-31 02:59:39 +0000502/* ixgbe_test_staterr - tests bits in Rx descriptor status and error fields */
503static inline __le32 ixgbe_test_staterr(union ixgbe_adv_rx_desc *rx_desc,
504 const u32 stat_err_bits)
505{
506 return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits);
507}
508
Alexander Duyck7d4987d2011-05-27 05:31:37 +0000509static inline u16 ixgbe_desc_unused(struct ixgbe_ring *ring)
510{
511 u16 ntc = ring->next_to_clean;
512 u16 ntu = ring->next_to_use;
513
514 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
515}
Auke Kok9a799d72007-09-15 14:07:45 -0700516
Alexander Duycke4f74022012-01-31 02:59:44 +0000517#define IXGBE_RX_DESC(R, i) \
Alexander Duyck31f05a22010-08-19 13:40:31 +0000518 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
Alexander Duycke4f74022012-01-31 02:59:44 +0000519#define IXGBE_TX_DESC(R, i) \
Alexander Duyck31f05a22010-08-19 13:40:31 +0000520 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
Alexander Duycke4f74022012-01-31 02:59:44 +0000521#define IXGBE_TX_CTXTDESC(R, i) \
Alexander Duyck31f05a22010-08-19 13:40:31 +0000522 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
Auke Kok9a799d72007-09-15 14:07:45 -0700523
Alexander Duyckc88887e2012-08-22 02:04:37 +0000524#define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */
Yi Zou63f39bd2009-05-17 12:34:35 +0000525#ifdef IXGBE_FCOE
526/* Use 3K as the baby jumbo frame size for FCoE */
527#define IXGBE_FCOE_JUMBO_FRAME_SIZE 3072
528#endif /* IXGBE_FCOE */
Auke Kok9a799d72007-09-15 14:07:45 -0700529
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -0800530#define OTHER_VECTOR 1
531#define NON_Q_VECTORS (OTHER_VECTOR)
532
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000533#define MAX_MSIX_VECTORS_82599 64
Alexander Duyck49c7ffb2012-05-05 05:30:43 +0000534#define MAX_Q_VECTORS_82599 64
Peter P Waskiewicz Jreb7f1392009-02-01 01:18:58 -0800535#define MAX_MSIX_VECTORS_82598 18
Alexander Duyck49c7ffb2012-05-05 05:30:43 +0000536#define MAX_Q_VECTORS_82598 16
Peter P Waskiewicz Jreb7f1392009-02-01 01:18:58 -0800537
Jacob Keller5d7daa32014-03-29 06:51:25 +0000538struct ixgbe_mac_addr {
539 u8 addr[ETH_ALEN];
Alexander Duyckc9f53e62015-10-22 16:26:30 -0700540 u16 pool;
Jacob Keller5d7daa32014-03-29 06:51:25 +0000541 u16 state; /* bitmask */
542};
Alexander Duyckc9f53e62015-10-22 16:26:30 -0700543
Jacob Keller5d7daa32014-03-29 06:51:25 +0000544#define IXGBE_MAC_STATE_DEFAULT 0x1
545#define IXGBE_MAC_STATE_MODIFIED 0x2
546#define IXGBE_MAC_STATE_IN_USE 0x4
547
Alexander Duyck49c7ffb2012-05-05 05:30:43 +0000548#define MAX_Q_VECTORS MAX_Q_VECTORS_82599
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000549#define MAX_MSIX_COUNT MAX_MSIX_VECTORS_82599
Peter P Waskiewicz Jreb7f1392009-02-01 01:18:58 -0800550
Alexander Duyck8f154862012-02-10 02:08:37 +0000551#define MIN_MSIX_Q_VECTORS 1
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -0800552#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
553
Alexander Duyck46646e62012-02-08 07:49:28 +0000554/* default to trying for four seconds */
555#define IXGBE_TRY_LINK_TIMEOUT (4 * HZ)
Mark Rustad58e7cd22015-08-08 16:18:48 -0700556#define IXGBE_SFP_POLL_JIFFIES (2 * HZ) /* SFP poll every 2 seconds */
Alexander Duyck46646e62012-02-08 07:49:28 +0000557
Auke Kok9a799d72007-09-15 14:07:45 -0700558/* board specific private data structure */
559struct ixgbe_adapter {
Alexander Duyck46646e62012-02-08 07:49:28 +0000560 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
561 /* OS defined structs */
562 struct net_device *netdev;
John Fastabend92470802017-04-24 03:30:17 -0700563 struct bpf_prog *xdp_prog;
Alexander Duyck46646e62012-02-08 07:49:28 +0000564 struct pci_dev *pdev;
Steve Douthit8fa10ef2018-12-06 15:50:39 +0000565 struct mii_bus *mii_bus;
Alexander Duyck46646e62012-02-08 07:49:28 +0000566
Alexander Duycke606bfe2011-04-22 04:07:43 +0000567 unsigned long state;
568
569 /* Some features need tri-state capability,
570 * thus the additional *_CAPABLE flags.
571 */
572 u32 flags;
Jacob Kellerb4f47a42016-04-13 16:08:22 -0700573#define IXGBE_FLAG_MSI_ENABLED BIT(1)
574#define IXGBE_FLAG_MSIX_ENABLED BIT(3)
575#define IXGBE_FLAG_RX_1BUF_CAPABLE BIT(4)
576#define IXGBE_FLAG_RX_PS_CAPABLE BIT(5)
577#define IXGBE_FLAG_RX_PS_ENABLED BIT(6)
578#define IXGBE_FLAG_DCA_ENABLED BIT(8)
579#define IXGBE_FLAG_DCA_CAPABLE BIT(9)
580#define IXGBE_FLAG_IMIR_ENABLED BIT(10)
581#define IXGBE_FLAG_MQ_CAPABLE BIT(11)
582#define IXGBE_FLAG_DCB_ENABLED BIT(12)
583#define IXGBE_FLAG_VMDQ_CAPABLE BIT(13)
584#define IXGBE_FLAG_VMDQ_ENABLED BIT(14)
585#define IXGBE_FLAG_FAN_FAIL_CAPABLE BIT(15)
586#define IXGBE_FLAG_NEED_LINK_UPDATE BIT(16)
587#define IXGBE_FLAG_NEED_LINK_CONFIG BIT(17)
588#define IXGBE_FLAG_FDIR_HASH_CAPABLE BIT(18)
589#define IXGBE_FLAG_FDIR_PERFECT_CAPABLE BIT(19)
590#define IXGBE_FLAG_FCOE_CAPABLE BIT(20)
591#define IXGBE_FLAG_FCOE_ENABLED BIT(21)
592#define IXGBE_FLAG_SRIOV_CAPABLE BIT(22)
593#define IXGBE_FLAG_SRIOV_ENABLED BIT(23)
Mark Rustad67359c32015-06-15 11:33:25 -0700594#define IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE BIT(24)
Mark Rustada9763f32015-10-27 09:58:07 -0700595#define IXGBE_FLAG_RX_HWTSTAMP_ENABLED BIT(25)
596#define IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER BIT(26)
Usha Ketineni88290092016-04-26 05:00:26 -0700597#define IXGBE_FLAG_DCB_CAPABLE BIT(27)
Emil Tantilova21d0822016-08-10 11:19:23 -0700598#define IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE BIT(28)
Alexander Duycke606bfe2011-04-22 04:07:43 +0000599
600 u32 flags2;
Jacob Kellerb4f47a42016-04-13 16:08:22 -0700601#define IXGBE_FLAG2_RSC_CAPABLE BIT(0)
602#define IXGBE_FLAG2_RSC_ENABLED BIT(1)
603#define IXGBE_FLAG2_TEMP_SENSOR_CAPABLE BIT(2)
604#define IXGBE_FLAG2_TEMP_SENSOR_EVENT BIT(3)
605#define IXGBE_FLAG2_SEARCH_FOR_SFP BIT(4)
606#define IXGBE_FLAG2_SFP_NEEDS_RESET BIT(5)
Jacob Kellerb4f47a42016-04-13 16:08:22 -0700607#define IXGBE_FLAG2_FDIR_REQUIRES_REINIT BIT(7)
608#define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP BIT(8)
609#define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP BIT(9)
610#define IXGBE_FLAG2_PTP_PPS_ENABLED BIT(10)
611#define IXGBE_FLAG2_PHY_INTERRUPT BIT(11)
Emil Tantilova21d0822016-08-10 11:19:23 -0700612#define IXGBE_FLAG2_UDP_TUN_REREG_NEEDED BIT(12)
Alexander Duyck16369562015-11-02 17:10:13 -0800613#define IXGBE_FLAG2_VLAN_PROMISC BIT(13)
Mark Rustadb3eb4e12016-12-14 11:02:16 -0800614#define IXGBE_FLAG2_EEE_CAPABLE BIT(14)
615#define IXGBE_FLAG2_EEE_ENABLED BIT(15)
Alexander Duyck2de6aa32017-01-17 08:36:54 -0800616#define IXGBE_FLAG2_RX_LEGACY BIT(16)
Shannon Nelson34c822e2017-12-19 15:59:56 -0800617#define IXGBE_FLAG2_IPSEC_ENABLED BIT(17)
Shannon Nelson9e4e30c2018-08-13 11:43:41 -0700618#define IXGBE_FLAG2_VF_IPSEC_ENABLED BIT(18)
Alexander Duyck46646e62012-02-08 07:49:28 +0000619
620 /* Tx fast path data */
621 int num_tx_queues;
622 u16 tx_itr_setting;
623 u16 tx_work_limit;
Shannon Nelsona8a43fd2017-12-19 16:00:01 -0800624 u64 tx_ipsec;
Alexander Duyck46646e62012-02-08 07:49:28 +0000625
626 /* Rx fast path data */
627 int num_rx_queues;
628 u16 rx_itr_setting;
Shannon Nelsona8a43fd2017-12-19 16:00:01 -0800629 u64 rx_ipsec;
Alexander Duyck46646e62012-02-08 07:49:28 +0000630
Alexander Duyck9f12df92016-01-25 19:36:29 -0800631 /* Port number used to identify VXLAN traffic */
632 __be16 vxlan_port;
Emil Tantilova21d0822016-08-10 11:19:23 -0700633 __be16 geneve_port;
Alexander Duyck9f12df92016-01-25 19:36:29 -0800634
John Fastabend33fdc822017-04-24 03:30:18 -0700635 /* XDP */
636 int num_xdp_queues;
637 struct ixgbe_ring *xdp_ring[MAX_XDP_QUEUES];
638
Alexander Duyck46646e62012-02-08 07:49:28 +0000639 /* TX */
640 struct ixgbe_ring *tx_ring[MAX_TX_QUEUES] ____cacheline_aligned_in_smp;
641
642 u64 restart_queue;
643 u64 lsc_int;
644 u32 tx_timeout_count;
645
646 /* RX */
647 struct ixgbe_ring *rx_ring[MAX_RX_QUEUES];
648 int num_rx_pools; /* == num_rx_queues in 82598 */
649 int num_rx_queues_per_pool; /* 1 if 82598, can be many if 82599 */
650 u64 hw_csum_rx_error;
651 u64 hw_rx_no_dma_resources;
652 u64 rsc_total_count;
653 u64 rsc_total_flush;
654 u64 non_eop_descs;
Jesper Dangaard Brouer86e23492017-09-04 20:40:22 +0200655 u32 alloc_rx_page;
Alexander Duyck46646e62012-02-08 07:49:28 +0000656 u32 alloc_rx_page_failed;
657 u32 alloc_rx_buff_failed;
658
Alexander Duyck49c7ffb2012-05-05 05:30:43 +0000659 struct ixgbe_q_vector *q_vector[MAX_Q_VECTORS];
John Fastabendd033d522011-02-10 14:40:01 +0000660
661 /* DCB parameters */
662 struct ieee_pfc *ixgbe_ieee_pfc;
663 struct ieee_ets *ixgbe_ieee_ets;
Alexander Duyck2f90b862008-11-20 20:52:10 -0800664 struct ixgbe_dcb_config dcb_cfg;
665 struct ixgbe_dcb_config temp_dcb_cfg;
Alexander Duyck0efbf122017-11-22 10:57:11 -0800666 u8 hw_tcs;
Alexander Duyck2f90b862008-11-20 20:52:10 -0800667 u8 dcb_set_bitmap;
John Fastabend30323092011-03-01 05:25:35 +0000668 u8 dcbx_cap;
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +0000669 enum ixgbe_fc_mode last_lfc_mode;
Auke Kok9a799d72007-09-15 14:07:45 -0700670
Alexander Duyck49c7ffb2012-05-05 05:30:43 +0000671 int num_q_vectors; /* current number of q_vectors for device */
672 int max_q_vectors; /* true count of q_vectors for device */
Shannon Nelsonc7e43582009-02-24 16:36:38 -0800673 struct ixgbe_ring_feature ring_feature[RING_F_ARRAY_SIZE];
Auke Kok9a799d72007-09-15 14:07:45 -0700674 struct msix_entry *msix_entries;
675
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +0000676 u32 test_icr;
677 struct ixgbe_ring test_tx_ring;
678 struct ixgbe_ring test_rx_ring;
679
Auke Kok9a799d72007-09-15 14:07:45 -0700680 /* structs defined in ixgbe_hw.h */
681 struct ixgbe_hw hw;
682 u16 msg_enable;
683 struct ixgbe_hw_stats stats;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -0800684
Auke Kok9a799d72007-09-15 14:07:45 -0700685 u64 tx_busy;
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -0700686 unsigned int tx_ring_count;
John Fastabend33fdc822017-04-24 03:30:18 -0700687 unsigned int xdp_ring_count;
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -0700688 unsigned int rx_ring_count;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -0700689
690 u32 link_speed;
691 bool link_up;
Mark Rustad58e7cd22015-08-08 16:18:48 -0700692 unsigned long sfp_poll_time;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -0700693 unsigned long link_check_timeout;
694
Alexander Duyck70864002011-04-27 09:13:56 +0000695 struct timer_list service_timer;
Alexander Duyck46646e62012-02-08 07:49:28 +0000696 struct work_struct service_task;
697
698 struct hlist_head fdir_filter_list;
699 unsigned long fdir_overflow; /* number of times ATR was backed off */
700 union ixgbe_atr_input fdir_mask;
701 int fdir_filter_count;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +0000702 u32 fdir_pballoc;
703 u32 atr_sample_rate;
704 spinlock_t fdir_perfect_lock;
Alexander Duyck46646e62012-02-08 07:49:28 +0000705
Yi Zoud0ed8932009-05-13 13:11:29 +0000706#ifdef IXGBE_FCOE
707 struct ixgbe_fcoe fcoe;
708#endif /* IXGBE_FCOE */
Mark Rustad2a1a0912014-01-14 18:53:15 -0800709 u8 __iomem *io_addr; /* Mainly for iounmap use */
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000710 u32 wol;
Alexander Duyck46646e62012-02-08 07:49:28 +0000711
Don Skidmoreaa2bacb2015-04-09 22:03:22 -0700712 u16 bridge_mode;
713
Paul Greenwalt73834ae2017-10-27 10:32:40 -0400714 char eeprom_id[NVM_VER_SIZE];
Emil Tantilovc23f5b62011-08-16 07:34:18 +0000715 u16 eeprom_cap;
Greg Rose7f870472010-01-09 02:25:29 +0000716
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -0700717 u32 interrupt_event;
Alexander Duyck46646e62012-02-08 07:49:28 +0000718 u32 led_reg;
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +0000719
Jacob Keller3a6a4ed2012-05-01 05:24:58 +0000720 struct ptp_clock *ptp_clock;
721 struct ptp_clock_info ptp_caps;
Jacob Keller891dc082012-12-05 07:24:46 +0000722 struct work_struct ptp_tx_work;
723 struct sk_buff *ptp_tx_skb;
Jacob Keller93501d42014-02-28 15:48:58 -0800724 struct hwtstamp_config tstamp_config;
Jacob Keller891dc082012-12-05 07:24:46 +0000725 unsigned long ptp_tx_start;
Jacob Keller3a6a4ed2012-05-01 05:24:58 +0000726 unsigned long last_overflow_check;
Jacob Keller6cb562d2012-12-05 07:24:41 +0000727 unsigned long last_rx_ptp_check;
Jakub Kicinskieda183c2014-04-02 10:33:28 +0000728 unsigned long last_rx_timestamp;
Jacob Keller3a6a4ed2012-05-01 05:24:58 +0000729 spinlock_t tmreg_lock;
Mark Rustada9763f32015-10-27 09:58:07 -0700730 struct cyclecounter hw_cc;
731 struct timecounter hw_tc;
Jacob Keller3a6a4ed2012-05-01 05:24:58 +0000732 u32 base_incval;
Mark Rustada9763f32015-10-27 09:58:07 -0700733 u32 tx_hwtstamp_timeouts;
Jacob Keller4cc74c02017-05-03 10:29:00 -0700734 u32 tx_hwtstamp_skipped;
Mark Rustada9763f32015-10-27 09:58:07 -0700735 u32 rx_hwtstamp_cleared;
736 void (*ptp_setup_sdp)(struct ixgbe_adapter *);
Jacob Keller3a6a4ed2012-05-01 05:24:58 +0000737
Greg Rose7f870472010-01-09 02:25:29 +0000738 /* SR-IOV */
739 DECLARE_BITMAP(active_vfs, IXGBE_MAX_VF_FUNCTIONS);
740 unsigned int num_vfs;
741 struct vf_data_storage *vfinfo;
Lior Levyff4ab202011-03-11 02:03:07 +0000742 int vf_rate_link_speed;
Greg Rosea1cbb15c2011-05-13 01:33:48 +0000743 struct vf_macvlans vf_mvs;
744 struct vf_macvlans *mv_list;
Alexander Duyck3e053342011-05-11 07:18:47 +0000745
Greg Rose83c61fa2011-09-07 05:59:35 +0000746 u32 timer_event_accumulator;
747 u32 vferr_refcount;
Jacob Keller5d7daa32014-03-29 06:51:25 +0000748 struct ixgbe_mac_addr *mac_table;
Don Skidmore3ca8bc62012-04-12 00:33:31 +0000749 struct kobject *info_kobj;
750#ifdef CONFIG_IXGBE_HWMON
Guenter Roeck03b77d82013-11-26 07:15:28 +0000751 struct hwmon_buff *ixgbe_hwmon_buff;
Don Skidmore3ca8bc62012-04-12 00:33:31 +0000752#endif /* CONFIG_IXGBE_HWMON */
Catherine Sullivan00949162012-08-10 01:59:10 +0000753#ifdef CONFIG_DEBUG_FS
754 struct dentry *ixgbe_dbg_adapter;
755#endif /*CONFIG_DEBUG_FS*/
Alexander Duyck107d3012012-10-02 00:17:03 +0000756
757 u8 default_up;
Alexander Duyck4e039c12017-11-22 10:56:40 -0800758 /* Bitmask indicating in use pools */
759 DECLARE_BITMAP(fwd_bitmask, IXGBE_MAX_MACVLANS + 1);
Vlad Zolotarovdfaf8912015-03-30 21:18:57 +0300760
John Fastabendb82b17d2016-02-16 21:18:53 -0800761#define IXGBE_MAX_LINK_HANDLE 10
Amritha Nambiar1cdaaf52016-04-14 19:08:53 -0400762 struct ixgbe_jump_table *jump_tables[IXGBE_MAX_LINK_HANDLE];
John Fastabenddb956ae2016-02-16 21:19:19 -0800763 unsigned long tables;
John Fastabendb82b17d2016-02-16 21:18:53 -0800764
Vlad Zolotarovdfaf8912015-03-30 21:18:57 +0300765/* maximum number of RETA entries among all devices supported by ixgbe
766 * driver: currently it's x550 device in non-SRIOV mode
767 */
768#define IXGBE_MAX_RETA_ENTRIES 512
769 u8 rss_indir_tbl[IXGBE_MAX_RETA_ENTRIES];
770
771#define IXGBE_RSS_KEY_SIZE 40 /* size of RSS Hash Key in bytes */
Tony Nguyen3dfbfc72017-04-13 07:26:05 -0700772 u32 *rss_key;
Shannon Nelson34c822e2017-12-19 15:59:56 -0800773
Jeff Kirsher48e01e02018-10-18 15:39:43 -0700774#ifdef CONFIG_IXGBE_IPSEC
Shannon Nelson34c822e2017-12-19 15:59:56 -0800775 struct ixgbe_ipsec *ipsec;
Jeff Kirsher48e01e02018-10-18 15:39:43 -0700776#endif /* CONFIG_IXGBE_IPSEC */
Björn Töpeld0bcacd2018-10-02 10:00:32 +0200777
778 /* AF_XDP zero-copy */
779 struct xdp_umem **xsk_umems;
780 u16 num_xsk_umems_used;
781 u16 num_xsk_umems;
Alexander Duyck3e053342011-05-11 07:18:47 +0000782};
783
Don Skidmore0f9b2322014-11-18 09:35:08 +0000784static inline u8 ixgbe_max_rss_indices(struct ixgbe_adapter *adapter)
785{
786 switch (adapter->hw.mac.type) {
787 case ixgbe_mac_82598EB:
788 case ixgbe_mac_82599EB:
789 case ixgbe_mac_X540:
790 return IXGBE_MAX_RSS_INDICES;
791 case ixgbe_mac_X550:
792 case ixgbe_mac_X550EM_x:
Mark Rustad49425df2016-04-01 12:18:09 -0700793 case ixgbe_mac_x550em_a:
Don Skidmore0f9b2322014-11-18 09:35:08 +0000794 return IXGBE_MAX_RSS_INDICES_X550;
795 default:
796 return 0;
797 }
798}
799
Alexander Duyck3e053342011-05-11 07:18:47 +0000800struct ixgbe_fdir_filter {
801 struct hlist_node fdir_node;
802 union ixgbe_atr_input filter;
803 u16 sw_idx;
Sridhar Samudrala2a9ed5d2016-04-01 10:34:38 -0700804 u64 action;
Auke Kok9a799d72007-09-15 14:07:45 -0700805};
806
Don Skidmore70e55762012-03-15 04:55:59 +0000807enum ixgbe_state_t {
Auke Kok9a799d72007-09-15 14:07:45 -0700808 __IXGBE_TESTING,
809 __IXGBE_RESETTING,
Donald Skidmorec4900be2008-11-20 21:11:42 -0800810 __IXGBE_DOWN,
Mark Rustad41c62842014-03-12 00:38:35 +0000811 __IXGBE_DISABLED,
Mark Rustad09f40ae2014-01-14 18:53:11 -0800812 __IXGBE_REMOVING,
Alexander Duyck70864002011-04-27 09:13:56 +0000813 __IXGBE_SERVICE_SCHED,
Mark Rustad58cf6632014-03-12 00:38:40 +0000814 __IXGBE_SERVICE_INITED,
Alexander Duyck70864002011-04-27 09:13:56 +0000815 __IXGBE_IN_SFP_INIT,
Jacob Keller8fecf672013-06-21 08:14:32 +0000816 __IXGBE_PTP_RUNNING,
Jakub Kicinski151b260c2014-03-15 14:55:21 +0000817 __IXGBE_PTP_TX_IN_PROGRESS,
Emil Tantilov57ca2a42016-07-29 14:46:31 -0700818 __IXGBE_RESET_REQUESTED,
Auke Kok9a799d72007-09-15 14:07:45 -0700819};
820
Alexander Duyck4c1975d2012-01-31 02:59:23 +0000821struct ixgbe_cb {
822 union { /* Union defining head/tail partner */
823 struct sk_buff *head;
824 struct sk_buff *tail;
825 };
Alexander Duyckaa801752010-11-16 19:27:02 -0800826 dma_addr_t dma;
Alexander Duyck4c1975d2012-01-31 02:59:23 +0000827 u16 append_cnt;
Alexander Duyckf8003262012-03-03 02:35:52 +0000828 bool page_released;
Alexander Duyckaa801752010-11-16 19:27:02 -0800829};
Alexander Duyck4c1975d2012-01-31 02:59:23 +0000830#define IXGBE_CB(skb) ((struct ixgbe_cb *)(skb)->cb)
Alexander Duyckaa801752010-11-16 19:27:02 -0800831
Auke Kok9a799d72007-09-15 14:07:45 -0700832enum ixgbe_boards {
Auke Kok3957d632007-10-31 15:22:10 -0700833 board_82598,
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000834 board_82599,
Don Skidmorefe15e8e12010-11-16 19:27:16 -0800835 board_X540,
Don Skidmore6a14ee02014-12-05 03:59:50 +0000836 board_X550,
837 board_X550EM_x,
Paul Greenwalt8dc963e2017-04-13 08:07:07 -0400838 board_x550em_x_fw,
Mark Rustad49425df2016-04-01 12:18:09 -0700839 board_x550em_a,
Mark Rustadb3eb4e12016-12-14 11:02:16 -0800840 board_x550em_a_fw,
Auke Kok9a799d72007-09-15 14:07:45 -0700841};
842
Mark Rustad37689012016-01-07 10:13:03 -0800843extern const struct ixgbe_info ixgbe_82598_info;
844extern const struct ixgbe_info ixgbe_82599_info;
845extern const struct ixgbe_info ixgbe_X540_info;
846extern const struct ixgbe_info ixgbe_X550_info;
847extern const struct ixgbe_info ixgbe_X550EM_x_info;
Paul Greenwalt8dc963e2017-04-13 08:07:07 -0400848extern const struct ixgbe_info ixgbe_x550em_x_fw_info;
Mark Rustad49425df2016-04-01 12:18:09 -0700849extern const struct ixgbe_info ixgbe_x550em_a_info;
Mark Rustadb3eb4e12016-12-14 11:02:16 -0800850extern const struct ixgbe_info ixgbe_x550em_a_fw_info;
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -0800851#ifdef CONFIG_IXGBE_DCB
Stephen Hemminger3f40c742016-11-21 09:52:40 -0800852extern const struct dcbnl_rtnl_ops ixgbe_dcbnl_ops;
Alexander Duyck2f90b862008-11-20 20:52:10 -0800853#endif
Auke Kok9a799d72007-09-15 14:07:45 -0700854
855extern char ixgbe_driver_name[];
Stephen Hemminger9c8eb722007-10-29 10:46:24 -0700856extern const char ixgbe_driver_version[];
Jeff Kirsher8af3c332012-02-18 07:08:14 +0000857#ifdef IXGBE_FCOE
Neerav Parikhea818752012-01-04 20:23:40 +0000858extern char ixgbe_default_device_descr[];
Jeff Kirsher8af3c332012-02-18 07:08:14 +0000859#endif /* IXGBE_FCOE */
Auke Kok9a799d72007-09-15 14:07:45 -0700860
Stefan Assmann6c211fe12016-02-03 09:20:48 +0100861int ixgbe_open(struct net_device *netdev);
862int ixgbe_close(struct net_device *netdev);
Joe Perches5ccc9212013-09-23 11:37:59 -0700863void ixgbe_up(struct ixgbe_adapter *adapter);
864void ixgbe_down(struct ixgbe_adapter *adapter);
865void ixgbe_reinit_locked(struct ixgbe_adapter *adapter);
866void ixgbe_reset(struct ixgbe_adapter *adapter);
867void ixgbe_set_ethtool_ops(struct net_device *netdev);
John Fastabend92470802017-04-24 03:30:17 -0700868int ixgbe_setup_rx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
Joe Perches5ccc9212013-09-23 11:37:59 -0700869int ixgbe_setup_tx_resources(struct ixgbe_ring *);
870void ixgbe_free_rx_resources(struct ixgbe_ring *);
871void ixgbe_free_tx_resources(struct ixgbe_ring *);
872void ixgbe_configure_rx_ring(struct ixgbe_adapter *, struct ixgbe_ring *);
873void ixgbe_configure_tx_ring(struct ixgbe_adapter *, struct ixgbe_ring *);
Alexander Duyck1918e932018-07-20 18:29:34 -0400874void ixgbe_disable_rx(struct ixgbe_adapter *adapter);
875void ixgbe_disable_tx(struct ixgbe_adapter *adapter);
Joe Perches5ccc9212013-09-23 11:37:59 -0700876void ixgbe_update_stats(struct ixgbe_adapter *adapter);
877int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter);
Emil Tantilov740234f2016-04-21 11:37:12 -0700878bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
879 u16 subdevice_id);
Jacob Keller5d7daa32014-03-29 06:51:25 +0000880#ifdef CONFIG_PCI_IOV
881void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter);
882#endif
883int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
Alexander Duyckc9f53e62015-10-22 16:26:30 -0700884 const u8 *addr, u16 queue);
Jacob Keller5d7daa32014-03-29 06:51:25 +0000885int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
Alexander Duyckc9f53e62015-10-22 16:26:30 -0700886 const u8 *addr, u16 queue);
Alexander Duycke1d0a2a2015-11-02 17:10:19 -0800887void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid);
Joe Perches5ccc9212013-09-23 11:37:59 -0700888void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter);
889netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *, struct ixgbe_adapter *,
890 struct ixgbe_ring *);
891void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *,
892 struct ixgbe_tx_buffer *);
893void ixgbe_alloc_rx_buffers(struct ixgbe_ring *, u16);
894void ixgbe_write_eitr(struct ixgbe_q_vector *);
895int ixgbe_poll(struct napi_struct *napi, int budget);
896int ethtool_ioctl(struct ifreq *ifr);
897s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
898s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
899s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl);
900s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
901 union ixgbe_atr_hash_dword input,
902 union ixgbe_atr_hash_dword common,
903 u8 queue);
904s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
905 union ixgbe_atr_input *input_mask);
906s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
907 union ixgbe_atr_input *input,
908 u16 soft_id, u8 queue);
909s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
910 union ixgbe_atr_input *input,
911 u16 soft_id);
912void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
913 union ixgbe_atr_input *mask);
John Fastabendb82b17d2016-02-16 21:18:53 -0800914int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
915 struct ixgbe_fdir_filter *input,
916 u16 sw_idx);
Joe Perches5ccc9212013-09-23 11:37:59 -0700917void ixgbe_set_rx_mode(struct net_device *netdev);
Jeff Kirsher8af3c332012-02-18 07:08:14 +0000918#ifdef CONFIG_IXGBE_DCB
Joe Perches5ccc9212013-09-23 11:37:59 -0700919void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter);
Jeff Kirsher8af3c332012-02-18 07:08:14 +0000920#endif
Joe Perches5ccc9212013-09-23 11:37:59 -0700921int ixgbe_setup_tc(struct net_device *dev, u8 tc);
922void ixgbe_tx_ctxtdesc(struct ixgbe_ring *, u32, u32, u32, u32);
923void ixgbe_do_reset(struct net_device *netdev);
Don Skidmore12109822012-05-04 06:07:08 +0000924#ifdef CONFIG_IXGBE_HWMON
Joe Perches5ccc9212013-09-23 11:37:59 -0700925void ixgbe_sysfs_exit(struct ixgbe_adapter *adapter);
926int ixgbe_sysfs_init(struct ixgbe_adapter *adapter);
Don Skidmore12109822012-05-04 06:07:08 +0000927#endif /* CONFIG_IXGBE_HWMON */
Yi Zoueacd73f2009-05-13 13:11:06 +0000928#ifdef IXGBE_FCOE
Joe Perches5ccc9212013-09-23 11:37:59 -0700929void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter);
930int ixgbe_fso(struct ixgbe_ring *tx_ring, struct ixgbe_tx_buffer *first,
931 u8 *hdr_len);
932int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
933 union ixgbe_adv_rx_desc *rx_desc, struct sk_buff *skb);
934int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
935 struct scatterlist *sgl, unsigned int sgc);
936int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid,
937 struct scatterlist *sgl, unsigned int sgc);
938int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid);
939int ixgbe_setup_fcoe_ddp_resources(struct ixgbe_adapter *adapter);
940void ixgbe_free_fcoe_ddp_resources(struct ixgbe_adapter *adapter);
941int ixgbe_fcoe_enable(struct net_device *netdev);
942int ixgbe_fcoe_disable(struct net_device *netdev);
Yi Zou6ee16522009-08-31 12:34:28 +0000943#ifdef CONFIG_IXGBE_DCB
Joe Perches5ccc9212013-09-23 11:37:59 -0700944u8 ixgbe_fcoe_getapp(struct ixgbe_adapter *adapter);
945u8 ixgbe_fcoe_setapp(struct ixgbe_adapter *adapter, u8 up);
Yi Zou6ee16522009-08-31 12:34:28 +0000946#endif /* CONFIG_IXGBE_DCB */
Joe Perches5ccc9212013-09-23 11:37:59 -0700947int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type);
948int ixgbe_fcoe_get_hbainfo(struct net_device *netdev,
949 struct netdev_fcoe_hbainfo *info);
950u8 ixgbe_fcoe_get_tc(struct ixgbe_adapter *adapter);
Yi Zoueacd73f2009-05-13 13:11:06 +0000951#endif /* IXGBE_FCOE */
Catherine Sullivan00949162012-08-10 01:59:10 +0000952#ifdef CONFIG_DEBUG_FS
Joe Perches5ccc9212013-09-23 11:37:59 -0700953void ixgbe_dbg_adapter_init(struct ixgbe_adapter *adapter);
954void ixgbe_dbg_adapter_exit(struct ixgbe_adapter *adapter);
955void ixgbe_dbg_init(void);
956void ixgbe_dbg_exit(void);
Joe Perches33243fb2013-04-12 17:12:54 +0000957#else
958static inline void ixgbe_dbg_adapter_init(struct ixgbe_adapter *adapter) {}
959static inline void ixgbe_dbg_adapter_exit(struct ixgbe_adapter *adapter) {}
960static inline void ixgbe_dbg_init(void) {}
961static inline void ixgbe_dbg_exit(void) {}
Catherine Sullivan00949162012-08-10 01:59:10 +0000962#endif /* CONFIG_DEBUG_FS */
Alexander Duyckb2d96e02012-02-07 08:14:33 +0000963static inline struct netdev_queue *txring_txq(const struct ixgbe_ring *ring)
964{
965 return netdev_get_tx_queue(ring->netdev, ring->queue_index);
966}
967
Joe Perches5ccc9212013-09-23 11:37:59 -0700968void ixgbe_ptp_init(struct ixgbe_adapter *adapter);
Jacob Keller9966d1e2014-05-16 05:12:28 +0000969void ixgbe_ptp_suspend(struct ixgbe_adapter *adapter);
Joe Perches5ccc9212013-09-23 11:37:59 -0700970void ixgbe_ptp_stop(struct ixgbe_adapter *adapter);
971void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter);
972void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter);
Jacob Keller622a2ef2017-05-03 10:29:04 -0700973void ixgbe_ptp_tx_hang(struct ixgbe_adapter *adapter);
Mark Rustada9763f32015-10-27 09:58:07 -0700974void ixgbe_ptp_rx_pktstamp(struct ixgbe_q_vector *, struct sk_buff *);
975void ixgbe_ptp_rx_rgtstamp(struct ixgbe_q_vector *, struct sk_buff *skb);
976static inline void ixgbe_ptp_rx_hwtstamp(struct ixgbe_ring *rx_ring,
977 union ixgbe_adv_rx_desc *rx_desc,
978 struct sk_buff *skb)
979{
980 if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_TSIP))) {
981 ixgbe_ptp_rx_pktstamp(rx_ring->q_vector, skb);
982 return;
983 }
984
985 if (unlikely(!ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
986 return;
987
988 ixgbe_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
989
990 /* Update the last_rx_timestamp timer in order to enable watchdog check
991 * for error case of latched timestamp on a dropped packet.
992 */
993 rx_ring->last_rx_timestamp = jiffies;
994}
995
Jacob Keller93501d42014-02-28 15:48:58 -0800996int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr);
997int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr);
Joe Perches5ccc9212013-09-23 11:37:59 -0700998void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter);
999void ixgbe_ptp_reset(struct ixgbe_adapter *adapter);
Mark Rustada9763f32015-10-27 09:58:07 -07001000void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter);
Greg Roseda36b642012-12-11 08:26:43 +00001001#ifdef CONFIG_PCI_IOV
1002void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter);
1003#endif
Jacob Keller3a6a4ed2012-05-01 05:24:58 +00001004
John Fastabend2a47fa42013-11-06 09:54:52 -08001005netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
1006 struct ixgbe_adapter *adapter,
1007 struct ixgbe_ring *tx_ring);
Vlad Zolotarov7f276ef2015-03-30 21:18:58 +03001008u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter);
Paolo Abenid3aa9c92016-12-15 15:20:34 +01001009void ixgbe_store_key(struct ixgbe_adapter *adapter);
Tom Barbette1c7cf072015-06-26 15:40:18 +02001010void ixgbe_store_reta(struct ixgbe_adapter *adapter);
Don Skidmore29165002016-09-27 14:31:12 -04001011s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
1012 u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);
Jeff Kirsher48e01e02018-10-18 15:39:43 -07001013#ifdef CONFIG_IXGBE_IPSEC
Shannon Nelson8bbbc5e2017-12-19 15:59:54 -08001014void ixgbe_init_ipsec_offload(struct ixgbe_adapter *adapter);
Shannon Nelson63a67fe2017-12-19 15:59:57 -08001015void ixgbe_stop_ipsec_offload(struct ixgbe_adapter *adapter);
Shannon Nelson6d73a152017-12-19 15:59:58 -08001016void ixgbe_ipsec_restore(struct ixgbe_adapter *adapter);
Shannon Nelson92103192017-12-19 15:59:59 -08001017void ixgbe_ipsec_rx(struct ixgbe_ring *rx_ring,
1018 union ixgbe_adv_rx_desc *rx_desc,
1019 struct sk_buff *skb);
Shannon Nelson59259472017-12-19 16:00:00 -08001020int ixgbe_ipsec_tx(struct ixgbe_ring *tx_ring, struct ixgbe_tx_buffer *first,
1021 struct ixgbe_ipsec_tx_data *itd);
Shannon Nelson72698242018-08-13 11:43:42 -07001022void ixgbe_ipsec_vf_clear(struct ixgbe_adapter *adapter, u32 vf);
1023int ixgbe_ipsec_vf_add_sa(struct ixgbe_adapter *adapter, u32 *mbuf, u32 vf);
1024int ixgbe_ipsec_vf_del_sa(struct ixgbe_adapter *adapter, u32 *mbuf, u32 vf);
Shannon Nelson8bbbc5e2017-12-19 15:59:54 -08001025#else
Shannon Nelson72698242018-08-13 11:43:42 -07001026static inline void ixgbe_init_ipsec_offload(struct ixgbe_adapter *adapter) { }
1027static inline void ixgbe_stop_ipsec_offload(struct ixgbe_adapter *adapter) { }
1028static inline void ixgbe_ipsec_restore(struct ixgbe_adapter *adapter) { }
Shannon Nelson92103192017-12-19 15:59:59 -08001029static inline void ixgbe_ipsec_rx(struct ixgbe_ring *rx_ring,
1030 union ixgbe_adv_rx_desc *rx_desc,
Shannon Nelson72698242018-08-13 11:43:42 -07001031 struct sk_buff *skb) { }
Shannon Nelson59259472017-12-19 16:00:00 -08001032static inline int ixgbe_ipsec_tx(struct ixgbe_ring *tx_ring,
1033 struct ixgbe_tx_buffer *first,
Shannon Nelson72698242018-08-13 11:43:42 -07001034 struct ixgbe_ipsec_tx_data *itd) { return 0; }
1035static inline void ixgbe_ipsec_vf_clear(struct ixgbe_adapter *adapter,
1036 u32 vf) { }
1037static inline int ixgbe_ipsec_vf_add_sa(struct ixgbe_adapter *adapter,
1038 u32 *mbuf, u32 vf) { return -EACCES; }
1039static inline int ixgbe_ipsec_vf_del_sa(struct ixgbe_adapter *adapter,
1040 u32 *mbuf, u32 vf) { return -EACCES; }
Jeff Kirsher48e01e02018-10-18 15:39:43 -07001041#endif /* CONFIG_IXGBE_IPSEC */
Auke Kok9a799d72007-09-15 14:07:45 -07001042#endif /* _IXGBE_H_ */