Yan-Hsuan Chuang | e303748 | 2019-04-26 15:17:37 +0300 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ |
| 2 | /* Copyright(c) 2018-2019 Realtek Corporation |
| 3 | */ |
| 4 | |
| 5 | #ifndef __RTW_HCI_H__ |
| 6 | #define __RTW_HCI_H__ |
| 7 | |
| 8 | /* ops for PCI, USB and SDIO */ |
| 9 | struct rtw_hci_ops { |
| 10 | int (*tx)(struct rtw_dev *rtwdev, |
| 11 | struct rtw_tx_pkt_info *pkt_info, |
| 12 | struct sk_buff *skb); |
| 13 | int (*setup)(struct rtw_dev *rtwdev); |
| 14 | int (*start)(struct rtw_dev *rtwdev); |
| 15 | void (*stop)(struct rtw_dev *rtwdev); |
| 16 | |
| 17 | int (*write_data_rsvd_page)(struct rtw_dev *rtwdev, u8 *buf, u32 size); |
| 18 | int (*write_data_h2c)(struct rtw_dev *rtwdev, u8 *buf, u32 size); |
| 19 | |
| 20 | u8 (*read8)(struct rtw_dev *rtwdev, u32 addr); |
| 21 | u16 (*read16)(struct rtw_dev *rtwdev, u32 addr); |
| 22 | u32 (*read32)(struct rtw_dev *rtwdev, u32 addr); |
| 23 | void (*write8)(struct rtw_dev *rtwdev, u32 addr, u8 val); |
| 24 | void (*write16)(struct rtw_dev *rtwdev, u32 addr, u16 val); |
| 25 | void (*write32)(struct rtw_dev *rtwdev, u32 addr, u32 val); |
| 26 | }; |
| 27 | |
| 28 | static inline int rtw_hci_tx(struct rtw_dev *rtwdev, |
| 29 | struct rtw_tx_pkt_info *pkt_info, |
| 30 | struct sk_buff *skb) |
| 31 | { |
| 32 | return rtwdev->hci.ops->tx(rtwdev, pkt_info, skb); |
| 33 | } |
| 34 | |
| 35 | static inline int rtw_hci_setup(struct rtw_dev *rtwdev) |
| 36 | { |
| 37 | return rtwdev->hci.ops->setup(rtwdev); |
| 38 | } |
| 39 | |
| 40 | static inline int rtw_hci_start(struct rtw_dev *rtwdev) |
| 41 | { |
| 42 | return rtwdev->hci.ops->start(rtwdev); |
| 43 | } |
| 44 | |
| 45 | static inline void rtw_hci_stop(struct rtw_dev *rtwdev) |
| 46 | { |
| 47 | rtwdev->hci.ops->stop(rtwdev); |
| 48 | } |
| 49 | |
| 50 | static inline int |
| 51 | rtw_hci_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size) |
| 52 | { |
| 53 | return rtwdev->hci.ops->write_data_rsvd_page(rtwdev, buf, size); |
| 54 | } |
| 55 | |
| 56 | static inline int |
| 57 | rtw_hci_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size) |
| 58 | { |
| 59 | return rtwdev->hci.ops->write_data_h2c(rtwdev, buf, size); |
| 60 | } |
| 61 | |
| 62 | static inline u8 rtw_read8(struct rtw_dev *rtwdev, u32 addr) |
| 63 | { |
| 64 | return rtwdev->hci.ops->read8(rtwdev, addr); |
| 65 | } |
| 66 | |
| 67 | static inline u16 rtw_read16(struct rtw_dev *rtwdev, u32 addr) |
| 68 | { |
| 69 | return rtwdev->hci.ops->read16(rtwdev, addr); |
| 70 | } |
| 71 | |
| 72 | static inline u32 rtw_read32(struct rtw_dev *rtwdev, u32 addr) |
| 73 | { |
| 74 | return rtwdev->hci.ops->read32(rtwdev, addr); |
| 75 | } |
| 76 | |
| 77 | static inline void rtw_write8(struct rtw_dev *rtwdev, u32 addr, u8 val) |
| 78 | { |
| 79 | rtwdev->hci.ops->write8(rtwdev, addr, val); |
| 80 | } |
| 81 | |
| 82 | static inline void rtw_write16(struct rtw_dev *rtwdev, u32 addr, u16 val) |
| 83 | { |
| 84 | rtwdev->hci.ops->write16(rtwdev, addr, val); |
| 85 | } |
| 86 | |
| 87 | static inline void rtw_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) |
| 88 | { |
| 89 | rtwdev->hci.ops->write32(rtwdev, addr, val); |
| 90 | } |
| 91 | |
| 92 | static inline void rtw_write8_set(struct rtw_dev *rtwdev, u32 addr, u8 bit) |
| 93 | { |
| 94 | u8 val; |
| 95 | |
| 96 | val = rtw_read8(rtwdev, addr); |
| 97 | rtw_write8(rtwdev, addr, val | bit); |
| 98 | } |
| 99 | |
| 100 | static inline void rtw_writ16_set(struct rtw_dev *rtwdev, u32 addr, u16 bit) |
| 101 | { |
| 102 | u16 val; |
| 103 | |
| 104 | val = rtw_read16(rtwdev, addr); |
| 105 | rtw_write16(rtwdev, addr, val | bit); |
| 106 | } |
| 107 | |
| 108 | static inline void rtw_write32_set(struct rtw_dev *rtwdev, u32 addr, u32 bit) |
| 109 | { |
| 110 | u32 val; |
| 111 | |
| 112 | val = rtw_read32(rtwdev, addr); |
| 113 | rtw_write32(rtwdev, addr, val | bit); |
| 114 | } |
| 115 | |
| 116 | static inline void rtw_write8_clr(struct rtw_dev *rtwdev, u32 addr, u8 bit) |
| 117 | { |
| 118 | u8 val; |
| 119 | |
| 120 | val = rtw_read8(rtwdev, addr); |
| 121 | rtw_write8(rtwdev, addr, val & ~bit); |
| 122 | } |
| 123 | |
| 124 | static inline void rtw_write16_clr(struct rtw_dev *rtwdev, u32 addr, u16 bit) |
| 125 | { |
| 126 | u16 val; |
| 127 | |
| 128 | val = rtw_read16(rtwdev, addr); |
| 129 | rtw_write16(rtwdev, addr, val & ~bit); |
| 130 | } |
| 131 | |
| 132 | static inline void rtw_write32_clr(struct rtw_dev *rtwdev, u32 addr, u32 bit) |
| 133 | { |
| 134 | u32 val; |
| 135 | |
| 136 | val = rtw_read32(rtwdev, addr); |
| 137 | rtw_write32(rtwdev, addr, val & ~bit); |
| 138 | } |
| 139 | |
| 140 | static inline u32 |
| 141 | rtw_read_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, |
| 142 | u32 addr, u32 mask) |
| 143 | { |
| 144 | unsigned long flags; |
| 145 | u32 val; |
| 146 | |
| 147 | spin_lock_irqsave(&rtwdev->rf_lock, flags); |
| 148 | val = rtwdev->chip->ops->read_rf(rtwdev, rf_path, addr, mask); |
| 149 | spin_unlock_irqrestore(&rtwdev->rf_lock, flags); |
| 150 | |
| 151 | return val; |
| 152 | } |
| 153 | |
| 154 | static inline void |
| 155 | rtw_write_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, |
| 156 | u32 addr, u32 mask, u32 data) |
| 157 | { |
| 158 | unsigned long flags; |
| 159 | |
| 160 | spin_lock_irqsave(&rtwdev->rf_lock, flags); |
| 161 | rtwdev->chip->ops->write_rf(rtwdev, rf_path, addr, mask, data); |
| 162 | spin_unlock_irqrestore(&rtwdev->rf_lock, flags); |
| 163 | } |
| 164 | |
| 165 | static inline u32 |
| 166 | rtw_read32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask) |
| 167 | { |
| 168 | u32 shift = __ffs(mask); |
| 169 | u32 orig; |
| 170 | u32 ret; |
| 171 | |
| 172 | orig = rtw_read32(rtwdev, addr); |
| 173 | ret = (orig & mask) >> shift; |
| 174 | |
| 175 | return ret; |
| 176 | } |
| 177 | |
| 178 | static inline void |
| 179 | rtw_write32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) |
| 180 | { |
| 181 | u32 shift = __ffs(mask); |
| 182 | u32 orig; |
| 183 | u32 set; |
| 184 | |
| 185 | WARN(addr & 0x3, "should be 4-byte aligned, addr = 0x%08x\n", addr); |
| 186 | |
| 187 | orig = rtw_read32(rtwdev, addr); |
| 188 | set = (orig & ~mask) | ((data << shift) & mask); |
| 189 | rtw_write32(rtwdev, addr, set); |
| 190 | } |
| 191 | |
| 192 | static inline void |
| 193 | rtw_write8_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u8 data) |
| 194 | { |
| 195 | u32 shift; |
| 196 | u8 orig, set; |
| 197 | |
| 198 | mask &= 0xff; |
| 199 | shift = __ffs(mask); |
| 200 | |
| 201 | orig = rtw_read8(rtwdev, addr); |
| 202 | set = (orig & ~mask) | ((data << shift) & mask); |
| 203 | rtw_write8(rtwdev, addr, set); |
| 204 | } |
| 205 | |
| 206 | static inline enum rtw_hci_type rtw_hci_type(struct rtw_dev *rtwdev) |
| 207 | { |
| 208 | return rtwdev->hci.type; |
| 209 | } |
| 210 | |
| 211 | #endif |