| Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Andrew Victor | 93a3ddc | 2007-02-08 11:31:22 +0100 | [diff] [blame] | 2 | /* |
| 3 | * include/linux/atmel_pdc.h |
| 4 | * |
| 5 | * Copyright (C) 2005 Ivan Kokshaysky |
| 6 | * Copyright (C) SAN People |
| 7 | * |
| 8 | * Peripheral Data Controller (PDC) registers. |
| 9 | * Based on AT91RM9200 datasheet revision E. |
| Andrew Victor | 93a3ddc | 2007-02-08 11:31:22 +0100 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #ifndef ATMEL_PDC_H |
| 13 | #define ATMEL_PDC_H |
| 14 | |
| 15 | #define ATMEL_PDC_RPR 0x100 /* Receive Pointer Register */ |
| 16 | #define ATMEL_PDC_RCR 0x104 /* Receive Counter Register */ |
| 17 | #define ATMEL_PDC_TPR 0x108 /* Transmit Pointer Register */ |
| 18 | #define ATMEL_PDC_TCR 0x10c /* Transmit Counter Register */ |
| 19 | #define ATMEL_PDC_RNPR 0x110 /* Receive Next Pointer Register */ |
| 20 | #define ATMEL_PDC_RNCR 0x114 /* Receive Next Counter Register */ |
| 21 | #define ATMEL_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ |
| 22 | #define ATMEL_PDC_TNCR 0x11c /* Transmit Next Counter Register */ |
| 23 | |
| 24 | #define ATMEL_PDC_PTCR 0x120 /* Transfer Control Register */ |
| 25 | #define ATMEL_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ |
| 26 | #define ATMEL_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ |
| 27 | #define ATMEL_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ |
| 28 | #define ATMEL_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ |
| 29 | |
| 30 | #define ATMEL_PDC_PTSR 0x124 /* Transfer Status Register */ |
| 31 | |
| Ludovic Desroches | 1ebbe3d | 2011-08-11 15:25:46 +0000 | [diff] [blame] | 32 | #define ATMEL_PDC_SCND_BUF_OFF 0x10 /* Offset between first and second buffer registers */ |
| 33 | |
| Andrew Victor | 93a3ddc | 2007-02-08 11:31:22 +0100 | [diff] [blame] | 34 | #endif |