| anish kumar | 805d132 | 2016-02-17 17:28:49 -0800 | [diff] [blame] | 1 | /* |
| 2 | * max9867.h -- MAX9867 ALSA SoC Audio driver |
| 3 | * |
| 4 | * Copyright 2013-2015 Maxim Integrated Products |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #ifndef _MAX9867_H |
| 12 | #define _MAX9867_H |
| 13 | |
| 14 | /* MAX9867 register space */ |
| 15 | |
| 16 | #define MAX9867_STATUS 0x00 |
| 17 | #define MAX9867_JACKSTATUS 0x01 |
| 18 | #define MAX9867_AUXHIGH 0x02 |
| 19 | #define MAX9867_AUXLOW 0x03 |
| 20 | #define MAX9867_INTEN 0x04 |
| 21 | #define MAX9867_SYSCLK 0x05 |
| 22 | #define MAX9867_FREQ_MASK 0xF |
| 23 | #define MAX9867_PSCLK_SHIFT 0x4 |
| 24 | #define MAX9867_PSCLK_WIDTH 0x2 |
| 25 | #define MAX9867_PSCLK_MASK (0x03<<MAX9867_PSCLK_SHIFT) |
| 26 | #define MAX9867_PSCLK_10_20 0x1 |
| 27 | #define MAX9867_PSCLK_20_40 0x2 |
| 28 | #define MAX9867_PSCLK_40_60 0x3 |
| Ladislav Michl | 715ee19 | 2018-12-04 19:21:04 +0100 | [diff] [blame] | 29 | #define MAX9867_AUDIOCLKHIGH 0x06 |
| 30 | #define MAX9867_NI_HIGH_MASK 0x7F |
| 31 | #define MAX9867_NI_LOW_MASK 0xFE |
| 32 | #define MAX9867_PLL (1<<7) |
| 33 | #define MAX9867_AUDIOCLKLOW 0x07 |
| anish kumar | 805d132 | 2016-02-17 17:28:49 -0800 | [diff] [blame] | 34 | #define MAX9867_RAPID_LOCK 0x01 |
| 35 | #define MAX9867_IFC1A 0x08 |
| 36 | #define MAX9867_MASTER (1<<7) |
| 37 | #define MAX9867_I2S_DLY (1<<4) |
| 38 | #define MAX9867_SDOUT_HIZ (1<<3) |
| 39 | #define MAX9867_TDM_MODE (1<<2) |
| 40 | #define MAX9867_WCI_MODE (1<<6) |
| 41 | #define MAX9867_BCI_MODE (1<<5) |
| 42 | #define MAX9867_IFC1B 0x09 |
| 43 | #define MAX9867_IFC1B_BCLK_MASK 7 |
| Ladislav Michl | 715ee19 | 2018-12-04 19:21:04 +0100 | [diff] [blame] | 44 | #define MAX9867_IFC1B_64X 0x01 |
| 45 | #define MAX9867_IFC1B_48X 0x02 |
| 46 | #define MAX9867_IFC1B_PCLK_2 0x04 |
| 47 | #define MAX9867_IFC1B_PCLK_4 0x05 |
| 48 | #define MAX9867_IFC1B_PCLK_8 0x06 |
| 49 | #define MAX9867_IFC1B_PCLK_16 0x07 |
| anish kumar | 805d132 | 2016-02-17 17:28:49 -0800 | [diff] [blame] | 50 | #define MAX9867_CODECFLTR 0x0a |
| Ladislav Michl | bc2610a | 2018-12-04 19:21:33 +0100 | [diff] [blame] | 51 | #define MAX9867_SIDETONE 0x0b |
| anish kumar | 805d132 | 2016-02-17 17:28:49 -0800 | [diff] [blame] | 52 | #define MAX9867_DACLEVEL 0x0c |
| anish kumar | 805d132 | 2016-02-17 17:28:49 -0800 | [diff] [blame] | 53 | #define MAX9867_ADCLEVEL 0x0d |
| 54 | #define MAX9867_LEFTLINELVL 0x0e |
| Ladislav Michl | bc2610a | 2018-12-04 19:21:33 +0100 | [diff] [blame] | 55 | #define MAX9867_RIGHTLINELVL 0x0f |
| anish kumar | 805d132 | 2016-02-17 17:28:49 -0800 | [diff] [blame] | 56 | #define MAX9867_LEFTVOL 0x10 |
| 57 | #define MAX9867_RIGHTVOL 0x11 |
| 58 | #define MAX9867_LEFTMICGAIN 0x12 |
| 59 | #define MAX9867_RIGHTMICGAIN 0x13 |
| 60 | #define MAX9867_INPUTCONFIG 0x14 |
| anish kumar | 805d132 | 2016-02-17 17:28:49 -0800 | [diff] [blame] | 61 | #define MAX9867_MICCONFIG 0x15 |
| 62 | #define MAX9867_MODECONFIG 0x16 |
| 63 | #define MAX9867_PWRMAN 0x17 |
| Ladislav Michl | 29f58ff | 2018-12-04 19:19:51 +0100 | [diff] [blame] | 64 | #define MAX9867_SHTDOWN 0x80 |
| anish kumar | 805d132 | 2016-02-17 17:28:49 -0800 | [diff] [blame] | 65 | #define MAX9867_REVISION 0xff |
| 66 | |
| 67 | #define MAX9867_CACHEREGNUM 10 |
| 68 | |
| anish kumar | 805d132 | 2016-02-17 17:28:49 -0800 | [diff] [blame] | 69 | #endif |