Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 1 | /* |
| 2 | * PCM3168A codec driver |
| 3 | * |
| 4 | * Copyright (C) 2015 Imagination Technologies Ltd. |
| 5 | * |
| 6 | * Author: Damien Horsley <Damien.Horsley@imgtec.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms and conditions of the GNU General Public License, |
| 10 | * version 2, as published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/clk.h> |
| 14 | #include <linux/delay.h> |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/pm_runtime.h> |
| 17 | #include <linux/regulator/consumer.h> |
| 18 | |
| 19 | #include <sound/pcm_params.h> |
| 20 | #include <sound/soc.h> |
| 21 | #include <sound/tlv.h> |
| 22 | |
| 23 | #include "pcm3168a.h" |
| 24 | |
| 25 | #define PCM3168A_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ |
| 26 | SNDRV_PCM_FMTBIT_S24_3LE | \ |
| 27 | SNDRV_PCM_FMTBIT_S24_LE | \ |
| 28 | SNDRV_PCM_FMTBIT_S32_LE) |
| 29 | |
| 30 | #define PCM3168A_FMT_I2S 0x0 |
| 31 | #define PCM3168A_FMT_LEFT_J 0x1 |
| 32 | #define PCM3168A_FMT_RIGHT_J 0x2 |
| 33 | #define PCM3168A_FMT_RIGHT_J_16 0x3 |
| 34 | #define PCM3168A_FMT_DSP_A 0x4 |
| 35 | #define PCM3168A_FMT_DSP_B 0x5 |
Kuninori Morimoto | 471a7ba | 2018-10-12 06:31:49 +0000 | [diff] [blame] | 36 | #define PCM3168A_FMT_I2S_TDM 0x6 |
| 37 | #define PCM3168A_FMT_LEFT_J_TDM 0x7 |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 38 | #define PCM3168A_FMT_DSP_MASK 0x4 |
| 39 | |
| 40 | #define PCM3168A_NUM_SUPPLIES 6 |
| 41 | static const char *const pcm3168a_supply_names[PCM3168A_NUM_SUPPLIES] = { |
| 42 | "VDD1", |
| 43 | "VDD2", |
| 44 | "VCCAD1", |
| 45 | "VCCAD2", |
| 46 | "VCCDA1", |
| 47 | "VCCDA2" |
| 48 | }; |
| 49 | |
| 50 | struct pcm3168a_priv { |
| 51 | struct regulator_bulk_data supplies[PCM3168A_NUM_SUPPLIES]; |
| 52 | struct regmap *regmap; |
| 53 | struct clk *scki; |
| 54 | bool adc_master_mode; |
| 55 | bool dac_master_mode; |
| 56 | unsigned long sysclk; |
| 57 | unsigned int adc_fmt; |
| 58 | unsigned int dac_fmt; |
| 59 | }; |
| 60 | |
| 61 | static const char *const pcm3168a_roll_off[] = { "Sharp", "Slow" }; |
| 62 | |
| 63 | static SOC_ENUM_SINGLE_DECL(pcm3168a_d1_roll_off, PCM3168A_DAC_OP_FLT, |
| 64 | PCM3168A_DAC_FLT_SHIFT, pcm3168a_roll_off); |
| 65 | static SOC_ENUM_SINGLE_DECL(pcm3168a_d2_roll_off, PCM3168A_DAC_OP_FLT, |
| 66 | PCM3168A_DAC_FLT_SHIFT + 1, pcm3168a_roll_off); |
| 67 | static SOC_ENUM_SINGLE_DECL(pcm3168a_d3_roll_off, PCM3168A_DAC_OP_FLT, |
| 68 | PCM3168A_DAC_FLT_SHIFT + 2, pcm3168a_roll_off); |
| 69 | static SOC_ENUM_SINGLE_DECL(pcm3168a_d4_roll_off, PCM3168A_DAC_OP_FLT, |
| 70 | PCM3168A_DAC_FLT_SHIFT + 3, pcm3168a_roll_off); |
| 71 | |
| 72 | static const char *const pcm3168a_volume_type[] = { |
| 73 | "Individual", "Master + Individual" }; |
| 74 | |
| 75 | static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_volume_type, PCM3168A_DAC_ATT_DEMP_ZF, |
| 76 | PCM3168A_DAC_ATMDDA_SHIFT, pcm3168a_volume_type); |
| 77 | |
| 78 | static const char *const pcm3168a_att_speed_mult[] = { "2048", "4096" }; |
| 79 | |
| 80 | static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_att_mult, PCM3168A_DAC_ATT_DEMP_ZF, |
| 81 | PCM3168A_DAC_ATSPDA_SHIFT, pcm3168a_att_speed_mult); |
| 82 | |
| 83 | static const char *const pcm3168a_demp[] = { |
| 84 | "Disabled", "48khz", "44.1khz", "32khz" }; |
| 85 | |
| 86 | static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_demp, PCM3168A_DAC_ATT_DEMP_ZF, |
| 87 | PCM3168A_DAC_DEMP_SHIFT, pcm3168a_demp); |
| 88 | |
| 89 | static const char *const pcm3168a_zf_func[] = { |
| 90 | "DAC 1/2/3/4 AND", "DAC 1/2/3/4 OR", "DAC 1/2/3 AND", |
| 91 | "DAC 1/2/3 OR", "DAC 4 AND", "DAC 4 OR" }; |
| 92 | |
| 93 | static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_zf_func, PCM3168A_DAC_ATT_DEMP_ZF, |
| 94 | PCM3168A_DAC_AZRO_SHIFT, pcm3168a_zf_func); |
| 95 | |
| 96 | static const char *const pcm3168a_pol[] = { "Active High", "Active Low" }; |
| 97 | |
| 98 | static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_zf_pol, PCM3168A_DAC_ATT_DEMP_ZF, |
| 99 | PCM3168A_DAC_ATSPDA_SHIFT, pcm3168a_pol); |
| 100 | |
| 101 | static const char *const pcm3168a_con[] = { "Differential", "Single-Ended" }; |
| 102 | |
| 103 | static SOC_ENUM_DOUBLE_DECL(pcm3168a_adc1_con, PCM3168A_ADC_SEAD, |
| 104 | 0, 1, pcm3168a_con); |
| 105 | static SOC_ENUM_DOUBLE_DECL(pcm3168a_adc2_con, PCM3168A_ADC_SEAD, |
| 106 | 2, 3, pcm3168a_con); |
| 107 | static SOC_ENUM_DOUBLE_DECL(pcm3168a_adc3_con, PCM3168A_ADC_SEAD, |
| 108 | 4, 5, pcm3168a_con); |
| 109 | |
| 110 | static SOC_ENUM_SINGLE_DECL(pcm3168a_adc_volume_type, PCM3168A_ADC_ATT_OVF, |
| 111 | PCM3168A_ADC_ATMDAD_SHIFT, pcm3168a_volume_type); |
| 112 | |
| 113 | static SOC_ENUM_SINGLE_DECL(pcm3168a_adc_att_mult, PCM3168A_ADC_ATT_OVF, |
| 114 | PCM3168A_ADC_ATSPAD_SHIFT, pcm3168a_att_speed_mult); |
| 115 | |
| 116 | static SOC_ENUM_SINGLE_DECL(pcm3168a_adc_ov_pol, PCM3168A_ADC_ATT_OVF, |
| 117 | PCM3168A_ADC_OVFP_SHIFT, pcm3168a_pol); |
| 118 | |
| 119 | /* -100db to 0db, register values 0-54 cause mute */ |
| 120 | static const DECLARE_TLV_DB_SCALE(pcm3168a_dac_tlv, -10050, 50, 1); |
| 121 | |
| 122 | /* -100db to 20db, register values 0-14 cause mute */ |
| 123 | static const DECLARE_TLV_DB_SCALE(pcm3168a_adc_tlv, -10050, 50, 1); |
| 124 | |
| 125 | static const struct snd_kcontrol_new pcm3168a_snd_controls[] = { |
| 126 | SOC_SINGLE("DAC Power-Save Switch", PCM3168A_DAC_PWR_MST_FMT, |
| 127 | PCM3168A_DAC_PSMDA_SHIFT, 1, 1), |
| 128 | SOC_ENUM("DAC1 Digital Filter roll-off", pcm3168a_d1_roll_off), |
| 129 | SOC_ENUM("DAC2 Digital Filter roll-off", pcm3168a_d2_roll_off), |
| 130 | SOC_ENUM("DAC3 Digital Filter roll-off", pcm3168a_d3_roll_off), |
| 131 | SOC_ENUM("DAC4 Digital Filter roll-off", pcm3168a_d4_roll_off), |
| 132 | SOC_DOUBLE("DAC1 Invert Switch", PCM3168A_DAC_INV, 0, 1, 1, 0), |
| 133 | SOC_DOUBLE("DAC2 Invert Switch", PCM3168A_DAC_INV, 2, 3, 1, 0), |
| 134 | SOC_DOUBLE("DAC3 Invert Switch", PCM3168A_DAC_INV, 4, 5, 1, 0), |
| 135 | SOC_DOUBLE("DAC4 Invert Switch", PCM3168A_DAC_INV, 6, 7, 1, 0), |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 136 | SOC_ENUM("DAC Volume Control Type", pcm3168a_dac_volume_type), |
| 137 | SOC_ENUM("DAC Volume Rate Multiplier", pcm3168a_dac_att_mult), |
| 138 | SOC_ENUM("DAC De-Emphasis", pcm3168a_dac_demp), |
| 139 | SOC_ENUM("DAC Zero Flag Function", pcm3168a_dac_zf_func), |
| 140 | SOC_ENUM("DAC Zero Flag Polarity", pcm3168a_dac_zf_pol), |
| 141 | SOC_SINGLE_RANGE_TLV("Master Playback Volume", |
| 142 | PCM3168A_DAC_VOL_MASTER, 0, 54, 255, 0, |
| 143 | pcm3168a_dac_tlv), |
| 144 | SOC_DOUBLE_R_RANGE_TLV("DAC1 Playback Volume", |
| 145 | PCM3168A_DAC_VOL_CHAN_START, |
| 146 | PCM3168A_DAC_VOL_CHAN_START + 1, |
| 147 | 0, 54, 255, 0, pcm3168a_dac_tlv), |
| 148 | SOC_DOUBLE_R_RANGE_TLV("DAC2 Playback Volume", |
| 149 | PCM3168A_DAC_VOL_CHAN_START + 2, |
| 150 | PCM3168A_DAC_VOL_CHAN_START + 3, |
| 151 | 0, 54, 255, 0, pcm3168a_dac_tlv), |
| 152 | SOC_DOUBLE_R_RANGE_TLV("DAC3 Playback Volume", |
| 153 | PCM3168A_DAC_VOL_CHAN_START + 4, |
| 154 | PCM3168A_DAC_VOL_CHAN_START + 5, |
| 155 | 0, 54, 255, 0, pcm3168a_dac_tlv), |
| 156 | SOC_DOUBLE_R_RANGE_TLV("DAC4 Playback Volume", |
| 157 | PCM3168A_DAC_VOL_CHAN_START + 6, |
| 158 | PCM3168A_DAC_VOL_CHAN_START + 7, |
| 159 | 0, 54, 255, 0, pcm3168a_dac_tlv), |
| 160 | SOC_SINGLE("ADC1 High-Pass Filter Switch", PCM3168A_ADC_PWR_HPFB, |
| 161 | PCM3168A_ADC_BYP_SHIFT, 1, 1), |
| 162 | SOC_SINGLE("ADC2 High-Pass Filter Switch", PCM3168A_ADC_PWR_HPFB, |
| 163 | PCM3168A_ADC_BYP_SHIFT + 1, 1, 1), |
| 164 | SOC_SINGLE("ADC3 High-Pass Filter Switch", PCM3168A_ADC_PWR_HPFB, |
| 165 | PCM3168A_ADC_BYP_SHIFT + 2, 1, 1), |
| 166 | SOC_ENUM("ADC1 Connection Type", pcm3168a_adc1_con), |
| 167 | SOC_ENUM("ADC2 Connection Type", pcm3168a_adc2_con), |
| 168 | SOC_ENUM("ADC3 Connection Type", pcm3168a_adc3_con), |
| 169 | SOC_DOUBLE("ADC1 Invert Switch", PCM3168A_ADC_INV, 0, 1, 1, 0), |
| 170 | SOC_DOUBLE("ADC2 Invert Switch", PCM3168A_ADC_INV, 2, 3, 1, 0), |
| 171 | SOC_DOUBLE("ADC3 Invert Switch", PCM3168A_ADC_INV, 4, 5, 1, 0), |
| 172 | SOC_DOUBLE("ADC1 Mute Switch", PCM3168A_ADC_MUTE, 0, 1, 1, 0), |
| 173 | SOC_DOUBLE("ADC2 Mute Switch", PCM3168A_ADC_MUTE, 2, 3, 1, 0), |
| 174 | SOC_DOUBLE("ADC3 Mute Switch", PCM3168A_ADC_MUTE, 4, 5, 1, 0), |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 175 | SOC_ENUM("ADC Volume Control Type", pcm3168a_adc_volume_type), |
| 176 | SOC_ENUM("ADC Volume Rate Multiplier", pcm3168a_adc_att_mult), |
| 177 | SOC_ENUM("ADC Overflow Flag Polarity", pcm3168a_adc_ov_pol), |
| 178 | SOC_SINGLE_RANGE_TLV("Master Capture Volume", |
| 179 | PCM3168A_ADC_VOL_MASTER, 0, 14, 255, 0, |
| 180 | pcm3168a_adc_tlv), |
| 181 | SOC_DOUBLE_R_RANGE_TLV("ADC1 Capture Volume", |
| 182 | PCM3168A_ADC_VOL_CHAN_START, |
| 183 | PCM3168A_ADC_VOL_CHAN_START + 1, |
| 184 | 0, 14, 255, 0, pcm3168a_adc_tlv), |
| 185 | SOC_DOUBLE_R_RANGE_TLV("ADC2 Capture Volume", |
| 186 | PCM3168A_ADC_VOL_CHAN_START + 2, |
| 187 | PCM3168A_ADC_VOL_CHAN_START + 3, |
| 188 | 0, 14, 255, 0, pcm3168a_adc_tlv), |
| 189 | SOC_DOUBLE_R_RANGE_TLV("ADC3 Capture Volume", |
| 190 | PCM3168A_ADC_VOL_CHAN_START + 4, |
| 191 | PCM3168A_ADC_VOL_CHAN_START + 5, |
| 192 | 0, 14, 255, 0, pcm3168a_adc_tlv) |
| 193 | }; |
| 194 | |
| 195 | static const struct snd_soc_dapm_widget pcm3168a_dapm_widgets[] = { |
| 196 | SND_SOC_DAPM_DAC("DAC1", "Playback", PCM3168A_DAC_OP_FLT, |
| 197 | PCM3168A_DAC_OPEDA_SHIFT, 1), |
| 198 | SND_SOC_DAPM_DAC("DAC2", "Playback", PCM3168A_DAC_OP_FLT, |
| 199 | PCM3168A_DAC_OPEDA_SHIFT + 1, 1), |
| 200 | SND_SOC_DAPM_DAC("DAC3", "Playback", PCM3168A_DAC_OP_FLT, |
| 201 | PCM3168A_DAC_OPEDA_SHIFT + 2, 1), |
| 202 | SND_SOC_DAPM_DAC("DAC4", "Playback", PCM3168A_DAC_OP_FLT, |
| 203 | PCM3168A_DAC_OPEDA_SHIFT + 3, 1), |
| 204 | |
| 205 | SND_SOC_DAPM_OUTPUT("AOUT1L"), |
| 206 | SND_SOC_DAPM_OUTPUT("AOUT1R"), |
| 207 | SND_SOC_DAPM_OUTPUT("AOUT2L"), |
| 208 | SND_SOC_DAPM_OUTPUT("AOUT2R"), |
| 209 | SND_SOC_DAPM_OUTPUT("AOUT3L"), |
| 210 | SND_SOC_DAPM_OUTPUT("AOUT3R"), |
| 211 | SND_SOC_DAPM_OUTPUT("AOUT4L"), |
| 212 | SND_SOC_DAPM_OUTPUT("AOUT4R"), |
| 213 | |
| 214 | SND_SOC_DAPM_ADC("ADC1", "Capture", PCM3168A_ADC_PWR_HPFB, |
| 215 | PCM3168A_ADC_PSVAD_SHIFT, 1), |
| 216 | SND_SOC_DAPM_ADC("ADC2", "Capture", PCM3168A_ADC_PWR_HPFB, |
| 217 | PCM3168A_ADC_PSVAD_SHIFT + 1, 1), |
| 218 | SND_SOC_DAPM_ADC("ADC3", "Capture", PCM3168A_ADC_PWR_HPFB, |
| 219 | PCM3168A_ADC_PSVAD_SHIFT + 2, 1), |
| 220 | |
| 221 | SND_SOC_DAPM_INPUT("AIN1L"), |
| 222 | SND_SOC_DAPM_INPUT("AIN1R"), |
| 223 | SND_SOC_DAPM_INPUT("AIN2L"), |
| 224 | SND_SOC_DAPM_INPUT("AIN2R"), |
| 225 | SND_SOC_DAPM_INPUT("AIN3L"), |
| 226 | SND_SOC_DAPM_INPUT("AIN3R") |
| 227 | }; |
| 228 | |
| 229 | static const struct snd_soc_dapm_route pcm3168a_dapm_routes[] = { |
| 230 | /* Playback */ |
| 231 | { "AOUT1L", NULL, "DAC1" }, |
| 232 | { "AOUT1R", NULL, "DAC1" }, |
| 233 | |
| 234 | { "AOUT2L", NULL, "DAC2" }, |
| 235 | { "AOUT2R", NULL, "DAC2" }, |
| 236 | |
| 237 | { "AOUT3L", NULL, "DAC3" }, |
| 238 | { "AOUT3R", NULL, "DAC3" }, |
| 239 | |
| 240 | { "AOUT4L", NULL, "DAC4" }, |
| 241 | { "AOUT4R", NULL, "DAC4" }, |
| 242 | |
| 243 | /* Capture */ |
| 244 | { "ADC1", NULL, "AIN1L" }, |
| 245 | { "ADC1", NULL, "AIN1R" }, |
| 246 | |
| 247 | { "ADC2", NULL, "AIN2L" }, |
| 248 | { "ADC2", NULL, "AIN2R" }, |
| 249 | |
| 250 | { "ADC3", NULL, "AIN3L" }, |
| 251 | { "ADC3", NULL, "AIN3R" } |
| 252 | }; |
| 253 | |
| 254 | static unsigned int pcm3168a_scki_ratios[] = { |
| 255 | 768, |
| 256 | 512, |
| 257 | 384, |
| 258 | 256, |
| 259 | 192, |
| 260 | 128 |
| 261 | }; |
| 262 | |
| 263 | #define PCM3168A_NUM_SCKI_RATIOS_DAC ARRAY_SIZE(pcm3168a_scki_ratios) |
| 264 | #define PCM3168A_NUM_SCKI_RATIOS_ADC (ARRAY_SIZE(pcm3168a_scki_ratios) - 2) |
| 265 | |
| 266 | #define PCM1368A_MAX_SYSCLK 36864000 |
| 267 | |
| 268 | static int pcm3168a_reset(struct pcm3168a_priv *pcm3168a) |
| 269 | { |
| 270 | int ret; |
| 271 | |
| 272 | ret = regmap_write(pcm3168a->regmap, PCM3168A_RST_SMODE, 0); |
| 273 | if (ret) |
| 274 | return ret; |
| 275 | |
| 276 | /* Internal reset is de-asserted after 3846 SCKI cycles */ |
| 277 | msleep(DIV_ROUND_UP(3846 * 1000, pcm3168a->sysclk)); |
| 278 | |
| 279 | return regmap_write(pcm3168a->regmap, PCM3168A_RST_SMODE, |
| 280 | PCM3168A_MRST_MASK | PCM3168A_SRST_MASK); |
| 281 | } |
| 282 | |
| 283 | static int pcm3168a_digital_mute(struct snd_soc_dai *dai, int mute) |
| 284 | { |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 285 | struct snd_soc_component *component = dai->component; |
| 286 | struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 287 | |
| 288 | regmap_write(pcm3168a->regmap, PCM3168A_DAC_MUTE, mute ? 0xff : 0); |
| 289 | |
| 290 | return 0; |
| 291 | } |
| 292 | |
| 293 | static int pcm3168a_set_dai_sysclk(struct snd_soc_dai *dai, |
| 294 | int clk_id, unsigned int freq, int dir) |
| 295 | { |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 296 | struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(dai->component); |
Damien.Horsley | f1188b8 | 2016-01-28 16:54:20 +0000 | [diff] [blame] | 297 | int ret; |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 298 | |
| 299 | if (freq > PCM1368A_MAX_SYSCLK) |
| 300 | return -EINVAL; |
| 301 | |
Damien.Horsley | f1188b8 | 2016-01-28 16:54:20 +0000 | [diff] [blame] | 302 | ret = clk_set_rate(pcm3168a->scki, freq); |
| 303 | if (ret) |
| 304 | return ret; |
| 305 | |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 306 | pcm3168a->sysclk = freq; |
| 307 | |
| 308 | return 0; |
| 309 | } |
| 310 | |
| 311 | static int pcm3168a_set_dai_fmt(struct snd_soc_dai *dai, |
| 312 | unsigned int format, bool dac) |
| 313 | { |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 314 | struct snd_soc_component *component = dai->component; |
| 315 | struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 316 | u32 fmt, reg, mask, shift; |
| 317 | bool master_mode; |
| 318 | |
| 319 | switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 320 | case SND_SOC_DAIFMT_LEFT_J: |
| 321 | fmt = PCM3168A_FMT_LEFT_J; |
| 322 | break; |
| 323 | case SND_SOC_DAIFMT_I2S: |
| 324 | fmt = PCM3168A_FMT_I2S; |
| 325 | break; |
| 326 | case SND_SOC_DAIFMT_RIGHT_J: |
| 327 | fmt = PCM3168A_FMT_RIGHT_J; |
| 328 | break; |
| 329 | case SND_SOC_DAIFMT_DSP_A: |
| 330 | fmt = PCM3168A_FMT_DSP_A; |
| 331 | break; |
| 332 | case SND_SOC_DAIFMT_DSP_B: |
| 333 | fmt = PCM3168A_FMT_DSP_B; |
| 334 | break; |
| 335 | default: |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 336 | dev_err(component->dev, "unsupported dai format\n"); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 337 | return -EINVAL; |
| 338 | } |
| 339 | |
| 340 | switch (format & SND_SOC_DAIFMT_MASTER_MASK) { |
| 341 | case SND_SOC_DAIFMT_CBS_CFS: |
| 342 | master_mode = false; |
| 343 | break; |
| 344 | case SND_SOC_DAIFMT_CBM_CFM: |
| 345 | master_mode = true; |
| 346 | break; |
| 347 | default: |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 348 | dev_err(component->dev, "unsupported master/slave mode\n"); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 349 | return -EINVAL; |
| 350 | } |
| 351 | |
| 352 | switch (format & SND_SOC_DAIFMT_INV_MASK) { |
| 353 | case SND_SOC_DAIFMT_NB_NF: |
| 354 | break; |
| 355 | default: |
| 356 | return -EINVAL; |
| 357 | } |
| 358 | |
| 359 | if (dac) { |
| 360 | reg = PCM3168A_DAC_PWR_MST_FMT; |
| 361 | mask = PCM3168A_DAC_FMT_MASK; |
| 362 | shift = PCM3168A_DAC_FMT_SHIFT; |
| 363 | pcm3168a->dac_master_mode = master_mode; |
| 364 | pcm3168a->dac_fmt = fmt; |
| 365 | } else { |
| 366 | reg = PCM3168A_ADC_MST_FMT; |
| 367 | mask = PCM3168A_ADC_FMTAD_MASK; |
| 368 | shift = PCM3168A_ADC_FMTAD_SHIFT; |
| 369 | pcm3168a->adc_master_mode = master_mode; |
| 370 | pcm3168a->adc_fmt = fmt; |
| 371 | } |
| 372 | |
| 373 | regmap_update_bits(pcm3168a->regmap, reg, mask, fmt << shift); |
| 374 | |
| 375 | return 0; |
| 376 | } |
| 377 | |
| 378 | static int pcm3168a_set_dai_fmt_dac(struct snd_soc_dai *dai, |
| 379 | unsigned int format) |
| 380 | { |
| 381 | return pcm3168a_set_dai_fmt(dai, format, true); |
| 382 | } |
| 383 | |
| 384 | static int pcm3168a_set_dai_fmt_adc(struct snd_soc_dai *dai, |
| 385 | unsigned int format) |
| 386 | { |
| 387 | return pcm3168a_set_dai_fmt(dai, format, false); |
| 388 | } |
| 389 | |
| 390 | static int pcm3168a_hw_params(struct snd_pcm_substream *substream, |
| 391 | struct snd_pcm_hw_params *params, |
| 392 | struct snd_soc_dai *dai) |
| 393 | { |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 394 | struct snd_soc_component *component = dai->component; |
| 395 | struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 396 | bool tx, master_mode; |
| 397 | u32 val, mask, shift, reg; |
Sudip Mukherjee | e7a508f | 2016-03-04 16:27:14 +0530 | [diff] [blame] | 398 | unsigned int rate, fmt, ratio, max_ratio; |
Kuninori Morimoto | 471a7ba | 2018-10-12 06:31:49 +0000 | [diff] [blame] | 399 | unsigned int chan; |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 400 | int i, min_frame_size; |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 401 | |
| 402 | rate = params_rate(params); |
Kuninori Morimoto | 471a7ba | 2018-10-12 06:31:49 +0000 | [diff] [blame] | 403 | chan = params_channels(params); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 404 | |
| 405 | ratio = pcm3168a->sysclk / rate; |
| 406 | |
| 407 | tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; |
| 408 | if (tx) { |
| 409 | max_ratio = PCM3168A_NUM_SCKI_RATIOS_DAC; |
| 410 | reg = PCM3168A_DAC_PWR_MST_FMT; |
| 411 | mask = PCM3168A_DAC_MSDA_MASK; |
| 412 | shift = PCM3168A_DAC_MSDA_SHIFT; |
| 413 | master_mode = pcm3168a->dac_master_mode; |
| 414 | fmt = pcm3168a->dac_fmt; |
| 415 | } else { |
| 416 | max_ratio = PCM3168A_NUM_SCKI_RATIOS_ADC; |
| 417 | reg = PCM3168A_ADC_MST_FMT; |
| 418 | mask = PCM3168A_ADC_MSAD_MASK; |
| 419 | shift = PCM3168A_ADC_MSAD_SHIFT; |
| 420 | master_mode = pcm3168a->adc_master_mode; |
| 421 | fmt = pcm3168a->adc_fmt; |
| 422 | } |
| 423 | |
| 424 | for (i = 0; i < max_ratio; i++) { |
| 425 | if (pcm3168a_scki_ratios[i] == ratio) |
| 426 | break; |
| 427 | } |
| 428 | |
| 429 | if (i == max_ratio) { |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 430 | dev_err(component->dev, "unsupported sysclk ratio\n"); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 431 | return -EINVAL; |
| 432 | } |
| 433 | |
| 434 | min_frame_size = params_width(params) * 2; |
| 435 | switch (min_frame_size) { |
| 436 | case 32: |
| 437 | if (master_mode || (fmt != PCM3168A_FMT_RIGHT_J)) { |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 438 | dev_err(component->dev, "32-bit frames are supported only for slave mode using right justified\n"); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 439 | return -EINVAL; |
| 440 | } |
| 441 | fmt = PCM3168A_FMT_RIGHT_J_16; |
| 442 | break; |
| 443 | case 48: |
| 444 | if (master_mode || (fmt & PCM3168A_FMT_DSP_MASK)) { |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 445 | dev_err(component->dev, "48-bit frames not supported in master mode, or slave mode using DSP\n"); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 446 | return -EINVAL; |
| 447 | } |
| 448 | break; |
| 449 | case 64: |
| 450 | break; |
| 451 | default: |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 452 | dev_err(component->dev, "unsupported frame size: %d\n", min_frame_size); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 453 | return -EINVAL; |
| 454 | } |
| 455 | |
Kuninori Morimoto | 471a7ba | 2018-10-12 06:31:49 +0000 | [diff] [blame] | 456 | /* for TDM */ |
| 457 | if (chan > 2) { |
| 458 | switch (fmt) { |
| 459 | case PCM3168A_FMT_I2S: |
Peter Ujfalusi | 5011454 | 2019-04-17 14:31:40 +0300 | [diff] [blame] | 460 | case PCM3168A_FMT_DSP_A: |
Kuninori Morimoto | 471a7ba | 2018-10-12 06:31:49 +0000 | [diff] [blame] | 461 | fmt = PCM3168A_FMT_I2S_TDM; |
| 462 | break; |
| 463 | case PCM3168A_FMT_LEFT_J: |
Peter Ujfalusi | 5011454 | 2019-04-17 14:31:40 +0300 | [diff] [blame] | 464 | case PCM3168A_FMT_DSP_B: |
Kuninori Morimoto | 471a7ba | 2018-10-12 06:31:49 +0000 | [diff] [blame] | 465 | fmt = PCM3168A_FMT_LEFT_J_TDM; |
| 466 | break; |
| 467 | default: |
Peter Ujfalusi | 5011454 | 2019-04-17 14:31:40 +0300 | [diff] [blame] | 468 | dev_err(component->dev, |
| 469 | "TDM is supported under DSP/I2S/Left_J only\n"); |
Kuninori Morimoto | 471a7ba | 2018-10-12 06:31:49 +0000 | [diff] [blame] | 470 | return -EINVAL; |
| 471 | } |
| 472 | } |
| 473 | |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 474 | if (master_mode) |
| 475 | val = ((i + 1) << shift); |
| 476 | else |
| 477 | val = 0; |
| 478 | |
| 479 | regmap_update_bits(pcm3168a->regmap, reg, mask, val); |
| 480 | |
| 481 | if (tx) { |
| 482 | mask = PCM3168A_DAC_FMT_MASK; |
| 483 | shift = PCM3168A_DAC_FMT_SHIFT; |
| 484 | } else { |
| 485 | mask = PCM3168A_ADC_FMTAD_MASK; |
| 486 | shift = PCM3168A_ADC_FMTAD_SHIFT; |
| 487 | } |
| 488 | |
| 489 | regmap_update_bits(pcm3168a->regmap, reg, mask, fmt << shift); |
| 490 | |
| 491 | return 0; |
| 492 | } |
| 493 | |
Kuninori Morimoto | 3809688 | 2018-10-12 06:31:00 +0000 | [diff] [blame] | 494 | static int pcm3168a_startup(struct snd_pcm_substream *substream, |
| 495 | struct snd_soc_dai *dai) |
| 496 | { |
| 497 | struct snd_soc_component *component = dai->component; |
| 498 | struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component); |
| 499 | bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; |
| 500 | unsigned int fmt; |
| 501 | unsigned int sample_min; |
Kuninori Morimoto | 594680e | 2018-10-12 06:31:18 +0000 | [diff] [blame] | 502 | unsigned int channel_max; |
Kuninori Morimoto | 0900d1e | 2018-10-30 07:31:40 +0000 | [diff] [blame] | 503 | unsigned int channel_maxs[] = { |
| 504 | 6, /* rx */ |
| 505 | 8 /* tx */ |
| 506 | }; |
Kuninori Morimoto | 3809688 | 2018-10-12 06:31:00 +0000 | [diff] [blame] | 507 | |
| 508 | if (tx) |
| 509 | fmt = pcm3168a->dac_fmt; |
| 510 | else |
| 511 | fmt = pcm3168a->adc_fmt; |
| 512 | |
| 513 | /* |
| 514 | * Available Data Bits |
| 515 | * |
| 516 | * RIGHT_J : 24 / 16 |
| 517 | * LEFT_J : 24 |
| 518 | * I2S : 24 |
Kuninori Morimoto | 594680e | 2018-10-12 06:31:18 +0000 | [diff] [blame] | 519 | * |
| 520 | * TDM available |
| 521 | * |
| 522 | * I2S |
| 523 | * LEFT_J |
Kuninori Morimoto | 3809688 | 2018-10-12 06:31:00 +0000 | [diff] [blame] | 524 | */ |
| 525 | switch (fmt) { |
| 526 | case PCM3168A_FMT_RIGHT_J: |
| 527 | sample_min = 16; |
Kuninori Morimoto | 594680e | 2018-10-12 06:31:18 +0000 | [diff] [blame] | 528 | channel_max = 2; |
| 529 | break; |
| 530 | case PCM3168A_FMT_LEFT_J: |
Kuninori Morimoto | 594680e | 2018-10-12 06:31:18 +0000 | [diff] [blame] | 531 | case PCM3168A_FMT_I2S: |
Peter Ujfalusi | 5011454 | 2019-04-17 14:31:40 +0300 | [diff] [blame] | 532 | case PCM3168A_FMT_DSP_A: |
| 533 | case PCM3168A_FMT_DSP_B: |
Kuninori Morimoto | 594680e | 2018-10-12 06:31:18 +0000 | [diff] [blame] | 534 | sample_min = 24; |
Kuninori Morimoto | 0900d1e | 2018-10-30 07:31:40 +0000 | [diff] [blame] | 535 | channel_max = channel_maxs[tx]; |
Kuninori Morimoto | 3809688 | 2018-10-12 06:31:00 +0000 | [diff] [blame] | 536 | break; |
| 537 | default: |
| 538 | sample_min = 24; |
Kuninori Morimoto | 594680e | 2018-10-12 06:31:18 +0000 | [diff] [blame] | 539 | channel_max = 2; |
Kuninori Morimoto | 3809688 | 2018-10-12 06:31:00 +0000 | [diff] [blame] | 540 | } |
| 541 | |
| 542 | snd_pcm_hw_constraint_minmax(substream->runtime, |
| 543 | SNDRV_PCM_HW_PARAM_SAMPLE_BITS, |
| 544 | sample_min, 32); |
| 545 | |
Kuninori Morimoto | 594680e | 2018-10-12 06:31:18 +0000 | [diff] [blame] | 546 | snd_pcm_hw_constraint_minmax(substream->runtime, |
| 547 | SNDRV_PCM_HW_PARAM_CHANNELS, |
| 548 | 2, channel_max); |
| 549 | |
Kuninori Morimoto | 3809688 | 2018-10-12 06:31:00 +0000 | [diff] [blame] | 550 | return 0; |
| 551 | } |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 552 | static const struct snd_soc_dai_ops pcm3168a_dac_dai_ops = { |
Kuninori Morimoto | 3809688 | 2018-10-12 06:31:00 +0000 | [diff] [blame] | 553 | .startup = pcm3168a_startup, |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 554 | .set_fmt = pcm3168a_set_dai_fmt_dac, |
| 555 | .set_sysclk = pcm3168a_set_dai_sysclk, |
| 556 | .hw_params = pcm3168a_hw_params, |
| 557 | .digital_mute = pcm3168a_digital_mute |
| 558 | }; |
| 559 | |
| 560 | static const struct snd_soc_dai_ops pcm3168a_adc_dai_ops = { |
Kuninori Morimoto | 4e9e07c | 2018-10-17 01:54:33 +0000 | [diff] [blame] | 561 | .startup = pcm3168a_startup, |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 562 | .set_fmt = pcm3168a_set_dai_fmt_adc, |
| 563 | .set_sysclk = pcm3168a_set_dai_sysclk, |
| 564 | .hw_params = pcm3168a_hw_params |
| 565 | }; |
| 566 | |
| 567 | static struct snd_soc_dai_driver pcm3168a_dais[] = { |
| 568 | { |
| 569 | .name = "pcm3168a-dac", |
| 570 | .playback = { |
| 571 | .stream_name = "Playback", |
| 572 | .channels_min = 1, |
| 573 | .channels_max = 8, |
| 574 | .rates = SNDRV_PCM_RATE_8000_192000, |
| 575 | .formats = PCM3168A_FORMATS |
| 576 | }, |
| 577 | .ops = &pcm3168a_dac_dai_ops |
| 578 | }, |
| 579 | { |
| 580 | .name = "pcm3168a-adc", |
| 581 | .capture = { |
| 582 | .stream_name = "Capture", |
| 583 | .channels_min = 1, |
| 584 | .channels_max = 6, |
| 585 | .rates = SNDRV_PCM_RATE_8000_96000, |
| 586 | .formats = PCM3168A_FORMATS |
| 587 | }, |
| 588 | .ops = &pcm3168a_adc_dai_ops |
| 589 | }, |
| 590 | }; |
| 591 | |
| 592 | static const struct reg_default pcm3168a_reg_default[] = { |
| 593 | { PCM3168A_RST_SMODE, PCM3168A_MRST_MASK | PCM3168A_SRST_MASK }, |
| 594 | { PCM3168A_DAC_PWR_MST_FMT, 0x00 }, |
| 595 | { PCM3168A_DAC_OP_FLT, 0x00 }, |
| 596 | { PCM3168A_DAC_INV, 0x00 }, |
| 597 | { PCM3168A_DAC_MUTE, 0x00 }, |
| 598 | { PCM3168A_DAC_ZERO, 0x00 }, |
| 599 | { PCM3168A_DAC_ATT_DEMP_ZF, 0x00 }, |
| 600 | { PCM3168A_DAC_VOL_MASTER, 0xff }, |
| 601 | { PCM3168A_DAC_VOL_CHAN_START, 0xff }, |
| 602 | { PCM3168A_DAC_VOL_CHAN_START + 1, 0xff }, |
| 603 | { PCM3168A_DAC_VOL_CHAN_START + 2, 0xff }, |
| 604 | { PCM3168A_DAC_VOL_CHAN_START + 3, 0xff }, |
| 605 | { PCM3168A_DAC_VOL_CHAN_START + 4, 0xff }, |
| 606 | { PCM3168A_DAC_VOL_CHAN_START + 5, 0xff }, |
| 607 | { PCM3168A_DAC_VOL_CHAN_START + 6, 0xff }, |
| 608 | { PCM3168A_DAC_VOL_CHAN_START + 7, 0xff }, |
| 609 | { PCM3168A_ADC_SMODE, 0x00 }, |
| 610 | { PCM3168A_ADC_MST_FMT, 0x00 }, |
| 611 | { PCM3168A_ADC_PWR_HPFB, 0x00 }, |
| 612 | { PCM3168A_ADC_SEAD, 0x00 }, |
| 613 | { PCM3168A_ADC_INV, 0x00 }, |
| 614 | { PCM3168A_ADC_MUTE, 0x00 }, |
| 615 | { PCM3168A_ADC_OV, 0x00 }, |
| 616 | { PCM3168A_ADC_ATT_OVF, 0x00 }, |
| 617 | { PCM3168A_ADC_VOL_MASTER, 0xd3 }, |
| 618 | { PCM3168A_ADC_VOL_CHAN_START, 0xd3 }, |
| 619 | { PCM3168A_ADC_VOL_CHAN_START + 1, 0xd3 }, |
| 620 | { PCM3168A_ADC_VOL_CHAN_START + 2, 0xd3 }, |
| 621 | { PCM3168A_ADC_VOL_CHAN_START + 3, 0xd3 }, |
| 622 | { PCM3168A_ADC_VOL_CHAN_START + 4, 0xd3 }, |
| 623 | { PCM3168A_ADC_VOL_CHAN_START + 5, 0xd3 } |
| 624 | }; |
| 625 | |
| 626 | static bool pcm3168a_readable_register(struct device *dev, unsigned int reg) |
| 627 | { |
| 628 | if (reg >= PCM3168A_RST_SMODE) |
| 629 | return true; |
| 630 | else |
| 631 | return false; |
| 632 | } |
| 633 | |
| 634 | static bool pcm3168a_volatile_register(struct device *dev, unsigned int reg) |
| 635 | { |
| 636 | switch (reg) { |
| 637 | case PCM3168A_DAC_ZERO: |
| 638 | case PCM3168A_ADC_OV: |
| 639 | return true; |
| 640 | default: |
| 641 | return false; |
| 642 | } |
| 643 | } |
| 644 | |
| 645 | static bool pcm3168a_writeable_register(struct device *dev, unsigned int reg) |
| 646 | { |
| 647 | if (reg < PCM3168A_RST_SMODE) |
| 648 | return false; |
| 649 | |
| 650 | switch (reg) { |
| 651 | case PCM3168A_DAC_ZERO: |
| 652 | case PCM3168A_ADC_OV: |
| 653 | return false; |
| 654 | default: |
| 655 | return true; |
| 656 | } |
| 657 | } |
| 658 | |
| 659 | const struct regmap_config pcm3168a_regmap = { |
| 660 | .reg_bits = 8, |
| 661 | .val_bits = 8, |
| 662 | |
| 663 | .max_register = PCM3168A_ADC_VOL_CHAN_START + 5, |
| 664 | .reg_defaults = pcm3168a_reg_default, |
| 665 | .num_reg_defaults = ARRAY_SIZE(pcm3168a_reg_default), |
| 666 | .readable_reg = pcm3168a_readable_register, |
| 667 | .volatile_reg = pcm3168a_volatile_register, |
| 668 | .writeable_reg = pcm3168a_writeable_register, |
| 669 | .cache_type = REGCACHE_FLAT |
| 670 | }; |
| 671 | EXPORT_SYMBOL_GPL(pcm3168a_regmap); |
| 672 | |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 673 | static const struct snd_soc_component_driver pcm3168a_driver = { |
| 674 | .controls = pcm3168a_snd_controls, |
| 675 | .num_controls = ARRAY_SIZE(pcm3168a_snd_controls), |
| 676 | .dapm_widgets = pcm3168a_dapm_widgets, |
| 677 | .num_dapm_widgets = ARRAY_SIZE(pcm3168a_dapm_widgets), |
| 678 | .dapm_routes = pcm3168a_dapm_routes, |
| 679 | .num_dapm_routes = ARRAY_SIZE(pcm3168a_dapm_routes), |
| 680 | .use_pmdown_time = 1, |
| 681 | .endianness = 1, |
| 682 | .non_legacy_dai_naming = 1, |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 683 | }; |
| 684 | |
| 685 | int pcm3168a_probe(struct device *dev, struct regmap *regmap) |
| 686 | { |
| 687 | struct pcm3168a_priv *pcm3168a; |
| 688 | int ret, i; |
| 689 | |
| 690 | pcm3168a = devm_kzalloc(dev, sizeof(*pcm3168a), GFP_KERNEL); |
| 691 | if (pcm3168a == NULL) |
| 692 | return -ENOMEM; |
| 693 | |
| 694 | dev_set_drvdata(dev, pcm3168a); |
| 695 | |
| 696 | pcm3168a->scki = devm_clk_get(dev, "scki"); |
| 697 | if (IS_ERR(pcm3168a->scki)) { |
| 698 | ret = PTR_ERR(pcm3168a->scki); |
| 699 | if (ret != -EPROBE_DEFER) |
| 700 | dev_err(dev, "failed to acquire clock 'scki': %d\n", ret); |
| 701 | return ret; |
| 702 | } |
| 703 | |
| 704 | ret = clk_prepare_enable(pcm3168a->scki); |
| 705 | if (ret) { |
| 706 | dev_err(dev, "Failed to enable mclk: %d\n", ret); |
| 707 | return ret; |
| 708 | } |
| 709 | |
| 710 | pcm3168a->sysclk = clk_get_rate(pcm3168a->scki); |
| 711 | |
| 712 | for (i = 0; i < ARRAY_SIZE(pcm3168a->supplies); i++) |
| 713 | pcm3168a->supplies[i].supply = pcm3168a_supply_names[i]; |
| 714 | |
| 715 | ret = devm_regulator_bulk_get(dev, |
| 716 | ARRAY_SIZE(pcm3168a->supplies), pcm3168a->supplies); |
| 717 | if (ret) { |
| 718 | if (ret != -EPROBE_DEFER) |
| 719 | dev_err(dev, "failed to request supplies: %d\n", ret); |
| 720 | goto err_clk; |
| 721 | } |
| 722 | |
| 723 | ret = regulator_bulk_enable(ARRAY_SIZE(pcm3168a->supplies), |
| 724 | pcm3168a->supplies); |
| 725 | if (ret) { |
| 726 | dev_err(dev, "failed to enable supplies: %d\n", ret); |
| 727 | goto err_clk; |
| 728 | } |
| 729 | |
| 730 | pcm3168a->regmap = regmap; |
| 731 | if (IS_ERR(pcm3168a->regmap)) { |
| 732 | ret = PTR_ERR(pcm3168a->regmap); |
| 733 | dev_err(dev, "failed to allocate regmap: %d\n", ret); |
| 734 | goto err_regulator; |
| 735 | } |
| 736 | |
| 737 | ret = pcm3168a_reset(pcm3168a); |
| 738 | if (ret) { |
| 739 | dev_err(dev, "Failed to reset device: %d\n", ret); |
| 740 | goto err_regulator; |
| 741 | } |
| 742 | |
| 743 | pm_runtime_set_active(dev); |
| 744 | pm_runtime_enable(dev); |
| 745 | pm_runtime_idle(dev); |
| 746 | |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 747 | ret = devm_snd_soc_register_component(dev, &pcm3168a_driver, pcm3168a_dais, |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 748 | ARRAY_SIZE(pcm3168a_dais)); |
| 749 | if (ret) { |
Kuninori Morimoto | 29751c1 | 2018-01-29 04:19:39 +0000 | [diff] [blame] | 750 | dev_err(dev, "failed to register component: %d\n", ret); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 751 | goto err_regulator; |
| 752 | } |
| 753 | |
| 754 | return 0; |
| 755 | |
| 756 | err_regulator: |
| 757 | regulator_bulk_disable(ARRAY_SIZE(pcm3168a->supplies), |
| 758 | pcm3168a->supplies); |
| 759 | err_clk: |
| 760 | clk_disable_unprepare(pcm3168a->scki); |
| 761 | |
| 762 | return ret; |
| 763 | } |
| 764 | EXPORT_SYMBOL_GPL(pcm3168a_probe); |
| 765 | |
Jiada Wang | 489db5d | 2018-11-28 21:26:12 +0900 | [diff] [blame] | 766 | static void pcm3168a_disable(struct device *dev) |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 767 | { |
| 768 | struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev); |
| 769 | |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 770 | regulator_bulk_disable(ARRAY_SIZE(pcm3168a->supplies), |
Jiada Wang | 489db5d | 2018-11-28 21:26:12 +0900 | [diff] [blame] | 771 | pcm3168a->supplies); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 772 | clk_disable_unprepare(pcm3168a->scki); |
| 773 | } |
Jiada Wang | 489db5d | 2018-11-28 21:26:12 +0900 | [diff] [blame] | 774 | |
| 775 | void pcm3168a_remove(struct device *dev) |
| 776 | { |
| 777 | pm_runtime_disable(dev); |
| 778 | #ifndef CONFIG_PM |
| 779 | pcm3168a_disable(dev); |
| 780 | #endif |
| 781 | } |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 782 | EXPORT_SYMBOL_GPL(pcm3168a_remove); |
| 783 | |
| 784 | #ifdef CONFIG_PM |
| 785 | static int pcm3168a_rt_resume(struct device *dev) |
| 786 | { |
| 787 | struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev); |
| 788 | int ret; |
| 789 | |
| 790 | ret = clk_prepare_enable(pcm3168a->scki); |
| 791 | if (ret) { |
| 792 | dev_err(dev, "Failed to enable mclk: %d\n", ret); |
| 793 | return ret; |
| 794 | } |
| 795 | |
| 796 | ret = regulator_bulk_enable(ARRAY_SIZE(pcm3168a->supplies), |
| 797 | pcm3168a->supplies); |
| 798 | if (ret) { |
| 799 | dev_err(dev, "Failed to enable supplies: %d\n", ret); |
| 800 | goto err_clk; |
| 801 | } |
| 802 | |
| 803 | ret = pcm3168a_reset(pcm3168a); |
| 804 | if (ret) { |
| 805 | dev_err(dev, "Failed to reset device: %d\n", ret); |
| 806 | goto err_regulator; |
| 807 | } |
| 808 | |
| 809 | regcache_cache_only(pcm3168a->regmap, false); |
| 810 | |
| 811 | regcache_mark_dirty(pcm3168a->regmap); |
| 812 | |
| 813 | ret = regcache_sync(pcm3168a->regmap); |
| 814 | if (ret) { |
| 815 | dev_err(dev, "Failed to sync regmap: %d\n", ret); |
| 816 | goto err_regulator; |
| 817 | } |
| 818 | |
| 819 | return 0; |
| 820 | |
| 821 | err_regulator: |
| 822 | regulator_bulk_disable(ARRAY_SIZE(pcm3168a->supplies), |
| 823 | pcm3168a->supplies); |
| 824 | err_clk: |
| 825 | clk_disable_unprepare(pcm3168a->scki); |
| 826 | |
| 827 | return ret; |
| 828 | } |
| 829 | |
| 830 | static int pcm3168a_rt_suspend(struct device *dev) |
| 831 | { |
| 832 | struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev); |
| 833 | |
| 834 | regcache_cache_only(pcm3168a->regmap, true); |
| 835 | |
Jiada Wang | 489db5d | 2018-11-28 21:26:12 +0900 | [diff] [blame] | 836 | pcm3168a_disable(dev); |
Damien.Horsley | a9b17a6 | 2015-12-08 15:59:00 +0000 | [diff] [blame] | 837 | |
| 838 | return 0; |
| 839 | } |
| 840 | #endif |
| 841 | |
| 842 | const struct dev_pm_ops pcm3168a_pm_ops = { |
| 843 | SET_RUNTIME_PM_OPS(pcm3168a_rt_suspend, pcm3168a_rt_resume, NULL) |
| 844 | }; |
| 845 | EXPORT_SYMBOL_GPL(pcm3168a_pm_ops); |
| 846 | |
| 847 | MODULE_DESCRIPTION("PCM3168A codec driver"); |
| 848 | MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>"); |
| 849 | MODULE_LICENSE("GPL v2"); |