Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Jon Medhurst | 0ab4c02 | 2011-07-06 11:25:18 +0100 | [diff] [blame] | 2 | /* |
Wang Nan | fca08f3 | 2015-01-09 10:19:49 +0800 | [diff] [blame] | 3 | * arch/arm/probes/kprobes/actions-common.c |
Jon Medhurst | 0ab4c02 | 2011-07-06 11:25:18 +0100 | [diff] [blame] | 4 | * |
| 5 | * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>. |
| 6 | * |
Jon Medhurst | 6c8df33 | 2011-07-07 10:21:40 +0100 | [diff] [blame] | 7 | * Some contents moved here from arch/arm/include/asm/kprobes-arm.c which is |
| 8 | * Copyright (C) 2006, 2007 Motorola Inc. |
Jon Medhurst | 0ab4c02 | 2011-07-06 11:25:18 +0100 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/kprobes.h> |
Ben Dooks | 888be25 | 2013-11-08 18:29:25 +0000 | [diff] [blame] | 13 | #include <asm/opcodes.h> |
Jon Medhurst | 0ab4c02 | 2011-07-06 11:25:18 +0100 | [diff] [blame] | 14 | |
Wang Nan | fca08f3 | 2015-01-09 10:19:49 +0800 | [diff] [blame] | 15 | #include "core.h" |
Jon Medhurst | 0ab4c02 | 2011-07-06 11:25:18 +0100 | [diff] [blame] | 16 | |
| 17 | |
David A. Long | f145d66 | 2014-03-05 21:17:23 -0500 | [diff] [blame] | 18 | static void __kprobes simulate_ldm1stm1(probes_opcode_t insn, |
David A. Long | b4cd605 | 2014-03-05 21:41:29 -0500 | [diff] [blame] | 19 | struct arch_probes_insn *asi, |
David A. Long | 7579f4b3 | 2014-03-07 11:19:32 -0500 | [diff] [blame] | 20 | struct pt_regs *regs) |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 21 | { |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 22 | int rn = (insn >> 16) & 0xf; |
| 23 | int lbit = insn & (1 << 20); |
| 24 | int wbit = insn & (1 << 21); |
| 25 | int ubit = insn & (1 << 23); |
| 26 | int pbit = insn & (1 << 24); |
| 27 | long *addr = (long *)regs->uregs[rn]; |
| 28 | int reg_bit_vector; |
| 29 | int reg_count; |
| 30 | |
| 31 | reg_count = 0; |
| 32 | reg_bit_vector = insn & 0xffff; |
| 33 | while (reg_bit_vector) { |
| 34 | reg_bit_vector &= (reg_bit_vector - 1); |
| 35 | ++reg_count; |
| 36 | } |
| 37 | |
| 38 | if (!ubit) |
| 39 | addr -= reg_count; |
| 40 | addr += (!pbit == !ubit); |
| 41 | |
| 42 | reg_bit_vector = insn & 0xffff; |
| 43 | while (reg_bit_vector) { |
| 44 | int reg = __ffs(reg_bit_vector); |
| 45 | reg_bit_vector &= (reg_bit_vector - 1); |
| 46 | if (lbit) |
| 47 | regs->uregs[reg] = *addr++; |
| 48 | else |
| 49 | *addr++ = regs->uregs[reg]; |
| 50 | } |
| 51 | |
| 52 | if (wbit) { |
| 53 | if (!ubit) |
| 54 | addr -= reg_count; |
| 55 | addr -= (!pbit == !ubit); |
| 56 | regs->uregs[rn] = (long)addr; |
| 57 | } |
| 58 | } |
| 59 | |
David A. Long | f145d66 | 2014-03-05 21:17:23 -0500 | [diff] [blame] | 60 | static void __kprobes simulate_stm1_pc(probes_opcode_t insn, |
David A. Long | b4cd605 | 2014-03-05 21:41:29 -0500 | [diff] [blame] | 61 | struct arch_probes_insn *asi, |
David A. Long | 7579f4b3 | 2014-03-07 11:19:32 -0500 | [diff] [blame] | 62 | struct pt_regs *regs) |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 63 | { |
David A. Long | 7579f4b3 | 2014-03-07 11:19:32 -0500 | [diff] [blame] | 64 | unsigned long addr = regs->ARM_pc - 4; |
| 65 | |
| 66 | regs->ARM_pc = (long)addr + str_pc_offset; |
| 67 | simulate_ldm1stm1(insn, asi, regs); |
| 68 | regs->ARM_pc = (long)addr + 4; |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 69 | } |
| 70 | |
David A. Long | f145d66 | 2014-03-05 21:17:23 -0500 | [diff] [blame] | 71 | static void __kprobes simulate_ldm1_pc(probes_opcode_t insn, |
David A. Long | b4cd605 | 2014-03-05 21:41:29 -0500 | [diff] [blame] | 72 | struct arch_probes_insn *asi, |
David A. Long | 7579f4b3 | 2014-03-07 11:19:32 -0500 | [diff] [blame] | 73 | struct pt_regs *regs) |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 74 | { |
David A. Long | 7579f4b3 | 2014-03-07 11:19:32 -0500 | [diff] [blame] | 75 | simulate_ldm1stm1(insn, asi, regs); |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 76 | load_write_pc(regs->ARM_pc, regs); |
| 77 | } |
| 78 | |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 79 | static void __kprobes |
David A. Long | f145d66 | 2014-03-05 21:17:23 -0500 | [diff] [blame] | 80 | emulate_generic_r0_12_noflags(probes_opcode_t insn, |
David A. Long | b4cd605 | 2014-03-05 21:41:29 -0500 | [diff] [blame] | 81 | struct arch_probes_insn *asi, struct pt_regs *regs) |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 82 | { |
| 83 | register void *rregs asm("r1") = regs; |
David A. Long | 7579f4b3 | 2014-03-07 11:19:32 -0500 | [diff] [blame] | 84 | register void *rfn asm("lr") = asi->insn_fn; |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 85 | |
| 86 | __asm__ __volatile__ ( |
| 87 | "stmdb sp!, {%[regs], r11} \n\t" |
| 88 | "ldmia %[regs], {r0-r12} \n\t" |
| 89 | #if __LINUX_ARM_ARCH__ >= 6 |
| 90 | "blx %[fn] \n\t" |
| 91 | #else |
| 92 | "str %[fn], [sp, #-4]! \n\t" |
| 93 | "adr lr, 1f \n\t" |
| 94 | "ldr pc, [sp], #4 \n\t" |
| 95 | "1: \n\t" |
| 96 | #endif |
| 97 | "ldr lr, [sp], #4 \n\t" /* lr = regs */ |
| 98 | "stmia lr, {r0-r12} \n\t" |
| 99 | "ldr r11, [sp], #4 \n\t" |
| 100 | : [regs] "=r" (rregs), [fn] "=r" (rfn) |
| 101 | : "0" (rregs), "1" (rfn) |
| 102 | : "r0", "r2", "r3", "r4", "r5", "r6", "r7", |
| 103 | "r8", "r9", "r10", "r12", "memory", "cc" |
| 104 | ); |
| 105 | } |
| 106 | |
| 107 | static void __kprobes |
David A. Long | f145d66 | 2014-03-05 21:17:23 -0500 | [diff] [blame] | 108 | emulate_generic_r2_14_noflags(probes_opcode_t insn, |
David A. Long | b4cd605 | 2014-03-05 21:41:29 -0500 | [diff] [blame] | 109 | struct arch_probes_insn *asi, struct pt_regs *regs) |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 110 | { |
David A. Long | 7579f4b3 | 2014-03-07 11:19:32 -0500 | [diff] [blame] | 111 | emulate_generic_r0_12_noflags(insn, asi, |
| 112 | (struct pt_regs *)(regs->uregs+2)); |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 113 | } |
| 114 | |
| 115 | static void __kprobes |
David A. Long | f145d66 | 2014-03-05 21:17:23 -0500 | [diff] [blame] | 116 | emulate_ldm_r3_15(probes_opcode_t insn, |
David A. Long | b4cd605 | 2014-03-05 21:41:29 -0500 | [diff] [blame] | 117 | struct arch_probes_insn *asi, struct pt_regs *regs) |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 118 | { |
David A. Long | 7579f4b3 | 2014-03-07 11:19:32 -0500 | [diff] [blame] | 119 | emulate_generic_r0_12_noflags(insn, asi, |
| 120 | (struct pt_regs *)(regs->uregs+3)); |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 121 | load_write_pc(regs->ARM_pc, regs); |
| 122 | } |
| 123 | |
David A. Long | 44a0a59 | 2014-03-05 21:23:42 -0500 | [diff] [blame] | 124 | enum probes_insn __kprobes |
David A. Long | b4cd605 | 2014-03-05 21:41:29 -0500 | [diff] [blame] | 125 | kprobe_decode_ldmstm(probes_opcode_t insn, struct arch_probes_insn *asi, |
David A. Long | 3e6cd39 | 2014-03-06 18:06:43 -0500 | [diff] [blame] | 126 | const struct decode_header *h) |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 127 | { |
David A. Long | 47e190f | 2014-03-06 18:12:07 -0500 | [diff] [blame] | 128 | probes_insn_handler_t *handler = 0; |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 129 | unsigned reglist = insn & 0xffff; |
| 130 | int is_ldm = insn & 0x100000; |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 131 | int rn = (insn >> 16) & 0xf; |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 132 | |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 133 | if (rn <= 12 && (reglist & 0xe000) == 0) { |
| 134 | /* Instruction only uses registers in the range R0..R12 */ |
| 135 | handler = emulate_generic_r0_12_noflags; |
| 136 | |
| 137 | } else if (rn >= 2 && (reglist & 0x8003) == 0) { |
| 138 | /* Instruction only uses registers in the range R2..R14 */ |
| 139 | rn -= 2; |
| 140 | reglist >>= 2; |
| 141 | handler = emulate_generic_r2_14_noflags; |
| 142 | |
| 143 | } else if (rn >= 3 && (reglist & 0x0007) == 0) { |
| 144 | /* Instruction only uses registers in the range R3..R15 */ |
| 145 | if (is_ldm && (reglist & 0x8000)) { |
| 146 | rn -= 3; |
| 147 | reglist >>= 3; |
| 148 | handler = emulate_ldm_r3_15; |
| 149 | } |
| 150 | } |
| 151 | |
| 152 | if (handler) { |
| 153 | /* We can emulate the instruction in (possibly) modified form */ |
Ben Dooks | 888be25 | 2013-11-08 18:29:25 +0000 | [diff] [blame] | 154 | asi->insn[0] = __opcode_to_mem_arm((insn & 0xfff00000) | |
| 155 | (rn << 16) | reglist); |
Jon Medhurst | 3d4a997 | 2011-06-14 15:54:28 +0100 | [diff] [blame] | 156 | asi->insn_handler = handler; |
| 157 | return INSN_GOOD; |
| 158 | } |
| 159 | |
| 160 | /* Fallback to slower simulation... */ |
Jon Medhurst | 235a4ce | 2011-07-07 08:57:22 +0100 | [diff] [blame] | 161 | if (reglist & 0x8000) |
| 162 | handler = is_ldm ? simulate_ldm1_pc : simulate_stm1_pc; |
| 163 | else |
| 164 | handler = simulate_ldm1stm1; |
| 165 | asi->insn_handler = handler; |
| 166 | return INSN_GOOD_NO_SLOT; |
| 167 | } |
| 168 | |