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Thomas Gleixner1a59d1b82019-05-27 08:55:05 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Alexey Charkov21f47fb2010-12-23 13:11:21 +01002/*
Tony Prisk83cc7692012-10-06 19:55:42 +13003 * arch/arm/mach-vt8500/timer.c
Alexey Charkov21f47fb2010-12-23 13:11:21 +01004 *
Tony Priske9a91de2012-08-03 21:00:06 +12005 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
Alexey Charkov21f47fb2010-12-23 13:11:21 +01006 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
Alexey Charkov21f47fb2010-12-23 13:11:21 +01007 */
8
Tony Priske9a91de2012-08-03 21:00:06 +12009/*
10 * This file is copied and modified from the original timer.c provided by
11 * Alexey Charkov. Minor changes have been made for Device Tree Support.
12 */
13
Alexey Charkov21f47fb2010-12-23 13:11:21 +010014#include <linux/io.h>
15#include <linux/irq.h>
16#include <linux/interrupt.h>
17#include <linux/clocksource.h>
18#include <linux/clockchips.h>
19#include <linux/delay.h>
Alexey Charkov21f47fb2010-12-23 13:11:21 +010020
Tony Priske9a91de2012-08-03 21:00:06 +120021#include <linux/of.h>
22#include <linux/of_address.h>
23#include <linux/of_irq.h>
Alexey Charkov21f47fb2010-12-23 13:11:21 +010024
25#define VT8500_TIMER_OFFSET 0x0100
Tony Priske9a91de2012-08-03 21:00:06 +120026#define VT8500_TIMER_HZ 3000000
Alexey Charkov21f47fb2010-12-23 13:11:21 +010027#define TIMER_MATCH_VAL 0x0000
28#define TIMER_COUNT_VAL 0x0010
29#define TIMER_STATUS_VAL 0x0014
30#define TIMER_IER_VAL 0x001c /* interrupt enable */
31#define TIMER_CTRL_VAL 0x0020
32#define TIMER_AS_VAL 0x0024 /* access status */
33#define TIMER_COUNT_R_ACTIVE (1 << 5) /* not ready for read */
34#define TIMER_COUNT_W_ACTIVE (1 << 4) /* not ready for write */
35#define TIMER_MATCH_W_ACTIVE (1 << 0) /* not ready for write */
Alexey Charkov21f47fb2010-12-23 13:11:21 +010036
37#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
38
Roman Volkovf9eccf22016-01-01 16:24:41 +030039#define MIN_OSCR_DELTA 16
40
Alexey Charkov21f47fb2010-12-23 13:11:21 +010041static void __iomem *regbase;
42
Thomas Gleixnera5a1d1c2016-12-21 20:32:01 +010043static u64 vt8500_timer_read(struct clocksource *cs)
Alexey Charkov21f47fb2010-12-23 13:11:21 +010044{
45 int loops = msecs_to_loops(10);
46 writel(3, regbase + TIMER_CTRL_VAL);
47 while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
48 && --loops)
49 cpu_relax();
50 return readl(regbase + TIMER_COUNT_VAL);
51}
52
Tony Priske9a91de2012-08-03 21:00:06 +120053static struct clocksource clocksource = {
Alexey Charkov21f47fb2010-12-23 13:11:21 +010054 .name = "vt8500_timer",
55 .rating = 200,
56 .read = vt8500_timer_read,
57 .mask = CLOCKSOURCE_MASK(32),
58 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
59};
60
61static int vt8500_timer_set_next_event(unsigned long cycles,
62 struct clock_event_device *evt)
63{
64 int loops = msecs_to_loops(10);
Thomas Gleixnera5a1d1c2016-12-21 20:32:01 +010065 u64 alarm = clocksource.read(&clocksource) + cycles;
Alexey Charkov21f47fb2010-12-23 13:11:21 +010066 while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
67 && --loops)
68 cpu_relax();
69 writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
70
Roman Volkovf9eccf22016-01-01 16:24:41 +030071 if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
Alexey Charkov21f47fb2010-12-23 13:11:21 +010072 return -ETIME;
73
74 writel(1, regbase + TIMER_IER_VAL);
75
76 return 0;
77}
78
Viresh Kumar214bc752015-06-18 16:24:54 +053079static int vt8500_shutdown(struct clock_event_device *evt)
Alexey Charkov21f47fb2010-12-23 13:11:21 +010080{
Viresh Kumar214bc752015-06-18 16:24:54 +053081 writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL);
82 writel(0, regbase + TIMER_IER_VAL);
83 return 0;
Alexey Charkov21f47fb2010-12-23 13:11:21 +010084}
85
Tony Priske9a91de2012-08-03 21:00:06 +120086static struct clock_event_device clockevent = {
Viresh Kumar214bc752015-06-18 16:24:54 +053087 .name = "vt8500_timer",
88 .features = CLOCK_EVT_FEAT_ONESHOT,
89 .rating = 200,
90 .set_next_event = vt8500_timer_set_next_event,
91 .set_state_shutdown = vt8500_shutdown,
92 .set_state_oneshot = vt8500_shutdown,
Alexey Charkov21f47fb2010-12-23 13:11:21 +010093};
94
95static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
96{
97 struct clock_event_device *evt = dev_id;
98 writel(0xf, regbase + TIMER_STATUS_VAL);
99 evt->event_handler(evt);
100
101 return IRQ_HANDLED;
102}
103
Tony Priske9a91de2012-08-03 21:00:06 +1200104static struct irqaction irq = {
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100105 .name = "vt8500_timer",
Michael Opdenacker39039eb2013-12-09 10:38:50 +0100106 .flags = IRQF_TIMER | IRQF_IRQPOLL,
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100107 .handler = vt8500_timer_interrupt,
108 .dev_id = &clockevent,
109};
110
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200111static int __init vt8500_timer_init(struct device_node *np)
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100112{
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200113 int timer_irq, ret;
Tony Priske9a91de2012-08-03 21:00:06 +1200114
Tony Priske9a91de2012-08-03 21:00:06 +1200115 regbase = of_iomap(np, 0);
116 if (!regbase) {
117 pr_err("%s: Missing iobase description in Device Tree\n",
118 __func__);
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200119 return -ENXIO;
Tony Priske9a91de2012-08-03 21:00:06 +1200120 }
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200121
Tony Priske9a91de2012-08-03 21:00:06 +1200122 timer_irq = irq_of_parse_and_map(np, 0);
123 if (!timer_irq) {
124 pr_err("%s: Missing irq description in Device Tree\n",
125 __func__);
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200126 return -EINVAL;
Tony Priske9a91de2012-08-03 21:00:06 +1200127 }
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100128
129 writel(1, regbase + TIMER_CTRL_VAL);
130 writel(0xf, regbase + TIMER_STATUS_VAL);
131 writel(~0, regbase + TIMER_MATCH_VAL);
132
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200133 ret = clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
134 if (ret) {
Dan Carpenter30a85eb2018-10-13 13:22:22 +0300135 pr_err("%s: clocksource_register failed for %s\n",
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200136 __func__, clocksource.name);
137 return ret;
138 }
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100139
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100140 clockevent.cpumask = cpumask_of(0);
141
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200142 ret = setup_irq(timer_irq, &irq);
143 if (ret) {
Tony Priske9a91de2012-08-03 21:00:06 +1200144 pr_err("%s: setup_irq failed for %s\n", __func__,
145 clockevent.name);
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200146 return ret;
147 }
148
Shawn Guo838a2ae2013-01-12 11:50:05 +0000149 clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
Roman Volkovf9eccf22016-01-01 16:24:41 +0300150 MIN_OSCR_DELTA * 2, 0xf0000000);
Daniel Lezcano979d7f22016-06-06 23:30:04 +0200151
152 return 0;
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100153}
154
Daniel Lezcano17273392017-05-26 16:56:11 +0200155TIMER_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);