Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 2 | /**************************************************************************** |
Ben Hutchings | f7a6d2c | 2013-08-29 23:32:48 +0100 | [diff] [blame] | 3 | * Driver for Solarflare network controllers and boards |
| 4 | * Copyright 2008-2013 Solarflare Communications Inc. |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <linux/delay.h> |
Edward Cree | 42ca087 | 2015-05-27 13:14:26 +0100 | [diff] [blame] | 8 | #include <linux/moduleparam.h> |
Boqun Feng | 8456799 | 2015-08-26 19:52:46 +0800 | [diff] [blame] | 9 | #include <linux/atomic.h> |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 10 | #include "net_driver.h" |
| 11 | #include "nic.h" |
| 12 | #include "io.h" |
Ben Hutchings | 8b8a95a | 2012-09-18 01:57:07 +0100 | [diff] [blame] | 13 | #include "farch_regs.h" |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 14 | #include "mcdi_pcol.h" |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 15 | |
| 16 | /************************************************************************** |
| 17 | * |
| 18 | * Management-Controller-to-Driver Interface |
| 19 | * |
| 20 | ************************************************************************** |
| 21 | */ |
| 22 | |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 23 | #define MCDI_RPC_TIMEOUT (10 * HZ) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 24 | |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 25 | /* A reboot/assertion causes the MCDI status word to be set after the |
| 26 | * command word is set or a REBOOT event is sent. If we notice a reboot |
Daniel Pieczko | b2d32f0 | 2013-09-20 16:45:10 +0100 | [diff] [blame] | 27 | * via these mechanisms then wait 250ms for the status word to be set. |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 28 | */ |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 29 | #define MCDI_STATUS_DELAY_US 100 |
Daniel Pieczko | b2d32f0 | 2013-09-20 16:45:10 +0100 | [diff] [blame] | 30 | #define MCDI_STATUS_DELAY_COUNT 2500 |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 31 | #define MCDI_STATUS_SLEEP_MS \ |
| 32 | (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 33 | |
| 34 | #define SEQ_MASK \ |
| 35 | EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) |
| 36 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 37 | struct efx_mcdi_async_param { |
| 38 | struct list_head list; |
| 39 | unsigned int cmd; |
| 40 | size_t inlen; |
| 41 | size_t outlen; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 42 | bool quiet; |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 43 | efx_mcdi_async_completer *complete; |
| 44 | unsigned long cookie; |
| 45 | /* followed by request/response buffer */ |
| 46 | }; |
| 47 | |
Kees Cook | 7aa1402 | 2017-10-24 01:45:59 -0700 | [diff] [blame] | 48 | static void efx_mcdi_timeout_async(struct timer_list *t); |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 49 | static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, |
| 50 | bool *was_attached_out); |
Robert Stonehouse | 5731d7b | 2013-10-09 11:52:43 +0100 | [diff] [blame] | 51 | static bool efx_mcdi_poll_once(struct efx_nic *efx); |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 52 | static void efx_mcdi_abandon(struct efx_nic *efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 53 | |
Edward Cree | 42ca087 | 2015-05-27 13:14:26 +0100 | [diff] [blame] | 54 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 55 | static bool mcdi_logging_default; |
| 56 | module_param(mcdi_logging_default, bool, 0644); |
| 57 | MODULE_PARM_DESC(mcdi_logging_default, |
| 58 | "Enable MCDI logging on newly-probed functions"); |
| 59 | #endif |
| 60 | |
Ben Hutchings | f073dde | 2012-09-18 02:33:55 +0100 | [diff] [blame] | 61 | int efx_mcdi_init(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 62 | { |
| 63 | struct efx_mcdi_iface *mcdi; |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 64 | bool already_attached; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 65 | int rc = -ENOMEM; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 66 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 67 | efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL); |
| 68 | if (!efx->mcdi) |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 69 | goto fail; |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 70 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 71 | mcdi = efx_mcdi(efx); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 72 | mcdi->efx = efx; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 73 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 74 | /* consuming code assumes buffer is page-sized */ |
| 75 | mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL); |
| 76 | if (!mcdi->logging_buffer) |
| 77 | goto fail1; |
Edward Cree | 42ca087 | 2015-05-27 13:14:26 +0100 | [diff] [blame] | 78 | mcdi->logging_enabled = mcdi_logging_default; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 79 | #endif |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 80 | init_waitqueue_head(&mcdi->wq); |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 81 | init_waitqueue_head(&mcdi->proxy_rx_wq); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 82 | spin_lock_init(&mcdi->iface_lock); |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 83 | mcdi->state = MCDI_STATE_QUIESCENT; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 84 | mcdi->mode = MCDI_MODE_POLL; |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 85 | spin_lock_init(&mcdi->async_lock); |
| 86 | INIT_LIST_HEAD(&mcdi->async_list); |
Kees Cook | 7aa1402 | 2017-10-24 01:45:59 -0700 | [diff] [blame] | 87 | timer_setup(&mcdi->async_timer, efx_mcdi_timeout_async, 0); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 88 | |
| 89 | (void) efx_mcdi_poll_reboot(efx); |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 90 | mcdi->new_epoch = true; |
Ben Hutchings | f073dde | 2012-09-18 02:33:55 +0100 | [diff] [blame] | 91 | |
| 92 | /* Recover from a failed assertion before probing */ |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 93 | rc = efx_mcdi_handle_assertion(efx); |
| 94 | if (rc) |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 95 | goto fail2; |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 96 | |
| 97 | /* Let the MC (and BMC, if this is a LOM) know that the driver |
| 98 | * is loaded. We should do this before we reset the NIC. |
| 99 | */ |
| 100 | rc = efx_mcdi_drv_attach(efx, true, &already_attached); |
| 101 | if (rc) { |
| 102 | netif_err(efx, probe, efx->net_dev, |
| 103 | "Unable to register driver with MCPU\n"); |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 104 | goto fail2; |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 105 | } |
| 106 | if (already_attached) |
| 107 | /* Not a fatal error */ |
| 108 | netif_err(efx, probe, efx->net_dev, |
| 109 | "Host already registered with MCPU\n"); |
| 110 | |
Ben Hutchings | 0bcf4a6 | 2013-10-18 19:21:45 +0100 | [diff] [blame] | 111 | if (efx->mcdi->fn_flags & |
| 112 | (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY)) |
| 113 | efx->primary = efx; |
| 114 | |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 115 | return 0; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 116 | fail2: |
| 117 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 118 | free_page((unsigned long)mcdi->logging_buffer); |
| 119 | fail1: |
| 120 | #endif |
| 121 | kfree(efx->mcdi); |
| 122 | efx->mcdi = NULL; |
| 123 | fail: |
| 124 | return rc; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 125 | } |
| 126 | |
Jon Cooper | e5fbd97 | 2017-02-08 16:52:10 +0000 | [diff] [blame] | 127 | void efx_mcdi_detach(struct efx_nic *efx) |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 128 | { |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 129 | if (!efx->mcdi) |
| 130 | return; |
| 131 | |
| 132 | BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT); |
| 133 | |
| 134 | /* Relinquish the device (back to the BMC, if this is a LOM) */ |
| 135 | efx_mcdi_drv_attach(efx, false, NULL); |
Jon Cooper | e5fbd97 | 2017-02-08 16:52:10 +0000 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | void efx_mcdi_fini(struct efx_nic *efx) |
| 139 | { |
| 140 | if (!efx->mcdi) |
| 141 | return; |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 142 | |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 143 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 144 | free_page((unsigned long)efx->mcdi->iface.logging_buffer); |
| 145 | #endif |
| 146 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 147 | kfree(efx->mcdi); |
| 148 | } |
| 149 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 150 | static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd, |
| 151 | const efx_dword_t *inbuf, size_t inlen) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 152 | { |
| 153 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 154 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 155 | char *buf = mcdi->logging_buffer; /* page-sized */ |
| 156 | #endif |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 157 | efx_dword_t hdr[2]; |
| 158 | size_t hdr_len; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 159 | u32 xflags, seqno; |
| 160 | |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 161 | BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 162 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 163 | /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ |
| 164 | spin_lock_bh(&mcdi->iface_lock); |
| 165 | ++mcdi->seqno; |
| 166 | spin_unlock_bh(&mcdi->iface_lock); |
| 167 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 168 | seqno = mcdi->seqno & SEQ_MASK; |
| 169 | xflags = 0; |
| 170 | if (mcdi->mode == MCDI_MODE_EVENTS) |
| 171 | xflags |= MCDI_HEADER_XFLAGS_EVREQ; |
| 172 | |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 173 | if (efx->type->mcdi_max_ver == 1) { |
| 174 | /* MCDI v1 */ |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 175 | EFX_POPULATE_DWORD_7(hdr[0], |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 176 | MCDI_HEADER_RESPONSE, 0, |
| 177 | MCDI_HEADER_RESYNC, 1, |
| 178 | MCDI_HEADER_CODE, cmd, |
| 179 | MCDI_HEADER_DATALEN, inlen, |
| 180 | MCDI_HEADER_SEQ, seqno, |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 181 | MCDI_HEADER_XFLAGS, xflags, |
| 182 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 183 | hdr_len = 4; |
| 184 | } else { |
| 185 | /* MCDI v2 */ |
| 186 | BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2); |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 187 | EFX_POPULATE_DWORD_7(hdr[0], |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 188 | MCDI_HEADER_RESPONSE, 0, |
| 189 | MCDI_HEADER_RESYNC, 1, |
| 190 | MCDI_HEADER_CODE, MC_CMD_V2_EXTN, |
| 191 | MCDI_HEADER_DATALEN, 0, |
| 192 | MCDI_HEADER_SEQ, seqno, |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 193 | MCDI_HEADER_XFLAGS, xflags, |
| 194 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 195 | EFX_POPULATE_DWORD_2(hdr[1], |
| 196 | MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd, |
| 197 | MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen); |
| 198 | hdr_len = 8; |
| 199 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 200 | |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 201 | #ifdef CONFIG_SFC_MCDI_LOGGING |
Edward Cree | e7fef9b | 2015-05-27 13:14:01 +0100 | [diff] [blame] | 202 | if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 203 | int bytes = 0; |
| 204 | int i; |
| 205 | /* Lengths should always be a whole number of dwords, so scream |
| 206 | * if they're not. |
| 207 | */ |
| 208 | WARN_ON_ONCE(hdr_len % 4); |
| 209 | WARN_ON_ONCE(inlen % 4); |
| 210 | |
| 211 | /* We own the logging buffer, as only one MCDI can be in |
| 212 | * progress on a NIC at any one time. So no need for locking. |
| 213 | */ |
| 214 | for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++) |
| 215 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, |
| 216 | " %08x", le32_to_cpu(hdr[i].u32[0])); |
| 217 | |
| 218 | for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++) |
| 219 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, |
| 220 | " %08x", le32_to_cpu(inbuf[i].u32[0])); |
| 221 | |
| 222 | netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf); |
| 223 | } |
| 224 | #endif |
| 225 | |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 226 | efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen); |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 227 | |
| 228 | mcdi->new_epoch = false; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 229 | } |
| 230 | |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 231 | static int efx_mcdi_errno(unsigned int mcdi_err) |
| 232 | { |
| 233 | switch (mcdi_err) { |
| 234 | case 0: |
| 235 | return 0; |
| 236 | #define TRANSLATE_ERROR(name) \ |
| 237 | case MC_CMD_ERR_ ## name: \ |
| 238 | return -name; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 239 | TRANSLATE_ERROR(EPERM); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 240 | TRANSLATE_ERROR(ENOENT); |
| 241 | TRANSLATE_ERROR(EINTR); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 242 | TRANSLATE_ERROR(EAGAIN); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 243 | TRANSLATE_ERROR(EACCES); |
| 244 | TRANSLATE_ERROR(EBUSY); |
| 245 | TRANSLATE_ERROR(EINVAL); |
| 246 | TRANSLATE_ERROR(EDEADLK); |
| 247 | TRANSLATE_ERROR(ENOSYS); |
| 248 | TRANSLATE_ERROR(ETIME); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 249 | TRANSLATE_ERROR(EALREADY); |
| 250 | TRANSLATE_ERROR(ENOSPC); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 251 | #undef TRANSLATE_ERROR |
Ben Hutchings | ea136ae | 2013-10-08 16:36:58 +0100 | [diff] [blame] | 252 | case MC_CMD_ERR_ENOTSUP: |
| 253 | return -EOPNOTSUPP; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 254 | case MC_CMD_ERR_ALLOC_FAIL: |
| 255 | return -ENOBUFS; |
| 256 | case MC_CMD_ERR_MAC_EXIST: |
| 257 | return -EADDRINUSE; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 258 | default: |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 259 | return -EPROTO; |
| 260 | } |
| 261 | } |
| 262 | |
| 263 | static void efx_mcdi_read_response_header(struct efx_nic *efx) |
| 264 | { |
| 265 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 266 | unsigned int respseq, respcmd, error; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 267 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 268 | char *buf = mcdi->logging_buffer; /* page-sized */ |
| 269 | #endif |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 270 | efx_dword_t hdr; |
| 271 | |
| 272 | efx->type->mcdi_read_response(efx, &hdr, 0, 4); |
| 273 | respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ); |
| 274 | respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE); |
| 275 | error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR); |
| 276 | |
| 277 | if (respcmd != MC_CMD_V2_EXTN) { |
| 278 | mcdi->resp_hdr_len = 4; |
| 279 | mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN); |
| 280 | } else { |
| 281 | efx->type->mcdi_read_response(efx, &hdr, 4, 4); |
| 282 | mcdi->resp_hdr_len = 8; |
| 283 | mcdi->resp_data_len = |
| 284 | EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN); |
| 285 | } |
| 286 | |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 287 | #ifdef CONFIG_SFC_MCDI_LOGGING |
Edward Cree | e7fef9b | 2015-05-27 13:14:01 +0100 | [diff] [blame] | 288 | if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 289 | size_t hdr_len, data_len; |
| 290 | int bytes = 0; |
| 291 | int i; |
| 292 | |
| 293 | WARN_ON_ONCE(mcdi->resp_hdr_len % 4); |
| 294 | hdr_len = mcdi->resp_hdr_len / 4; |
| 295 | /* MCDI_DECLARE_BUF ensures that underlying buffer is padded |
| 296 | * to dword size, and the MCDI buffer is always dword size |
| 297 | */ |
| 298 | data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4); |
| 299 | |
| 300 | /* We own the logging buffer, as only one MCDI can be in |
| 301 | * progress on a NIC at any one time. So no need for locking. |
| 302 | */ |
| 303 | for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) { |
| 304 | efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4); |
| 305 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, |
| 306 | " %08x", le32_to_cpu(hdr.u32[0])); |
| 307 | } |
| 308 | |
| 309 | for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) { |
| 310 | efx->type->mcdi_read_response(efx, &hdr, |
| 311 | mcdi->resp_hdr_len + (i * 4), 4); |
| 312 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, |
| 313 | " %08x", le32_to_cpu(hdr.u32[0])); |
| 314 | } |
| 315 | |
| 316 | netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf); |
| 317 | } |
| 318 | #endif |
| 319 | |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 320 | mcdi->resprc_raw = 0; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 321 | if (error && mcdi->resp_data_len == 0) { |
| 322 | netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); |
| 323 | mcdi->resprc = -EIO; |
| 324 | } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { |
| 325 | netif_err(efx, hw, efx->net_dev, |
| 326 | "MC response mismatch tx seq 0x%x rx seq 0x%x\n", |
| 327 | respseq, mcdi->seqno); |
| 328 | mcdi->resprc = -EIO; |
| 329 | } else if (error) { |
| 330 | efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4); |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 331 | mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0); |
| 332 | mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 333 | } else { |
| 334 | mcdi->resprc = 0; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 335 | } |
| 336 | } |
| 337 | |
Robert Stonehouse | 5731d7b | 2013-10-09 11:52:43 +0100 | [diff] [blame] | 338 | static bool efx_mcdi_poll_once(struct efx_nic *efx) |
| 339 | { |
| 340 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 341 | |
| 342 | rmb(); |
| 343 | if (!efx->type->mcdi_poll_response(efx)) |
| 344 | return false; |
| 345 | |
| 346 | spin_lock_bh(&mcdi->iface_lock); |
| 347 | efx_mcdi_read_response_header(efx); |
| 348 | spin_unlock_bh(&mcdi->iface_lock); |
| 349 | |
| 350 | return true; |
| 351 | } |
| 352 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 353 | static int efx_mcdi_poll(struct efx_nic *efx) |
| 354 | { |
| 355 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 356 | unsigned long time, finish; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 357 | unsigned int spins; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 358 | int rc; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 359 | |
| 360 | /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 361 | rc = efx_mcdi_poll_reboot(efx); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 362 | if (rc) { |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 363 | spin_lock_bh(&mcdi->iface_lock); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 364 | mcdi->resprc = rc; |
| 365 | mcdi->resp_hdr_len = 0; |
| 366 | mcdi->resp_data_len = 0; |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 367 | spin_unlock_bh(&mcdi->iface_lock); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 368 | return 0; |
| 369 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 370 | |
| 371 | /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, |
| 372 | * because generally mcdi responses are fast. After that, back off |
| 373 | * and poll once a jiffy (approximately) |
| 374 | */ |
Rafael J. Wysocki | efefc97 | 2018-03-20 10:11:28 +0100 | [diff] [blame] | 375 | spins = USER_TICK_USEC; |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 376 | finish = jiffies + MCDI_RPC_TIMEOUT; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 377 | |
| 378 | while (1) { |
| 379 | if (spins != 0) { |
| 380 | --spins; |
| 381 | udelay(1); |
Ben Hutchings | 55029c1 | 2010-01-13 04:34:25 +0000 | [diff] [blame] | 382 | } else { |
| 383 | schedule_timeout_uninterruptible(1); |
| 384 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 385 | |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 386 | time = jiffies; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 387 | |
Robert Stonehouse | 5731d7b | 2013-10-09 11:52:43 +0100 | [diff] [blame] | 388 | if (efx_mcdi_poll_once(efx)) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 389 | break; |
| 390 | |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 391 | if (time_after(time, finish)) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 392 | return -ETIMEDOUT; |
| 393 | } |
| 394 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 395 | /* Return rc=0 like wait_event_timeout() */ |
| 396 | return 0; |
| 397 | } |
| 398 | |
Ben Hutchings | 876be08 | 2012-10-01 20:58:35 +0100 | [diff] [blame] | 399 | /* Test and clear MC-rebooted flag for this port/function; reset |
| 400 | * software state as necessary. |
| 401 | */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 402 | int efx_mcdi_poll_reboot(struct efx_nic *efx) |
| 403 | { |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 404 | if (!efx->mcdi) |
| 405 | return 0; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 406 | |
Ben Hutchings | cd0ecc9 | 2012-12-14 21:52:56 +0000 | [diff] [blame] | 407 | return efx->type->mcdi_poll_reboot(efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 408 | } |
| 409 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 410 | static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi) |
| 411 | { |
| 412 | return cmpxchg(&mcdi->state, |
| 413 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) == |
| 414 | MCDI_STATE_QUIESCENT; |
| 415 | } |
| 416 | |
| 417 | static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 418 | { |
| 419 | /* Wait until the interface becomes QUIESCENT and we win the race |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 420 | * to mark it RUNNING_SYNC. |
| 421 | */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 422 | wait_event(mcdi->wq, |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 423 | cmpxchg(&mcdi->state, |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 424 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) == |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 425 | MCDI_STATE_QUIESCENT); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 426 | } |
| 427 | |
| 428 | static int efx_mcdi_await_completion(struct efx_nic *efx) |
| 429 | { |
| 430 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 431 | |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 432 | if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED, |
| 433 | MCDI_RPC_TIMEOUT) == 0) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 434 | return -ETIMEDOUT; |
| 435 | |
| 436 | /* Check if efx_mcdi_set_mode() switched us back to polled completions. |
| 437 | * In which case, poll for completions directly. If efx_mcdi_ev_cpl() |
| 438 | * completed the request first, then we'll just end up completing the |
| 439 | * request again, which is safe. |
| 440 | * |
| 441 | * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which |
| 442 | * wait_event_timeout() implicitly provides. |
| 443 | */ |
| 444 | if (mcdi->mode == MCDI_MODE_POLL) |
| 445 | return efx_mcdi_poll(efx); |
| 446 | |
| 447 | return 0; |
| 448 | } |
| 449 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 450 | /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the |
| 451 | * requester. Return whether this was done. Does not take any locks. |
| 452 | */ |
| 453 | static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 454 | { |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 455 | if (cmpxchg(&mcdi->state, |
| 456 | MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) == |
| 457 | MCDI_STATE_RUNNING_SYNC) { |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 458 | wake_up(&mcdi->wq); |
| 459 | return true; |
| 460 | } |
| 461 | |
| 462 | return false; |
| 463 | } |
| 464 | |
| 465 | static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) |
| 466 | { |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 467 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 468 | struct efx_mcdi_async_param *async; |
| 469 | struct efx_nic *efx = mcdi->efx; |
| 470 | |
| 471 | /* Process the asynchronous request queue */ |
| 472 | spin_lock_bh(&mcdi->async_lock); |
| 473 | async = list_first_entry_or_null( |
| 474 | &mcdi->async_list, struct efx_mcdi_async_param, list); |
| 475 | if (async) { |
| 476 | mcdi->state = MCDI_STATE_RUNNING_ASYNC; |
| 477 | efx_mcdi_send_request(efx, async->cmd, |
| 478 | (const efx_dword_t *)(async + 1), |
| 479 | async->inlen); |
| 480 | mod_timer(&mcdi->async_timer, |
| 481 | jiffies + MCDI_RPC_TIMEOUT); |
| 482 | } |
| 483 | spin_unlock_bh(&mcdi->async_lock); |
| 484 | |
| 485 | if (async) |
| 486 | return; |
| 487 | } |
| 488 | |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 489 | mcdi->state = MCDI_STATE_QUIESCENT; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 490 | wake_up(&mcdi->wq); |
| 491 | } |
| 492 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 493 | /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the |
| 494 | * asynchronous completion function, and release the interface. |
| 495 | * Return whether this was done. Must be called in bh-disabled |
| 496 | * context. Will take iface_lock and async_lock. |
| 497 | */ |
| 498 | static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout) |
| 499 | { |
| 500 | struct efx_nic *efx = mcdi->efx; |
| 501 | struct efx_mcdi_async_param *async; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 502 | size_t hdr_len, data_len, err_len; |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 503 | efx_dword_t *outbuf; |
Jon Cooper | aa09a3d | 2015-05-20 11:10:41 +0100 | [diff] [blame] | 504 | MCDI_DECLARE_BUF_ERR(errbuf); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 505 | int rc; |
| 506 | |
| 507 | if (cmpxchg(&mcdi->state, |
| 508 | MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) != |
| 509 | MCDI_STATE_RUNNING_ASYNC) |
| 510 | return false; |
| 511 | |
| 512 | spin_lock(&mcdi->iface_lock); |
| 513 | if (timeout) { |
| 514 | /* Ensure that if the completion event arrives later, |
| 515 | * the seqno check in efx_mcdi_ev_cpl() will fail |
| 516 | */ |
| 517 | ++mcdi->seqno; |
| 518 | ++mcdi->credits; |
| 519 | rc = -ETIMEDOUT; |
| 520 | hdr_len = 0; |
| 521 | data_len = 0; |
| 522 | } else { |
| 523 | rc = mcdi->resprc; |
| 524 | hdr_len = mcdi->resp_hdr_len; |
| 525 | data_len = mcdi->resp_data_len; |
| 526 | } |
| 527 | spin_unlock(&mcdi->iface_lock); |
| 528 | |
| 529 | /* Stop the timer. In case the timer function is running, we |
| 530 | * must wait for it to return so that there is no possibility |
| 531 | * of it aborting the next request. |
| 532 | */ |
| 533 | if (!timeout) |
| 534 | del_timer_sync(&mcdi->async_timer); |
| 535 | |
| 536 | spin_lock(&mcdi->async_lock); |
| 537 | async = list_first_entry(&mcdi->async_list, |
| 538 | struct efx_mcdi_async_param, list); |
| 539 | list_del(&async->list); |
| 540 | spin_unlock(&mcdi->async_lock); |
| 541 | |
| 542 | outbuf = (efx_dword_t *)(async + 1); |
| 543 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, |
| 544 | min(async->outlen, data_len)); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 545 | if (!timeout && rc && !async->quiet) { |
| 546 | err_len = min(sizeof(errbuf), data_len); |
| 547 | efx->type->mcdi_read_response(efx, errbuf, hdr_len, |
| 548 | sizeof(errbuf)); |
| 549 | efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf, |
| 550 | err_len, rc); |
| 551 | } |
Bert Kenward | 7014d7f | 2016-08-11 13:01:21 +0100 | [diff] [blame] | 552 | |
| 553 | if (async->complete) |
| 554 | async->complete(efx, async->cookie, rc, outbuf, |
| 555 | min(async->outlen, data_len)); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 556 | kfree(async); |
| 557 | |
| 558 | efx_mcdi_release(mcdi); |
| 559 | |
| 560 | return true; |
| 561 | } |
| 562 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 563 | static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 564 | unsigned int datalen, unsigned int mcdi_err) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 565 | { |
| 566 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 567 | bool wake = false; |
| 568 | |
| 569 | spin_lock(&mcdi->iface_lock); |
| 570 | |
| 571 | if ((seqno ^ mcdi->seqno) & SEQ_MASK) { |
| 572 | if (mcdi->credits) |
| 573 | /* The request has been cancelled */ |
| 574 | --mcdi->credits; |
| 575 | else |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 576 | netif_err(efx, hw, efx->net_dev, |
| 577 | "MC response mismatch tx seq 0x%x rx " |
| 578 | "seq 0x%x\n", seqno, mcdi->seqno); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 579 | } else { |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 580 | if (efx->type->mcdi_max_ver >= 2) { |
| 581 | /* MCDI v2 responses don't fit in an event */ |
| 582 | efx_mcdi_read_response_header(efx); |
| 583 | } else { |
| 584 | mcdi->resprc = efx_mcdi_errno(mcdi_err); |
| 585 | mcdi->resp_hdr_len = 4; |
| 586 | mcdi->resp_data_len = datalen; |
| 587 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 588 | |
| 589 | wake = true; |
| 590 | } |
| 591 | |
| 592 | spin_unlock(&mcdi->iface_lock); |
| 593 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 594 | if (wake) { |
| 595 | if (!efx_mcdi_complete_async(mcdi, false)) |
| 596 | (void) efx_mcdi_complete_sync(mcdi); |
| 597 | |
| 598 | /* If the interface isn't RUNNING_ASYNC or |
| 599 | * RUNNING_SYNC then we've received a duplicate |
| 600 | * completion after we've already transitioned back to |
| 601 | * QUIESCENT. [A subsequent invocation would increment |
| 602 | * seqno, so would have failed the seqno check]. |
| 603 | */ |
| 604 | } |
| 605 | } |
| 606 | |
Kees Cook | 7aa1402 | 2017-10-24 01:45:59 -0700 | [diff] [blame] | 607 | static void efx_mcdi_timeout_async(struct timer_list *t) |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 608 | { |
Kees Cook | 7aa1402 | 2017-10-24 01:45:59 -0700 | [diff] [blame] | 609 | struct efx_mcdi_iface *mcdi = from_timer(mcdi, t, async_timer); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 610 | |
| 611 | efx_mcdi_complete_async(mcdi, true); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 612 | } |
| 613 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 614 | static int |
| 615 | efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen) |
| 616 | { |
| 617 | if (efx->type->mcdi_max_ver < 0 || |
| 618 | (efx->type->mcdi_max_ver < 2 && |
| 619 | cmd > MC_CMD_CMD_SPACE_ESCAPE_7)) |
| 620 | return -EINVAL; |
| 621 | |
| 622 | if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 || |
| 623 | (efx->type->mcdi_max_ver < 2 && |
| 624 | inlen > MCDI_CTL_SDU_LEN_MAX_V1)) |
| 625 | return -EMSGSIZE; |
| 626 | |
| 627 | return 0; |
| 628 | } |
| 629 | |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 630 | static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx, |
| 631 | size_t hdr_len, size_t data_len, |
| 632 | u32 *proxy_handle) |
| 633 | { |
| 634 | MCDI_DECLARE_BUF_ERR(testbuf); |
| 635 | const size_t buflen = sizeof(testbuf); |
| 636 | |
| 637 | if (!proxy_handle || data_len < buflen) |
| 638 | return false; |
| 639 | |
| 640 | efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen); |
| 641 | if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) { |
| 642 | *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE); |
| 643 | return true; |
| 644 | } |
| 645 | |
| 646 | return false; |
| 647 | } |
| 648 | |
| 649 | static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd, |
| 650 | size_t inlen, |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 651 | efx_dword_t *outbuf, size_t outlen, |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 652 | size_t *outlen_actual, bool quiet, |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 653 | u32 *proxy_handle, int *raw_rc) |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 654 | { |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 655 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
Jon Cooper | aa09a3d | 2015-05-20 11:10:41 +0100 | [diff] [blame] | 656 | MCDI_DECLARE_BUF_ERR(errbuf); |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 657 | int rc; |
| 658 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 659 | if (mcdi->mode == MCDI_MODE_POLL) |
| 660 | rc = efx_mcdi_poll(efx); |
| 661 | else |
| 662 | rc = efx_mcdi_await_completion(efx); |
| 663 | |
| 664 | if (rc != 0) { |
Robert Stonehouse | 6b294b8 | 2013-10-09 11:52:48 +0100 | [diff] [blame] | 665 | netif_err(efx, hw, efx->net_dev, |
| 666 | "MC command 0x%x inlen %d mode %d timed out\n", |
| 667 | cmd, (int)inlen, mcdi->mode); |
| 668 | |
| 669 | if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) { |
| 670 | netif_err(efx, hw, efx->net_dev, |
| 671 | "MCDI request was completed without an event\n"); |
| 672 | rc = 0; |
| 673 | } |
| 674 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 675 | efx_mcdi_abandon(efx); |
| 676 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 677 | /* Close the race with efx_mcdi_ev_cpl() executing just too late |
| 678 | * and completing a request we've just cancelled, by ensuring |
| 679 | * that the seqno check therein fails. |
| 680 | */ |
| 681 | spin_lock_bh(&mcdi->iface_lock); |
| 682 | ++mcdi->seqno; |
| 683 | ++mcdi->credits; |
| 684 | spin_unlock_bh(&mcdi->iface_lock); |
Robert Stonehouse | 6b294b8 | 2013-10-09 11:52:48 +0100 | [diff] [blame] | 685 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 686 | |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 687 | if (proxy_handle) |
| 688 | *proxy_handle = 0; |
| 689 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 690 | if (rc != 0) { |
| 691 | if (outlen_actual) |
| 692 | *outlen_actual = 0; |
| 693 | } else { |
| 694 | size_t hdr_len, data_len, err_len; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 695 | |
| 696 | /* At the very least we need a memory barrier here to ensure |
| 697 | * we pick up changes from efx_mcdi_ev_cpl(). Protect against |
| 698 | * a spurious efx_mcdi_ev_cpl() running concurrently by |
| 699 | * acquiring the iface_lock. */ |
| 700 | spin_lock_bh(&mcdi->iface_lock); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 701 | rc = mcdi->resprc; |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 702 | if (raw_rc) |
| 703 | *raw_rc = mcdi->resprc_raw; |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 704 | hdr_len = mcdi->resp_hdr_len; |
| 705 | data_len = mcdi->resp_data_len; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 706 | err_len = min(sizeof(errbuf), data_len); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 707 | spin_unlock_bh(&mcdi->iface_lock); |
| 708 | |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 709 | BUG_ON(rc > 0); |
| 710 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 711 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, |
| 712 | min(outlen, data_len)); |
| 713 | if (outlen_actual) |
| 714 | *outlen_actual = data_len; |
| 715 | |
| 716 | efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len); |
| 717 | |
| 718 | if (cmd == MC_CMD_REBOOT && rc == -EIO) { |
| 719 | /* Don't reset if MC_CMD_REBOOT returns EIO */ |
| 720 | } else if (rc == -EIO || rc == -EINTR) { |
Jon Cooper | 0ca2b46 | 2017-02-08 16:51:33 +0000 | [diff] [blame] | 721 | netif_err(efx, hw, efx->net_dev, "MC reboot detected\n"); |
| 722 | netif_dbg(efx, hw, efx->net_dev, "MC rebooted during command %d rc %d\n", |
| 723 | cmd, -rc); |
| 724 | if (efx->type->mcdi_reboot_detected) |
| 725 | efx->type->mcdi_reboot_detected(efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 726 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 727 | } else if (proxy_handle && (rc == -EPROTO) && |
| 728 | efx_mcdi_get_proxy_handle(efx, hdr_len, data_len, |
| 729 | proxy_handle)) { |
| 730 | mcdi->proxy_rx_status = 0; |
| 731 | mcdi->proxy_rx_handle = 0; |
| 732 | mcdi->state = MCDI_STATE_PROXY_WAIT; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 733 | } else if (rc && !quiet) { |
| 734 | efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len, |
| 735 | rc); |
| 736 | } |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 737 | |
| 738 | if (rc == -EIO || rc == -EINTR) { |
| 739 | msleep(MCDI_STATUS_SLEEP_MS); |
| 740 | efx_mcdi_poll_reboot(efx); |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 741 | mcdi->new_epoch = true; |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 742 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 743 | } |
| 744 | |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 745 | if (!proxy_handle || !*proxy_handle) |
| 746 | efx_mcdi_release(mcdi); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 747 | return rc; |
| 748 | } |
| 749 | |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 750 | static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi) |
| 751 | { |
| 752 | if (mcdi->state == MCDI_STATE_PROXY_WAIT) { |
| 753 | /* Interrupt the proxy wait. */ |
| 754 | mcdi->proxy_rx_status = -EINTR; |
| 755 | wake_up(&mcdi->proxy_rx_wq); |
| 756 | } |
| 757 | } |
| 758 | |
| 759 | static void efx_mcdi_ev_proxy_response(struct efx_nic *efx, |
| 760 | u32 handle, int status) |
| 761 | { |
| 762 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 763 | |
| 764 | WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT); |
| 765 | |
| 766 | mcdi->proxy_rx_status = efx_mcdi_errno(status); |
| 767 | /* Ensure the status is written before we update the handle, since the |
| 768 | * latter is used to check if we've finished. |
| 769 | */ |
| 770 | wmb(); |
| 771 | mcdi->proxy_rx_handle = handle; |
| 772 | wake_up(&mcdi->proxy_rx_wq); |
| 773 | } |
| 774 | |
| 775 | static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet) |
| 776 | { |
| 777 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 778 | int rc; |
| 779 | |
| 780 | /* Wait for a proxy event, or timeout. */ |
| 781 | rc = wait_event_timeout(mcdi->proxy_rx_wq, |
| 782 | mcdi->proxy_rx_handle != 0 || |
| 783 | mcdi->proxy_rx_status == -EINTR, |
| 784 | MCDI_RPC_TIMEOUT); |
| 785 | |
| 786 | if (rc <= 0) { |
| 787 | netif_dbg(efx, hw, efx->net_dev, |
| 788 | "MCDI proxy timeout %d\n", handle); |
| 789 | return -ETIMEDOUT; |
| 790 | } else if (mcdi->proxy_rx_handle != handle) { |
| 791 | netif_warn(efx, hw, efx->net_dev, |
| 792 | "MCDI proxy unexpected handle %d (expected %d)\n", |
| 793 | mcdi->proxy_rx_handle, handle); |
| 794 | return -EINVAL; |
| 795 | } |
| 796 | |
| 797 | return mcdi->proxy_rx_status; |
| 798 | } |
| 799 | |
| 800 | static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd, |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 801 | const efx_dword_t *inbuf, size_t inlen, |
| 802 | efx_dword_t *outbuf, size_t outlen, |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 803 | size_t *outlen_actual, bool quiet, int *raw_rc) |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 804 | { |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 805 | u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */ |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 806 | int rc; |
| 807 | |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 808 | if (inbuf && inlen && (inbuf == outbuf)) { |
| 809 | /* The input buffer can't be aliased with the output. */ |
| 810 | WARN_ON(1); |
| 811 | return -EINVAL; |
| 812 | } |
| 813 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 814 | rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen); |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 815 | if (rc) |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 816 | return rc; |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 817 | |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 818 | rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
| 819 | outlen_actual, quiet, &proxy_handle, raw_rc); |
| 820 | |
| 821 | if (proxy_handle) { |
| 822 | /* Handle proxy authorisation. This allows approval of MCDI |
| 823 | * operations to be delegated to the admin function, allowing |
| 824 | * fine control over (eg) multicast subscriptions. |
| 825 | */ |
| 826 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 827 | |
| 828 | netif_dbg(efx, hw, efx->net_dev, |
| 829 | "MCDI waiting for proxy auth %d\n", |
| 830 | proxy_handle); |
| 831 | rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet); |
| 832 | |
| 833 | if (rc == 0) { |
| 834 | netif_dbg(efx, hw, efx->net_dev, |
| 835 | "MCDI proxy retry %d\n", proxy_handle); |
| 836 | |
| 837 | /* We now retry the original request. */ |
| 838 | mcdi->state = MCDI_STATE_RUNNING_SYNC; |
| 839 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); |
| 840 | |
| 841 | rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, |
| 842 | outbuf, outlen, outlen_actual, |
| 843 | quiet, NULL, raw_rc); |
| 844 | } else { |
Jon Cooper | 34e7aef | 2017-01-27 15:02:39 +0000 | [diff] [blame] | 845 | netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err, |
| 846 | "MC command 0x%x failed after proxy auth rc=%d\n", |
| 847 | cmd, rc); |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 848 | |
| 849 | if (rc == -EINTR || rc == -EIO) |
| 850 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); |
| 851 | efx_mcdi_release(mcdi); |
| 852 | } |
| 853 | } |
| 854 | |
| 855 | return rc; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 856 | } |
| 857 | |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 858 | static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd, |
| 859 | const efx_dword_t *inbuf, size_t inlen, |
| 860 | efx_dword_t *outbuf, size_t outlen, |
| 861 | size_t *outlen_actual, bool quiet) |
| 862 | { |
| 863 | int raw_rc = 0; |
| 864 | int rc; |
| 865 | |
| 866 | rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, |
| 867 | outbuf, outlen, outlen_actual, true, &raw_rc); |
| 868 | |
| 869 | if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && |
| 870 | efx->type->is_vf) { |
| 871 | /* If the EVB port isn't available within a VF this may |
| 872 | * mean the PF is still bringing the switch up. We should |
| 873 | * retry our request shortly. |
| 874 | */ |
| 875 | unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT; |
| 876 | unsigned int delay_us = 10000; |
| 877 | |
| 878 | netif_dbg(efx, hw, efx->net_dev, |
| 879 | "%s: NO_EVB_PORT; will retry request\n", |
| 880 | __func__); |
| 881 | |
| 882 | do { |
| 883 | usleep_range(delay_us, delay_us + 10000); |
| 884 | rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, |
| 885 | outbuf, outlen, outlen_actual, |
| 886 | true, &raw_rc); |
| 887 | if (delay_us < 100000) |
| 888 | delay_us <<= 1; |
| 889 | } while ((rc == -EPROTO) && |
| 890 | (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && |
| 891 | time_before(jiffies, abort_time)); |
| 892 | } |
| 893 | |
| 894 | if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO)) |
| 895 | efx_mcdi_display_error(efx, cmd, inlen, |
| 896 | outbuf, outlen, rc); |
| 897 | |
| 898 | return rc; |
| 899 | } |
| 900 | |
| 901 | /** |
| 902 | * efx_mcdi_rpc - Issue an MCDI command and wait for completion |
| 903 | * @efx: NIC through which to issue the command |
| 904 | * @cmd: Command type number |
| 905 | * @inbuf: Command parameters |
| 906 | * @inlen: Length of command parameters, in bytes. Must be a multiple |
| 907 | * of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1. |
| 908 | * @outbuf: Response buffer. May be %NULL if @outlen is 0. |
| 909 | * @outlen: Length of response buffer, in bytes. If the actual |
| 910 | * response is longer than @outlen & ~3, it will be truncated |
| 911 | * to that length. |
| 912 | * @outlen_actual: Pointer through which to return the actual response |
| 913 | * length. May be %NULL if this is not needed. |
| 914 | * |
| 915 | * This function may sleep and therefore must be called in an appropriate |
| 916 | * context. |
| 917 | * |
| 918 | * Return: A negative error code, or zero if successful. The error |
| 919 | * code may come from the MCDI response or may indicate a failure |
| 920 | * to communicate with the MC. In the former case, the response |
| 921 | * will still be copied to @outbuf and *@outlen_actual will be |
| 922 | * set accordingly. In the latter case, *@outlen_actual will be |
| 923 | * set to zero. |
| 924 | */ |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 925 | int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, |
| 926 | const efx_dword_t *inbuf, size_t inlen, |
| 927 | efx_dword_t *outbuf, size_t outlen, |
| 928 | size_t *outlen_actual) |
| 929 | { |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 930 | return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, |
| 931 | outlen_actual, false); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 932 | } |
| 933 | |
| 934 | /* Normally, on receiving an error code in the MCDI response, |
| 935 | * efx_mcdi_rpc will log an error message containing (among other |
| 936 | * things) the raw error code, by means of efx_mcdi_display_error. |
| 937 | * This _quiet version suppresses that; if the caller wishes to log |
| 938 | * the error conditionally on the return code, it should call this |
| 939 | * function and is then responsible for calling efx_mcdi_display_error |
| 940 | * as needed. |
| 941 | */ |
| 942 | int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd, |
| 943 | const efx_dword_t *inbuf, size_t inlen, |
| 944 | efx_dword_t *outbuf, size_t outlen, |
| 945 | size_t *outlen_actual) |
| 946 | { |
Bert Kenward | ac28d17 | 2015-12-23 08:56:40 +0000 | [diff] [blame] | 947 | return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, |
| 948 | outlen_actual, true); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 949 | } |
| 950 | |
| 951 | int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd, |
| 952 | const efx_dword_t *inbuf, size_t inlen) |
| 953 | { |
| 954 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 955 | int rc; |
| 956 | |
| 957 | rc = efx_mcdi_check_supported(efx, cmd, inlen); |
| 958 | if (rc) |
| 959 | return rc; |
| 960 | |
| 961 | if (efx->mc_bist_for_other_fn) |
| 962 | return -ENETDOWN; |
| 963 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 964 | if (mcdi->mode == MCDI_MODE_FAIL) |
| 965 | return -ENETDOWN; |
| 966 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 967 | efx_mcdi_acquire_sync(mcdi); |
| 968 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); |
| 969 | return 0; |
| 970 | } |
| 971 | |
| 972 | static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, |
| 973 | const efx_dword_t *inbuf, size_t inlen, |
| 974 | size_t outlen, |
| 975 | efx_mcdi_async_completer *complete, |
| 976 | unsigned long cookie, bool quiet) |
| 977 | { |
| 978 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 979 | struct efx_mcdi_async_param *async; |
| 980 | int rc; |
| 981 | |
| 982 | rc = efx_mcdi_check_supported(efx, cmd, inlen); |
| 983 | if (rc) |
| 984 | return rc; |
| 985 | |
| 986 | if (efx->mc_bist_for_other_fn) |
| 987 | return -ENETDOWN; |
| 988 | |
| 989 | async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4), |
| 990 | GFP_ATOMIC); |
| 991 | if (!async) |
| 992 | return -ENOMEM; |
| 993 | |
| 994 | async->cmd = cmd; |
| 995 | async->inlen = inlen; |
| 996 | async->outlen = outlen; |
| 997 | async->quiet = quiet; |
| 998 | async->complete = complete; |
| 999 | async->cookie = cookie; |
| 1000 | memcpy(async + 1, inbuf, inlen); |
| 1001 | |
| 1002 | spin_lock_bh(&mcdi->async_lock); |
| 1003 | |
| 1004 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 1005 | list_add_tail(&async->list, &mcdi->async_list); |
| 1006 | |
| 1007 | /* If this is at the front of the queue, try to start it |
| 1008 | * immediately |
| 1009 | */ |
| 1010 | if (mcdi->async_list.next == &async->list && |
| 1011 | efx_mcdi_acquire_async(mcdi)) { |
| 1012 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); |
| 1013 | mod_timer(&mcdi->async_timer, |
| 1014 | jiffies + MCDI_RPC_TIMEOUT); |
| 1015 | } |
| 1016 | } else { |
| 1017 | kfree(async); |
| 1018 | rc = -ENETDOWN; |
| 1019 | } |
| 1020 | |
| 1021 | spin_unlock_bh(&mcdi->async_lock); |
| 1022 | |
| 1023 | return rc; |
| 1024 | } |
| 1025 | |
| 1026 | /** |
| 1027 | * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously |
| 1028 | * @efx: NIC through which to issue the command |
| 1029 | * @cmd: Command type number |
| 1030 | * @inbuf: Command parameters |
| 1031 | * @inlen: Length of command parameters, in bytes |
| 1032 | * @outlen: Length to allocate for response buffer, in bytes |
| 1033 | * @complete: Function to be called on completion or cancellation. |
| 1034 | * @cookie: Arbitrary value to be passed to @complete. |
| 1035 | * |
| 1036 | * This function does not sleep and therefore may be called in atomic |
| 1037 | * context. It will fail if event queues are disabled or if MCDI |
| 1038 | * event completions have been disabled due to an error. |
| 1039 | * |
| 1040 | * If it succeeds, the @complete function will be called exactly once |
| 1041 | * in atomic context, when one of the following occurs: |
| 1042 | * (a) the completion event is received (in NAPI context) |
| 1043 | * (b) event queues are disabled (in the process that disables them) |
| 1044 | * (c) the request times-out (in timer context) |
| 1045 | */ |
| 1046 | int |
| 1047 | efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, |
| 1048 | const efx_dword_t *inbuf, size_t inlen, size_t outlen, |
| 1049 | efx_mcdi_async_completer *complete, unsigned long cookie) |
| 1050 | { |
| 1051 | return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, |
| 1052 | cookie, false); |
| 1053 | } |
| 1054 | |
| 1055 | int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd, |
| 1056 | const efx_dword_t *inbuf, size_t inlen, |
| 1057 | size_t outlen, efx_mcdi_async_completer *complete, |
| 1058 | unsigned long cookie) |
| 1059 | { |
| 1060 | return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, |
| 1061 | cookie, true); |
| 1062 | } |
| 1063 | |
| 1064 | int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen, |
| 1065 | efx_dword_t *outbuf, size_t outlen, |
| 1066 | size_t *outlen_actual) |
| 1067 | { |
| 1068 | return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 1069 | outlen_actual, false, NULL, NULL); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1070 | } |
| 1071 | |
| 1072 | int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen, |
| 1073 | efx_dword_t *outbuf, size_t outlen, |
| 1074 | size_t *outlen_actual) |
| 1075 | { |
| 1076 | return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 1077 | outlen_actual, true, NULL, NULL); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1078 | } |
| 1079 | |
| 1080 | void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd, |
| 1081 | size_t inlen, efx_dword_t *outbuf, |
| 1082 | size_t outlen, int rc) |
| 1083 | { |
| 1084 | int code = 0, err_arg = 0; |
| 1085 | |
| 1086 | if (outlen >= MC_CMD_ERR_CODE_OFST + 4) |
| 1087 | code = MCDI_DWORD(outbuf, ERR_CODE); |
| 1088 | if (outlen >= MC_CMD_ERR_ARG_OFST + 4) |
| 1089 | err_arg = MCDI_DWORD(outbuf, ERR_ARG); |
Jon Cooper | 34e7aef | 2017-01-27 15:02:39 +0000 | [diff] [blame] | 1090 | netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err, |
| 1091 | "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n", |
| 1092 | cmd, inlen, rc, code, err_arg); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1093 | } |
| 1094 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1095 | /* Switch to polled MCDI completions. This can be called in various |
| 1096 | * error conditions with various locks held, so it must be lockless. |
| 1097 | * Caller is responsible for flushing asynchronous requests later. |
| 1098 | */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1099 | void efx_mcdi_mode_poll(struct efx_nic *efx) |
| 1100 | { |
| 1101 | struct efx_mcdi_iface *mcdi; |
| 1102 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 1103 | if (!efx->mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1104 | return; |
| 1105 | |
| 1106 | mcdi = efx_mcdi(efx); |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 1107 | /* If already in polling mode, nothing to do. |
| 1108 | * If in fail-fast state, don't switch to polled completion. |
| 1109 | * FLR recovery will do that later. |
| 1110 | */ |
| 1111 | if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1112 | return; |
| 1113 | |
| 1114 | /* We can switch from event completion to polled completion, because |
| 1115 | * mcdi requests are always completed in shared memory. We do this by |
| 1116 | * switching the mode to POLL'd then completing the request. |
| 1117 | * efx_mcdi_await_completion() will then call efx_mcdi_poll(). |
| 1118 | * |
| 1119 | * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1120 | * which efx_mcdi_complete_sync() provides for us. |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1121 | */ |
| 1122 | mcdi->mode = MCDI_MODE_POLL; |
| 1123 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1124 | efx_mcdi_complete_sync(mcdi); |
| 1125 | } |
| 1126 | |
| 1127 | /* Flush any running or queued asynchronous requests, after event processing |
| 1128 | * is stopped |
| 1129 | */ |
| 1130 | void efx_mcdi_flush_async(struct efx_nic *efx) |
| 1131 | { |
| 1132 | struct efx_mcdi_async_param *async, *next; |
| 1133 | struct efx_mcdi_iface *mcdi; |
| 1134 | |
| 1135 | if (!efx->mcdi) |
| 1136 | return; |
| 1137 | |
| 1138 | mcdi = efx_mcdi(efx); |
| 1139 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 1140 | /* We must be in poll or fail mode so no more requests can be queued */ |
| 1141 | BUG_ON(mcdi->mode == MCDI_MODE_EVENTS); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1142 | |
| 1143 | del_timer_sync(&mcdi->async_timer); |
| 1144 | |
| 1145 | /* If a request is still running, make sure we give the MC |
| 1146 | * time to complete it so that the response won't overwrite our |
| 1147 | * next request. |
| 1148 | */ |
| 1149 | if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) { |
| 1150 | efx_mcdi_poll(efx); |
| 1151 | mcdi->state = MCDI_STATE_QUIESCENT; |
| 1152 | } |
| 1153 | |
| 1154 | /* Nothing else will access the async list now, so it is safe |
| 1155 | * to walk it without holding async_lock. If we hold it while |
| 1156 | * calling a completer then lockdep may warn that we have |
| 1157 | * acquired locks in the wrong order. |
| 1158 | */ |
| 1159 | list_for_each_entry_safe(async, next, &mcdi->async_list, list) { |
Bert Kenward | 429baa6 | 2016-09-22 15:47:45 +0100 | [diff] [blame] | 1160 | if (async->complete) |
| 1161 | async->complete(efx, async->cookie, -ENETDOWN, NULL, 0); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1162 | list_del(&async->list); |
| 1163 | kfree(async); |
| 1164 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1165 | } |
| 1166 | |
| 1167 | void efx_mcdi_mode_event(struct efx_nic *efx) |
| 1168 | { |
| 1169 | struct efx_mcdi_iface *mcdi; |
| 1170 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 1171 | if (!efx->mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1172 | return; |
| 1173 | |
| 1174 | mcdi = efx_mcdi(efx); |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 1175 | /* If already in event completion mode, nothing to do. |
| 1176 | * If in fail-fast state, don't switch to event completion. FLR |
| 1177 | * recovery will do that later. |
| 1178 | */ |
| 1179 | if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1180 | return; |
| 1181 | |
| 1182 | /* We can't switch from polled to event completion in the middle of a |
| 1183 | * request, because the completion method is specified in the request. |
| 1184 | * So acquire the interface to serialise the requestors. We don't need |
| 1185 | * to acquire the iface_lock to change the mode here, but we do need a |
| 1186 | * write memory barrier ensure that efx_mcdi_rpc() sees it, which |
| 1187 | * efx_mcdi_acquire() provides. |
| 1188 | */ |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1189 | efx_mcdi_acquire_sync(mcdi); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1190 | mcdi->mode = MCDI_MODE_EVENTS; |
| 1191 | efx_mcdi_release(mcdi); |
| 1192 | } |
| 1193 | |
| 1194 | static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) |
| 1195 | { |
| 1196 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 1197 | |
| 1198 | /* If there is an outstanding MCDI request, it has been terminated |
| 1199 | * either by a BADASSERT or REBOOT event. If the mcdi interface is |
| 1200 | * in polled mode, then do nothing because the MC reboot handler will |
| 1201 | * set the header correctly. However, if the mcdi interface is waiting |
| 1202 | * for a CMDDONE event it won't receive it [and since all MCDI events |
| 1203 | * are sent to the same queue, we can't be racing with |
| 1204 | * efx_mcdi_ev_cpl()] |
| 1205 | * |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1206 | * If there is an outstanding asynchronous request, we can't |
| 1207 | * complete it now (efx_mcdi_complete() would deadlock). The |
| 1208 | * reset process will take care of this. |
| 1209 | * |
| 1210 | * There's a race here with efx_mcdi_send_request(), because |
| 1211 | * we might receive a REBOOT event *before* the request has |
| 1212 | * been copied out. In polled mode (during startup) this is |
| 1213 | * irrelevant, because efx_mcdi_complete_sync() is ignored. In |
| 1214 | * event mode, this condition is just an edge-case of |
| 1215 | * receiving a REBOOT event after posting the MCDI |
| 1216 | * request. Did the mc reboot before or after the copyout? The |
| 1217 | * best we can do always is just return failure. |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 1218 | * |
| 1219 | * If there is an outstanding proxy response expected it is not going |
| 1220 | * to arrive. We should thus abort it. |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1221 | */ |
| 1222 | spin_lock(&mcdi->iface_lock); |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 1223 | efx_mcdi_proxy_abort(mcdi); |
| 1224 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1225 | if (efx_mcdi_complete_sync(mcdi)) { |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1226 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 1227 | mcdi->resprc = rc; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 1228 | mcdi->resp_hdr_len = 0; |
| 1229 | mcdi->resp_data_len = 0; |
Steve Hodgson | 18e3ee2 | 2010-12-02 13:46:55 +0000 | [diff] [blame] | 1230 | ++mcdi->credits; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1231 | } |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 1232 | } else { |
| 1233 | int count; |
| 1234 | |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 1235 | /* Consume the status word since efx_mcdi_rpc_finish() won't */ |
| 1236 | for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { |
Daniel Pieczko | c577e59 | 2015-10-09 10:40:35 +0100 | [diff] [blame] | 1237 | rc = efx_mcdi_poll_reboot(efx); |
| 1238 | if (rc) |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 1239 | break; |
| 1240 | udelay(MCDI_STATUS_DELAY_US); |
| 1241 | } |
Daniel Pieczko | c577e59 | 2015-10-09 10:40:35 +0100 | [diff] [blame] | 1242 | |
| 1243 | /* On EF10, a CODE_MC_REBOOT event can be received without the |
| 1244 | * reboot detection in efx_mcdi_poll_reboot() being triggered. |
| 1245 | * If zero was returned from the final call to |
| 1246 | * efx_mcdi_poll_reboot(), the MC reboot wasn't noticed but the |
| 1247 | * MC has definitely rebooted so prepare for the reset. |
| 1248 | */ |
| 1249 | if (!rc && efx->type->mcdi_reboot_detected) |
| 1250 | efx->type->mcdi_reboot_detected(efx); |
| 1251 | |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 1252 | mcdi->new_epoch = true; |
Daniel Pieczko | dfdaa95 | 2013-09-18 10:16:24 +0100 | [diff] [blame] | 1253 | |
| 1254 | /* Nobody was waiting for an MCDI request, so trigger a reset */ |
| 1255 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 1256 | } |
| 1257 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1258 | spin_unlock(&mcdi->iface_lock); |
| 1259 | } |
| 1260 | |
Jon Cooper | 74cd60a | 2013-09-16 14:18:51 +0100 | [diff] [blame] | 1261 | /* The MC is going down in to BIST mode. set the BIST flag to block |
| 1262 | * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset |
| 1263 | * (which doesn't actually execute a reset, it waits for the controlling |
| 1264 | * function to reset it). |
| 1265 | */ |
| 1266 | static void efx_mcdi_ev_bist(struct efx_nic *efx) |
| 1267 | { |
| 1268 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 1269 | |
| 1270 | spin_lock(&mcdi->iface_lock); |
| 1271 | efx->mc_bist_for_other_fn = true; |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 1272 | efx_mcdi_proxy_abort(mcdi); |
| 1273 | |
Jon Cooper | 74cd60a | 2013-09-16 14:18:51 +0100 | [diff] [blame] | 1274 | if (efx_mcdi_complete_sync(mcdi)) { |
| 1275 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 1276 | mcdi->resprc = -EIO; |
| 1277 | mcdi->resp_hdr_len = 0; |
| 1278 | mcdi->resp_data_len = 0; |
| 1279 | ++mcdi->credits; |
| 1280 | } |
| 1281 | } |
| 1282 | mcdi->new_epoch = true; |
| 1283 | efx_schedule_reset(efx, RESET_TYPE_MC_BIST); |
| 1284 | spin_unlock(&mcdi->iface_lock); |
| 1285 | } |
| 1286 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 1287 | /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try |
| 1288 | * to recover. |
| 1289 | */ |
| 1290 | static void efx_mcdi_abandon(struct efx_nic *efx) |
| 1291 | { |
| 1292 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 1293 | |
| 1294 | if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL) |
| 1295 | return; /* it had already been done */ |
| 1296 | netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n"); |
| 1297 | efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT); |
| 1298 | } |
| 1299 | |
Edward Cree | 53172d9 | 2017-06-30 15:55:28 +0100 | [diff] [blame] | 1300 | /* Called from efx_farch_ev_process and efx_ef10_ev_process for MCDI events */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1301 | void efx_mcdi_process_event(struct efx_channel *channel, |
| 1302 | efx_qword_t *event) |
| 1303 | { |
| 1304 | struct efx_nic *efx = channel->efx; |
| 1305 | int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); |
| 1306 | u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); |
| 1307 | |
| 1308 | switch (code) { |
| 1309 | case MCDI_EVENT_CODE_BADSSERT: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1310 | netif_err(efx, hw, efx->net_dev, |
| 1311 | "MC watchdog or assertion failure at 0x%x\n", data); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 1312 | efx_mcdi_ev_death(efx, -EINTR); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1313 | break; |
| 1314 | |
| 1315 | case MCDI_EVENT_CODE_PMNOTICE: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1316 | netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1317 | break; |
| 1318 | |
| 1319 | case MCDI_EVENT_CODE_CMDDONE: |
| 1320 | efx_mcdi_ev_cpl(efx, |
| 1321 | MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), |
| 1322 | MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), |
| 1323 | MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); |
| 1324 | break; |
| 1325 | |
| 1326 | case MCDI_EVENT_CODE_LINKCHANGE: |
| 1327 | efx_mcdi_process_link_change(efx, event); |
| 1328 | break; |
| 1329 | case MCDI_EVENT_CODE_SENSOREVT: |
| 1330 | efx_mcdi_sensor_event(efx, event); |
| 1331 | break; |
| 1332 | case MCDI_EVENT_CODE_SCHEDERR: |
Robert Stonehouse | 2d9955b | 2013-10-07 18:44:17 +0100 | [diff] [blame] | 1333 | netif_dbg(efx, hw, efx->net_dev, |
| 1334 | "MC Scheduler alert (0x%x)\n", data); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1335 | break; |
| 1336 | case MCDI_EVENT_CODE_REBOOT: |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1337 | case MCDI_EVENT_CODE_MC_REBOOT: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1338 | netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 1339 | efx_mcdi_ev_death(efx, -EIO); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1340 | break; |
Jon Cooper | 74cd60a | 2013-09-16 14:18:51 +0100 | [diff] [blame] | 1341 | case MCDI_EVENT_CODE_MC_BIST: |
| 1342 | netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n"); |
| 1343 | efx_mcdi_ev_bist(efx); |
| 1344 | break; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1345 | case MCDI_EVENT_CODE_MAC_STATS_DMA: |
| 1346 | /* MAC stats are gather lazily. We can ignore this. */ |
| 1347 | break; |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1348 | case MCDI_EVENT_CODE_FLR: |
Shradha Shah | 7fa8d54 | 2015-05-06 00:55:13 +0100 | [diff] [blame] | 1349 | if (efx->type->sriov_flr) |
| 1350 | efx->type->sriov_flr(efx, |
| 1351 | MCDI_EVENT_FIELD(*event, FLR_VF)); |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1352 | break; |
Stuart Hodgson | 7c236c4 | 2012-09-03 11:09:36 +0100 | [diff] [blame] | 1353 | case MCDI_EVENT_CODE_PTP_RX: |
| 1354 | case MCDI_EVENT_CODE_PTP_FAULT: |
| 1355 | case MCDI_EVENT_CODE_PTP_PPS: |
| 1356 | efx_ptp_event(efx, event); |
| 1357 | break; |
Jon Cooper | bd9a265 | 2013-11-18 12:54:41 +0000 | [diff] [blame] | 1358 | case MCDI_EVENT_CODE_PTP_TIME: |
| 1359 | efx_time_sync_event(channel, event); |
| 1360 | break; |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1361 | case MCDI_EVENT_CODE_TX_FLUSH: |
| 1362 | case MCDI_EVENT_CODE_RX_FLUSH: |
| 1363 | /* Two flush events will be sent: one to the same event |
| 1364 | * queue as completions, and one to event queue 0. |
| 1365 | * In the latter case the {RX,TX}_FLUSH_TO_DRIVER |
| 1366 | * flag will be set, and we should ignore the event |
| 1367 | * because we want to wait for all completions. |
| 1368 | */ |
| 1369 | BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN != |
| 1370 | MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN); |
| 1371 | if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER)) |
| 1372 | efx_ef10_handle_drain_event(efx); |
| 1373 | break; |
Alexandre Rames | 3de82b9 | 2013-06-13 11:36:15 +0100 | [diff] [blame] | 1374 | case MCDI_EVENT_CODE_TX_ERR: |
| 1375 | case MCDI_EVENT_CODE_RX_ERR: |
| 1376 | netif_err(efx, hw, efx->net_dev, |
| 1377 | "%s DMA error (event: "EFX_QWORD_FMT")\n", |
| 1378 | code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX", |
| 1379 | EFX_QWORD_VAL(*event)); |
| 1380 | efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR); |
| 1381 | break; |
Bert Kenward | acd43a9 | 2015-12-23 08:57:18 +0000 | [diff] [blame] | 1382 | case MCDI_EVENT_CODE_PROXY_RESPONSE: |
| 1383 | efx_mcdi_ev_proxy_response(efx, |
| 1384 | MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE), |
| 1385 | MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC)); |
| 1386 | break; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1387 | default: |
Jon Cooper | 4e2e347 | 2017-06-30 15:54:33 +0100 | [diff] [blame] | 1388 | netif_err(efx, hw, efx->net_dev, |
| 1389 | "Unknown MCDI event " EFX_QWORD_FMT "\n", |
| 1390 | EFX_QWORD_VAL(*event)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1391 | } |
| 1392 | } |
| 1393 | |
| 1394 | /************************************************************************** |
| 1395 | * |
| 1396 | * Specific request functions |
| 1397 | * |
| 1398 | ************************************************************************** |
| 1399 | */ |
| 1400 | |
Ben Hutchings | e5f0fd2 | 2011-02-24 23:57:47 +0000 | [diff] [blame] | 1401 | void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1402 | { |
Daniel Pieczko | 8d9f9dd | 2015-05-06 00:56:55 +0100 | [diff] [blame] | 1403 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1404 | size_t outlength; |
| 1405 | const __le16 *ver_words; |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1406 | size_t offset; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1407 | int rc; |
| 1408 | |
| 1409 | BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1410 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, |
| 1411 | outbuf, sizeof(outbuf), &outlength); |
| 1412 | if (rc) |
| 1413 | goto fail; |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 1414 | if (outlength < MC_CMD_GET_VERSION_OUT_LEN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1415 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1416 | goto fail; |
| 1417 | } |
| 1418 | |
| 1419 | ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1420 | offset = snprintf(buf, len, "%u.%u.%u.%u", |
| 1421 | le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]), |
| 1422 | le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3])); |
| 1423 | |
| 1424 | /* EF10 may have multiple datapath firmware variants within a |
| 1425 | * single version. Report which variants are running. |
| 1426 | */ |
| 1427 | if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) { |
Daniel Pieczko | 8d9f9dd | 2015-05-06 00:56:55 +0100 | [diff] [blame] | 1428 | struct efx_ef10_nic_data *nic_data = efx->nic_data; |
| 1429 | |
| 1430 | offset += snprintf(buf + offset, len - offset, " rx%x tx%x", |
| 1431 | nic_data->rx_dpcpu_fw_id, |
| 1432 | nic_data->tx_dpcpu_fw_id); |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1433 | |
| 1434 | /* It's theoretically possible for the string to exceed 31 |
| 1435 | * characters, though in practice the first three version |
| 1436 | * components are short enough that this doesn't happen. |
| 1437 | */ |
| 1438 | if (WARN_ON(offset >= len)) |
| 1439 | buf[0] = 0; |
| 1440 | } |
| 1441 | |
Ben Hutchings | e5f0fd2 | 2011-02-24 23:57:47 +0000 | [diff] [blame] | 1442 | return; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1443 | |
| 1444 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1445 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | e5f0fd2 | 2011-02-24 23:57:47 +0000 | [diff] [blame] | 1446 | buf[0] = 0; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1447 | } |
| 1448 | |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 1449 | static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, |
| 1450 | bool *was_attached) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1451 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1452 | MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN); |
Ben Hutchings | ecb1c9c | 2013-10-07 20:10:11 +0100 | [diff] [blame] | 1453 | MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1454 | size_t outlen; |
| 1455 | int rc; |
| 1456 | |
| 1457 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, |
| 1458 | driver_operating ? 1 : 0); |
| 1459 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); |
Ben Hutchings | f2b0bef | 2013-08-20 20:35:50 +0100 | [diff] [blame] | 1460 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1461 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1462 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf), |
| 1463 | outbuf, sizeof(outbuf), &outlen); |
| 1464 | /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID |
| 1465 | * specified will fail with EPERM, and we have to tell the MC we don't |
| 1466 | * care what firmware we get. |
| 1467 | */ |
| 1468 | if (rc == -EPERM) { |
| 1469 | netif_dbg(efx, probe, efx->net_dev, |
| 1470 | "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n"); |
| 1471 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, |
| 1472 | MC_CMD_FW_DONT_CARE); |
| 1473 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, |
| 1474 | sizeof(inbuf), outbuf, sizeof(outbuf), |
| 1475 | &outlen); |
| 1476 | } |
| 1477 | if (rc) { |
| 1478 | efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf), |
| 1479 | outbuf, outlen, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1480 | goto fail; |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1481 | } |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1482 | if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { |
| 1483 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1484 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1485 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1486 | |
Ben Hutchings | 8349f7f | 2013-10-16 18:32:34 +0100 | [diff] [blame] | 1487 | if (driver_operating) { |
| 1488 | if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) { |
| 1489 | efx->mcdi->fn_flags = |
| 1490 | MCDI_DWORD(outbuf, |
| 1491 | DRV_ATTACH_EXT_OUT_FUNC_FLAGS); |
| 1492 | } else { |
| 1493 | /* Synthesise flags for Siena */ |
| 1494 | efx->mcdi->fn_flags = |
| 1495 | 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL | |
| 1496 | 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED | |
| 1497 | (efx_port_num(efx) == 0) << |
| 1498 | MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY; |
| 1499 | } |
| 1500 | } |
| 1501 | |
Ben Hutchings | ecb1c9c | 2013-10-07 20:10:11 +0100 | [diff] [blame] | 1502 | /* We currently assume we have control of the external link |
| 1503 | * and are completely trusted by firmware. Abort probing |
| 1504 | * if that's not true for this function. |
| 1505 | */ |
Ben Hutchings | ecb1c9c | 2013-10-07 20:10:11 +0100 | [diff] [blame] | 1506 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1507 | if (was_attached != NULL) |
| 1508 | *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); |
| 1509 | return 0; |
| 1510 | |
| 1511 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1512 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1513 | return rc; |
| 1514 | } |
| 1515 | |
| 1516 | int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, |
Matthew Slattery | 6aa9c7f | 2010-07-14 15:36:19 +0100 | [diff] [blame] | 1517 | u16 *fw_subtype_list, u32 *capabilities) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1518 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1519 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX); |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1520 | size_t outlen, i; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1521 | int port_num = efx_port_num(efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1522 | int rc; |
| 1523 | |
| 1524 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); |
Edward Cree | cd84ff4 | 2014-03-07 18:27:41 +0000 | [diff] [blame] | 1525 | /* we need __aligned(2) for ether_addr_copy */ |
| 1526 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1); |
| 1527 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1528 | |
| 1529 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, |
| 1530 | outbuf, sizeof(outbuf), &outlen); |
| 1531 | if (rc) |
| 1532 | goto fail; |
| 1533 | |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 1534 | if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1535 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1536 | goto fail; |
| 1537 | } |
| 1538 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1539 | if (mac_address) |
Edward Cree | cd84ff4 | 2014-03-07 18:27:41 +0000 | [diff] [blame] | 1540 | ether_addr_copy(mac_address, |
| 1541 | port_num ? |
| 1542 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) : |
| 1543 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0)); |
Ben Hutchings | bfeed90 | 2012-09-07 00:58:10 +0100 | [diff] [blame] | 1544 | if (fw_subtype_list) { |
Ben Hutchings | bfeed90 | 2012-09-07 00:58:10 +0100 | [diff] [blame] | 1545 | for (i = 0; |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1546 | i < MCDI_VAR_ARRAY_LEN(outlen, |
| 1547 | GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); |
| 1548 | i++) |
| 1549 | fw_subtype_list[i] = MCDI_ARRAY_WORD( |
| 1550 | outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i); |
| 1551 | for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++) |
| 1552 | fw_subtype_list[i] = 0; |
Ben Hutchings | bfeed90 | 2012-09-07 00:58:10 +0100 | [diff] [blame] | 1553 | } |
Matthew Slattery | 6aa9c7f | 2010-07-14 15:36:19 +0100 | [diff] [blame] | 1554 | if (capabilities) { |
| 1555 | if (port_num) |
| 1556 | *capabilities = MCDI_DWORD(outbuf, |
| 1557 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); |
| 1558 | else |
| 1559 | *capabilities = MCDI_DWORD(outbuf, |
| 1560 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); |
| 1561 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1562 | |
| 1563 | return 0; |
| 1564 | |
| 1565 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1566 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", |
| 1567 | __func__, rc, (int)outlen); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1568 | |
| 1569 | return rc; |
| 1570 | } |
| 1571 | |
| 1572 | int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq) |
| 1573 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1574 | MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1575 | u32 dest = 0; |
| 1576 | int rc; |
| 1577 | |
| 1578 | if (uart) |
| 1579 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; |
| 1580 | if (evq) |
| 1581 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; |
| 1582 | |
| 1583 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); |
| 1584 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); |
| 1585 | |
| 1586 | BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); |
| 1587 | |
| 1588 | rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), |
| 1589 | NULL, 0, NULL); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1590 | return rc; |
| 1591 | } |
| 1592 | |
| 1593 | int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) |
| 1594 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1595 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1596 | size_t outlen; |
| 1597 | int rc; |
| 1598 | |
| 1599 | BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); |
| 1600 | |
| 1601 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, |
| 1602 | outbuf, sizeof(outbuf), &outlen); |
| 1603 | if (rc) |
| 1604 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1605 | if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { |
| 1606 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1607 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1608 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1609 | |
| 1610 | *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); |
| 1611 | return 0; |
| 1612 | |
| 1613 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1614 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
| 1615 | __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1616 | return rc; |
| 1617 | } |
| 1618 | |
| 1619 | int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, |
| 1620 | size_t *size_out, size_t *erase_size_out, |
| 1621 | bool *protected_out) |
| 1622 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1623 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN); |
| 1624 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1625 | size_t outlen; |
| 1626 | int rc; |
| 1627 | |
| 1628 | MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); |
| 1629 | |
| 1630 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), |
| 1631 | outbuf, sizeof(outbuf), &outlen); |
| 1632 | if (rc) |
| 1633 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1634 | if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { |
| 1635 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1636 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1637 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1638 | |
| 1639 | *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); |
| 1640 | *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); |
| 1641 | *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 1642 | (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1643 | return 0; |
| 1644 | |
| 1645 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1646 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1647 | return rc; |
| 1648 | } |
| 1649 | |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1650 | static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) |
| 1651 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1652 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN); |
| 1653 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN); |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1654 | int rc; |
| 1655 | |
| 1656 | MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); |
| 1657 | |
| 1658 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), |
| 1659 | outbuf, sizeof(outbuf), NULL); |
| 1660 | if (rc) |
| 1661 | return rc; |
| 1662 | |
| 1663 | switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { |
| 1664 | case MC_CMD_NVRAM_TEST_PASS: |
| 1665 | case MC_CMD_NVRAM_TEST_NOTSUPP: |
| 1666 | return 0; |
| 1667 | default: |
| 1668 | return -EIO; |
| 1669 | } |
| 1670 | } |
| 1671 | |
| 1672 | int efx_mcdi_nvram_test_all(struct efx_nic *efx) |
| 1673 | { |
| 1674 | u32 nvram_types; |
| 1675 | unsigned int type; |
| 1676 | int rc; |
| 1677 | |
| 1678 | rc = efx_mcdi_nvram_types(efx, &nvram_types); |
| 1679 | if (rc) |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1680 | goto fail1; |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1681 | |
| 1682 | type = 0; |
| 1683 | while (nvram_types != 0) { |
| 1684 | if (nvram_types & 1) { |
| 1685 | rc = efx_mcdi_nvram_test(efx, type); |
| 1686 | if (rc) |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1687 | goto fail2; |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1688 | } |
| 1689 | type++; |
| 1690 | nvram_types >>= 1; |
| 1691 | } |
| 1692 | |
| 1693 | return 0; |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1694 | |
| 1695 | fail2: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1696 | netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", |
| 1697 | __func__, type); |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1698 | fail1: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1699 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1700 | return rc; |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1701 | } |
| 1702 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1703 | /* Returns 1 if an assertion was read, 0 if no assertion had fired, |
| 1704 | * negative on error. |
| 1705 | */ |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1706 | static int efx_mcdi_read_assertion(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1707 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1708 | MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN); |
Jon Cooper | aa09a3d | 2015-05-20 11:10:41 +0100 | [diff] [blame] | 1709 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN); |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1710 | unsigned int flags, index; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1711 | const char *reason; |
| 1712 | size_t outlen; |
| 1713 | int retry; |
| 1714 | int rc; |
| 1715 | |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1716 | /* Attempt to read any stored assertion state before we reboot |
| 1717 | * the mcfw out of the assertion handler. Retry twice, once |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1718 | * because a boot-time assertion might cause this command to fail |
| 1719 | * with EINTR. And once again because GET_ASSERTS can race with |
| 1720 | * MC_CMD_REBOOT running on the other port. */ |
| 1721 | retry = 2; |
| 1722 | do { |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1723 | MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1724 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS, |
| 1725 | inbuf, MC_CMD_GET_ASSERTS_IN_LEN, |
| 1726 | outbuf, sizeof(outbuf), &outlen); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1727 | if (rc == -EPERM) |
| 1728 | return 0; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1729 | } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); |
| 1730 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1731 | if (rc) { |
| 1732 | efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS, |
| 1733 | MC_CMD_GET_ASSERTS_IN_LEN, outbuf, |
| 1734 | outlen, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1735 | return rc; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1736 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1737 | if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1738 | return -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1739 | |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1740 | /* Print out any recorded assertion state */ |
| 1741 | flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1742 | if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) |
| 1743 | return 0; |
| 1744 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1745 | reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) |
| 1746 | ? "system-level assertion" |
| 1747 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) |
| 1748 | ? "thread-level assertion" |
| 1749 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) |
| 1750 | ? "watchdog reset" |
| 1751 | : "unknown assertion"; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1752 | netif_err(efx, hw, efx->net_dev, |
| 1753 | "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, |
| 1754 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), |
| 1755 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1756 | |
| 1757 | /* Print out the registers */ |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1758 | for (index = 0; |
| 1759 | index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM; |
| 1760 | index++) |
| 1761 | netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", |
| 1762 | 1 + index, |
| 1763 | MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS, |
| 1764 | index)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1765 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1766 | return 1; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1767 | } |
| 1768 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1769 | static int efx_mcdi_exit_assertion(struct efx_nic *efx) |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1770 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1771 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1772 | int rc; |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1773 | |
Ben Hutchings | 0f1e54a | 2012-07-02 23:37:40 +0100 | [diff] [blame] | 1774 | /* If the MC is running debug firmware, it might now be |
| 1775 | * waiting for a debugger to attach, but we just want it to |
| 1776 | * reboot. We set a flag that makes the command a no-op if it |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1777 | * has already done so. |
| 1778 | * The MCDI will thus return either 0 or -EIO. |
Ben Hutchings | 0f1e54a | 2012-07-02 23:37:40 +0100 | [diff] [blame] | 1779 | */ |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1780 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); |
| 1781 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, |
| 1782 | MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1783 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN, |
| 1784 | NULL, 0, NULL); |
| 1785 | if (rc == -EIO) |
| 1786 | rc = 0; |
| 1787 | if (rc) |
| 1788 | efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN, |
| 1789 | NULL, 0, rc); |
| 1790 | return rc; |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1791 | } |
| 1792 | |
| 1793 | int efx_mcdi_handle_assertion(struct efx_nic *efx) |
| 1794 | { |
| 1795 | int rc; |
| 1796 | |
| 1797 | rc = efx_mcdi_read_assertion(efx); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1798 | if (rc <= 0) |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1799 | return rc; |
| 1800 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1801 | return efx_mcdi_exit_assertion(efx); |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1802 | } |
| 1803 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1804 | void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) |
| 1805 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1806 | MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1807 | int rc; |
| 1808 | |
| 1809 | BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); |
| 1810 | BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); |
| 1811 | BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); |
| 1812 | |
| 1813 | BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); |
| 1814 | |
| 1815 | MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); |
| 1816 | |
| 1817 | rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), |
| 1818 | NULL, 0, NULL); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1819 | } |
| 1820 | |
Jon Cooper | 3e33626 | 2014-01-17 19:48:06 +0000 | [diff] [blame] | 1821 | static int efx_mcdi_reset_func(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1822 | { |
Jon Cooper | 3e33626 | 2014-01-17 19:48:06 +0000 | [diff] [blame] | 1823 | MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN); |
| 1824 | int rc; |
| 1825 | |
| 1826 | BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0); |
| 1827 | MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG, |
| 1828 | ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1); |
| 1829 | rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf), |
| 1830 | NULL, 0, NULL); |
| 1831 | return rc; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1832 | } |
| 1833 | |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1834 | static int efx_mcdi_reset_mc(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1835 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1836 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1837 | int rc; |
| 1838 | |
| 1839 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); |
| 1840 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); |
| 1841 | rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), |
| 1842 | NULL, 0, NULL); |
| 1843 | /* White is black, and up is down */ |
| 1844 | if (rc == -EIO) |
| 1845 | return 0; |
| 1846 | if (rc == 0) |
| 1847 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1848 | return rc; |
| 1849 | } |
| 1850 | |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1851 | enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason) |
| 1852 | { |
| 1853 | return RESET_TYPE_RECOVER_OR_ALL; |
| 1854 | } |
| 1855 | |
| 1856 | int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method) |
| 1857 | { |
| 1858 | int rc; |
| 1859 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 1860 | /* If MCDI is down, we can't handle_assertion */ |
| 1861 | if (method == RESET_TYPE_MCDI_TIMEOUT) { |
| 1862 | rc = pci_reset_function(efx->pci_dev); |
| 1863 | if (rc) |
| 1864 | return rc; |
| 1865 | /* Re-enable polled MCDI completion */ |
| 1866 | if (efx->mcdi) { |
| 1867 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 1868 | mcdi->mode = MCDI_MODE_POLL; |
| 1869 | } |
| 1870 | return 0; |
| 1871 | } |
| 1872 | |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1873 | /* Recover from a failed assertion pre-reset */ |
| 1874 | rc = efx_mcdi_handle_assertion(efx); |
| 1875 | if (rc) |
| 1876 | return rc; |
| 1877 | |
Jon Cooper | 087e902 | 2015-05-20 11:11:35 +0100 | [diff] [blame] | 1878 | if (method == RESET_TYPE_DATAPATH) |
| 1879 | return 0; |
| 1880 | else if (method == RESET_TYPE_WORLD) |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1881 | return efx_mcdi_reset_mc(efx); |
| 1882 | else |
Jon Cooper | 3e33626 | 2014-01-17 19:48:06 +0000 | [diff] [blame] | 1883 | return efx_mcdi_reset_func(efx); |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1884 | } |
| 1885 | |
stephen hemminger | d215697 | 2010-10-18 05:27:31 +0000 | [diff] [blame] | 1886 | static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, |
| 1887 | const u8 *mac, int *id_out) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1888 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1889 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN); |
| 1890 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1891 | size_t outlen; |
| 1892 | int rc; |
| 1893 | |
| 1894 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); |
| 1895 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, |
| 1896 | MC_CMD_FILTER_MODE_SIMPLE); |
Edward Cree | cd84ff4 | 2014-03-07 18:27:41 +0000 | [diff] [blame] | 1897 | ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1898 | |
| 1899 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf), |
| 1900 | outbuf, sizeof(outbuf), &outlen); |
| 1901 | if (rc) |
| 1902 | goto fail; |
| 1903 | |
| 1904 | if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1905 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1906 | goto fail; |
| 1907 | } |
| 1908 | |
| 1909 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); |
| 1910 | |
| 1911 | return 0; |
| 1912 | |
| 1913 | fail: |
| 1914 | *id_out = -1; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1915 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1916 | return rc; |
| 1917 | |
| 1918 | } |
| 1919 | |
| 1920 | |
| 1921 | int |
| 1922 | efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out) |
| 1923 | { |
| 1924 | return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); |
| 1925 | } |
| 1926 | |
| 1927 | |
| 1928 | int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) |
| 1929 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1930 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1931 | size_t outlen; |
| 1932 | int rc; |
| 1933 | |
| 1934 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, |
| 1935 | outbuf, sizeof(outbuf), &outlen); |
| 1936 | if (rc) |
| 1937 | goto fail; |
| 1938 | |
| 1939 | if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1940 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1941 | goto fail; |
| 1942 | } |
| 1943 | |
| 1944 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); |
| 1945 | |
| 1946 | return 0; |
| 1947 | |
| 1948 | fail: |
| 1949 | *id_out = -1; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1950 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1951 | return rc; |
| 1952 | } |
| 1953 | |
| 1954 | |
| 1955 | int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id) |
| 1956 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1957 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1958 | int rc; |
| 1959 | |
| 1960 | MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); |
| 1961 | |
| 1962 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf), |
| 1963 | NULL, 0, NULL); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1964 | return rc; |
| 1965 | } |
| 1966 | |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1967 | int efx_mcdi_flush_rxqs(struct efx_nic *efx) |
| 1968 | { |
| 1969 | struct efx_channel *channel; |
| 1970 | struct efx_rx_queue *rx_queue; |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1971 | MCDI_DECLARE_BUF(inbuf, |
| 1972 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1973 | int rc, count; |
| 1974 | |
Ben Hutchings | 4507837 | 2012-09-19 02:53:34 +0100 | [diff] [blame] | 1975 | BUILD_BUG_ON(EFX_MAX_CHANNELS > |
| 1976 | MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM); |
| 1977 | |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1978 | count = 0; |
| 1979 | efx_for_each_channel(channel, efx) { |
| 1980 | efx_for_each_channel_rx_queue(rx_queue, channel) { |
| 1981 | if (rx_queue->flush_pending) { |
| 1982 | rx_queue->flush_pending = false; |
| 1983 | atomic_dec(&efx->rxq_flush_pending); |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1984 | MCDI_SET_ARRAY_DWORD( |
| 1985 | inbuf, FLUSH_RX_QUEUES_IN_QID_OFST, |
| 1986 | count, efx_rx_queue_index(rx_queue)); |
| 1987 | count++; |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1988 | } |
| 1989 | } |
| 1990 | } |
| 1991 | |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1992 | rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf, |
| 1993 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL); |
Ben Hutchings | bbec969 | 2012-09-11 18:25:13 +0100 | [diff] [blame] | 1994 | WARN_ON(rc < 0); |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1995 | |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1996 | return rc; |
| 1997 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1998 | |
| 1999 | int efx_mcdi_wol_filter_reset(struct efx_nic *efx) |
| 2000 | { |
| 2001 | int rc; |
| 2002 | |
| 2003 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 2004 | return rc; |
| 2005 | } |
| 2006 | |
Daniel Pieczko | 34ccfe6 | 2015-07-21 15:09:43 +0100 | [diff] [blame] | 2007 | int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled, |
| 2008 | unsigned int *flags) |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 2009 | { |
| 2010 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN); |
Daniel Pieczko | 34ccfe6 | 2015-07-21 15:09:43 +0100 | [diff] [blame] | 2011 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN); |
| 2012 | size_t outlen; |
| 2013 | int rc; |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 2014 | |
| 2015 | BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0); |
| 2016 | MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type); |
| 2017 | MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled); |
Daniel Pieczko | 34ccfe6 | 2015-07-21 15:09:43 +0100 | [diff] [blame] | 2018 | rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf), |
| 2019 | outbuf, sizeof(outbuf), &outlen); |
| 2020 | if (rc) |
| 2021 | return rc; |
| 2022 | |
| 2023 | if (!flags) |
| 2024 | return 0; |
| 2025 | |
| 2026 | if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN) |
| 2027 | *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS); |
| 2028 | else |
| 2029 | *flags = 0; |
| 2030 | |
| 2031 | return 0; |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 2032 | } |
| 2033 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 2034 | int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out, |
| 2035 | unsigned int *enabled_out) |
| 2036 | { |
Jon Cooper | aa09a3d | 2015-05-20 11:10:41 +0100 | [diff] [blame] | 2037 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 2038 | size_t outlen; |
| 2039 | int rc; |
| 2040 | |
| 2041 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0, |
| 2042 | outbuf, sizeof(outbuf), &outlen); |
| 2043 | if (rc) |
| 2044 | goto fail; |
| 2045 | |
| 2046 | if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) { |
| 2047 | rc = -EIO; |
| 2048 | goto fail; |
| 2049 | } |
| 2050 | |
| 2051 | if (impl_out) |
| 2052 | *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED); |
| 2053 | |
| 2054 | if (enabled_out) |
| 2055 | *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED); |
| 2056 | |
| 2057 | return 0; |
| 2058 | |
| 2059 | fail: |
Edward Cree | 832dc9e | 2015-07-21 15:09:31 +0100 | [diff] [blame] | 2060 | /* Older firmware lacks GET_WORKAROUNDS and this isn't especially |
| 2061 | * terrifying. The call site will have to deal with it though. |
| 2062 | */ |
Jon Cooper | 34e7aef | 2017-01-27 15:02:39 +0000 | [diff] [blame] | 2063 | netif_cond_dbg(efx, hw, efx->net_dev, rc == -ENOSYS, err, |
| 2064 | "%s: failed rc=%d\n", __func__, rc); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 2065 | return rc; |
| 2066 | } |
| 2067 | |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2068 | #ifdef CONFIG_SFC_MTD |
| 2069 | |
| 2070 | #define EFX_MCDI_NVRAM_LEN_MAX 128 |
| 2071 | |
| 2072 | static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) |
| 2073 | { |
Bert Kenward | 5fb1bee | 2019-01-16 10:00:39 +0000 | [diff] [blame] | 2074 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2075 | int rc; |
| 2076 | |
| 2077 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); |
Bert Kenward | 5fb1bee | 2019-01-16 10:00:39 +0000 | [diff] [blame] | 2078 | MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_START_V2_IN_FLAGS, |
| 2079 | NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT, |
| 2080 | 1); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2081 | |
| 2082 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); |
| 2083 | |
| 2084 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf), |
| 2085 | NULL, 0, NULL); |
Bert Kenward | 5fb1bee | 2019-01-16 10:00:39 +0000 | [diff] [blame] | 2086 | |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2087 | return rc; |
| 2088 | } |
| 2089 | |
| 2090 | static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, |
| 2091 | loff_t offset, u8 *buffer, size_t length) |
| 2092 | { |
Bert Kenward | 5fb1bee | 2019-01-16 10:00:39 +0000 | [diff] [blame] | 2093 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_V2_LEN); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2094 | MCDI_DECLARE_BUF(outbuf, |
| 2095 | MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)); |
| 2096 | size_t outlen; |
| 2097 | int rc; |
| 2098 | |
| 2099 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); |
| 2100 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); |
| 2101 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); |
Bert Kenward | 5fb1bee | 2019-01-16 10:00:39 +0000 | [diff] [blame] | 2102 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_V2_MODE, |
| 2103 | MC_CMD_NVRAM_READ_IN_V2_DEFAULT); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2104 | |
| 2105 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), |
| 2106 | outbuf, sizeof(outbuf), &outlen); |
| 2107 | if (rc) |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 2108 | return rc; |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2109 | |
| 2110 | memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); |
| 2111 | return 0; |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2112 | } |
| 2113 | |
| 2114 | static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, |
| 2115 | loff_t offset, const u8 *buffer, size_t length) |
| 2116 | { |
| 2117 | MCDI_DECLARE_BUF(inbuf, |
| 2118 | MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)); |
| 2119 | int rc; |
| 2120 | |
| 2121 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); |
| 2122 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); |
| 2123 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); |
| 2124 | memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); |
| 2125 | |
| 2126 | BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); |
| 2127 | |
| 2128 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, |
| 2129 | ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), |
| 2130 | NULL, 0, NULL); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2131 | return rc; |
| 2132 | } |
| 2133 | |
| 2134 | static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, |
| 2135 | loff_t offset, size_t length) |
| 2136 | { |
| 2137 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN); |
| 2138 | int rc; |
| 2139 | |
| 2140 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); |
| 2141 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); |
| 2142 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); |
| 2143 | |
| 2144 | BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); |
| 2145 | |
| 2146 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), |
| 2147 | NULL, 0, NULL); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2148 | return rc; |
| 2149 | } |
| 2150 | |
| 2151 | static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) |
| 2152 | { |
Bert Kenward | 5fb1bee | 2019-01-16 10:00:39 +0000 | [diff] [blame] | 2153 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN); |
| 2154 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN); |
| 2155 | size_t outlen; |
| 2156 | int rc, rc2; |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2157 | |
| 2158 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); |
Bert Kenward | 5fb1bee | 2019-01-16 10:00:39 +0000 | [diff] [blame] | 2159 | /* Always set this flag. Old firmware ignores it */ |
| 2160 | MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS, |
| 2161 | NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT, |
| 2162 | 1); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2163 | |
| 2164 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf), |
Bert Kenward | 5fb1bee | 2019-01-16 10:00:39 +0000 | [diff] [blame] | 2165 | outbuf, sizeof(outbuf), &outlen); |
| 2166 | if (!rc && outlen >= MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) { |
| 2167 | rc2 = MCDI_DWORD(outbuf, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE); |
| 2168 | if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS) |
| 2169 | netif_err(efx, drv, efx->net_dev, |
| 2170 | "NVRAM update failed verification with code 0x%x\n", |
| 2171 | rc2); |
| 2172 | switch (rc2) { |
| 2173 | case MC_CMD_NVRAM_VERIFY_RC_SUCCESS: |
| 2174 | break; |
| 2175 | case MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED: |
| 2176 | case MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED: |
| 2177 | case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED: |
| 2178 | case MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED: |
| 2179 | case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED: |
| 2180 | rc = -EIO; |
| 2181 | break; |
| 2182 | case MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT: |
| 2183 | case MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST: |
| 2184 | rc = -EINVAL; |
| 2185 | break; |
| 2186 | case MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES: |
| 2187 | case MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS: |
| 2188 | case MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH: |
| 2189 | rc = -EPERM; |
| 2190 | break; |
| 2191 | default: |
| 2192 | netif_err(efx, drv, efx->net_dev, |
| 2193 | "Unknown response to NVRAM_UPDATE_FINISH\n"); |
| 2194 | rc = -EIO; |
| 2195 | } |
| 2196 | } |
| 2197 | |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 2198 | return rc; |
| 2199 | } |
| 2200 | |
| 2201 | int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start, |
| 2202 | size_t len, size_t *retlen, u8 *buffer) |
| 2203 | { |
| 2204 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 2205 | struct efx_nic *efx = mtd->priv; |
| 2206 | loff_t offset = start; |
| 2207 | loff_t end = min_t(loff_t, start + len, mtd->size); |
| 2208 | size_t chunk; |
| 2209 | int rc = 0; |
| 2210 | |
| 2211 | while (offset < end) { |
| 2212 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); |
| 2213 | rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset, |
| 2214 | buffer, chunk); |
| 2215 | if (rc) |
| 2216 | goto out; |
| 2217 | offset += chunk; |
| 2218 | buffer += chunk; |
| 2219 | } |
| 2220 | out: |
| 2221 | *retlen = offset - start; |
| 2222 | return rc; |
| 2223 | } |
| 2224 | |
| 2225 | int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) |
| 2226 | { |
| 2227 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 2228 | struct efx_nic *efx = mtd->priv; |
| 2229 | loff_t offset = start & ~((loff_t)(mtd->erasesize - 1)); |
| 2230 | loff_t end = min_t(loff_t, start + len, mtd->size); |
| 2231 | size_t chunk = part->common.mtd.erasesize; |
| 2232 | int rc = 0; |
| 2233 | |
| 2234 | if (!part->updating) { |
| 2235 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); |
| 2236 | if (rc) |
| 2237 | goto out; |
| 2238 | part->updating = true; |
| 2239 | } |
| 2240 | |
| 2241 | /* The MCDI interface can in fact do multiple erase blocks at once; |
| 2242 | * but erasing may be slow, so we make multiple calls here to avoid |
| 2243 | * tripping the MCDI RPC timeout. */ |
| 2244 | while (offset < end) { |
| 2245 | rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset, |
| 2246 | chunk); |
| 2247 | if (rc) |
| 2248 | goto out; |
| 2249 | offset += chunk; |
| 2250 | } |
| 2251 | out: |
| 2252 | return rc; |
| 2253 | } |
| 2254 | |
| 2255 | int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start, |
| 2256 | size_t len, size_t *retlen, const u8 *buffer) |
| 2257 | { |
| 2258 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 2259 | struct efx_nic *efx = mtd->priv; |
| 2260 | loff_t offset = start; |
| 2261 | loff_t end = min_t(loff_t, start + len, mtd->size); |
| 2262 | size_t chunk; |
| 2263 | int rc = 0; |
| 2264 | |
| 2265 | if (!part->updating) { |
| 2266 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); |
| 2267 | if (rc) |
| 2268 | goto out; |
| 2269 | part->updating = true; |
| 2270 | } |
| 2271 | |
| 2272 | while (offset < end) { |
| 2273 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); |
| 2274 | rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset, |
| 2275 | buffer, chunk); |
| 2276 | if (rc) |
| 2277 | goto out; |
| 2278 | offset += chunk; |
| 2279 | buffer += chunk; |
| 2280 | } |
| 2281 | out: |
| 2282 | *retlen = offset - start; |
| 2283 | return rc; |
| 2284 | } |
| 2285 | |
| 2286 | int efx_mcdi_mtd_sync(struct mtd_info *mtd) |
| 2287 | { |
| 2288 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 2289 | struct efx_nic *efx = mtd->priv; |
| 2290 | int rc = 0; |
| 2291 | |
| 2292 | if (part->updating) { |
| 2293 | part->updating = false; |
| 2294 | rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type); |
| 2295 | } |
| 2296 | |
| 2297 | return rc; |
| 2298 | } |
| 2299 | |
| 2300 | void efx_mcdi_mtd_rename(struct efx_mtd_partition *part) |
| 2301 | { |
| 2302 | struct efx_mcdi_mtd_partition *mcdi_part = |
| 2303 | container_of(part, struct efx_mcdi_mtd_partition, common); |
| 2304 | struct efx_nic *efx = part->mtd.priv; |
| 2305 | |
| 2306 | snprintf(part->name, sizeof(part->name), "%s %s:%02x", |
| 2307 | efx->name, part->type_name, mcdi_part->fw_subtype); |
| 2308 | } |
| 2309 | |
| 2310 | #endif /* CONFIG_SFC_MTD */ |