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Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001// SPDX-License-Identifier: GPL-2.0-only
Thomas Chou0b782532011-02-14 10:10:43 +08002/*
3 * Altera SPI driver
4 *
5 * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
6 *
7 * Based on spi_s3c24xx.c, which is:
8 * Copyright (c) 2006 Ben Dooks
9 * Copyright (c) 2006 Simtec Electronics
10 * Ben Dooks <ben@simtec.co.uk>
Thomas Chou0b782532011-02-14 10:10:43 +080011 */
12
Thomas Chou0b782532011-02-14 10:10:43 +080013#include <linux/interrupt.h>
14#include <linux/errno.h>
Paul Gortmakerd7614de2011-07-03 15:44:29 -040015#include <linux/module.h>
Thomas Chou0b782532011-02-14 10:10:43 +080016#include <linux/platform_device.h>
17#include <linux/spi/spi.h>
Thomas Chou0b782532011-02-14 10:10:43 +080018#include <linux/io.h>
19#include <linux/of.h>
20
21#define DRV_NAME "spi_altera"
22
23#define ALTERA_SPI_RXDATA 0
24#define ALTERA_SPI_TXDATA 4
25#define ALTERA_SPI_STATUS 8
26#define ALTERA_SPI_CONTROL 12
27#define ALTERA_SPI_SLAVE_SEL 20
28
29#define ALTERA_SPI_STATUS_ROE_MSK 0x8
30#define ALTERA_SPI_STATUS_TOE_MSK 0x10
31#define ALTERA_SPI_STATUS_TMT_MSK 0x20
32#define ALTERA_SPI_STATUS_TRDY_MSK 0x40
33#define ALTERA_SPI_STATUS_RRDY_MSK 0x80
34#define ALTERA_SPI_STATUS_E_MSK 0x100
35
36#define ALTERA_SPI_CONTROL_IROE_MSK 0x8
37#define ALTERA_SPI_CONTROL_ITOE_MSK 0x10
38#define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40
39#define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80
40#define ALTERA_SPI_CONTROL_IE_MSK 0x100
41#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
42
43struct altera_spi {
Thomas Chou0b782532011-02-14 10:10:43 +080044 void __iomem *base;
45 int irq;
46 int len;
47 int count;
48 int bytes_per_word;
49 unsigned long imr;
50
51 /* data buffers */
52 const unsigned char *tx;
53 unsigned char *rx;
54};
55
56static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
57{
58 return spi_master_get_devdata(sdev->master);
59}
60
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020061static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
Thomas Chou0b782532011-02-14 10:10:43 +080062{
63 struct altera_spi *hw = altera_spi_to_hw(spi);
64
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020065 if (is_high) {
66 hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
67 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
68 writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
Thomas Chou0b782532011-02-14 10:10:43 +080069 } else {
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020070 writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
71 hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
72 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
Thomas Chou0b782532011-02-14 10:10:43 +080073 }
74}
75
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020076static void altera_spi_tx_word(struct altera_spi *hw)
Thomas Chou0b782532011-02-14 10:10:43 +080077{
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020078 unsigned int txd = 0;
79
Thomas Chou0b782532011-02-14 10:10:43 +080080 if (hw->tx) {
81 switch (hw->bytes_per_word) {
82 case 1:
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020083 txd = hw->tx[hw->count];
84 break;
Thomas Chou0b782532011-02-14 10:10:43 +080085 case 2:
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020086 txd = (hw->tx[hw->count * 2]
87 | (hw->tx[hw->count * 2 + 1] << 8));
88 break;
Thomas Chou0b782532011-02-14 10:10:43 +080089 }
90 }
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020091
92 writel(txd, hw->base + ALTERA_SPI_TXDATA);
93}
94
95static void altera_spi_rx_word(struct altera_spi *hw)
96{
97 unsigned int rxd;
98
99 rxd = readl(hw->base + ALTERA_SPI_RXDATA);
100 if (hw->rx) {
101 switch (hw->bytes_per_word) {
102 case 1:
103 hw->rx[hw->count] = rxd;
104 break;
105 case 2:
106 hw->rx[hw->count * 2] = rxd;
107 hw->rx[hw->count * 2 + 1] = rxd >> 8;
108 break;
109 }
110 }
111
112 hw->count++;
Thomas Chou0b782532011-02-14 10:10:43 +0800113}
114
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200115static int altera_spi_txrx(struct spi_master *master,
116 struct spi_device *spi, struct spi_transfer *t)
Thomas Chou0b782532011-02-14 10:10:43 +0800117{
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200118 struct altera_spi *hw = spi_master_get_devdata(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800119
120 hw->tx = t->tx_buf;
121 hw->rx = t->rx_buf;
122 hw->count = 0;
Axel Linf073d372013-08-29 23:41:20 +0800123 hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
Thomas Chou0b782532011-02-14 10:10:43 +0800124 hw->len = t->len / hw->bytes_per_word;
125
126 if (hw->irq >= 0) {
127 /* enable receive interrupt */
128 hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;
129 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
130
131 /* send the first byte */
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200132 altera_spi_tx_word(hw);
Thomas Chou0b782532011-02-14 10:10:43 +0800133 } else {
Axel Lin72be0ee2013-08-15 14:18:46 +0800134 while (hw->count < hw->len) {
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200135 altera_spi_tx_word(hw);
Axel Lin72be0ee2013-08-15 14:18:46 +0800136
Thomas Chou0b782532011-02-14 10:10:43 +0800137 while (!(readl(hw->base + ALTERA_SPI_STATUS) &
138 ALTERA_SPI_STATUS_RRDY_MSK))
139 cpu_relax();
140
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200141 altera_spi_rx_word(hw);
Thomas Chou0b782532011-02-14 10:10:43 +0800142 }
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200143 spi_finalize_current_transfer(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800144 }
145
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200146 return t->len;
Thomas Chou0b782532011-02-14 10:10:43 +0800147}
148
149static irqreturn_t altera_spi_irq(int irq, void *dev)
150{
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200151 struct spi_master *master = dev;
152 struct altera_spi *hw = spi_master_get_devdata(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800153
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200154 altera_spi_rx_word(hw);
Thomas Chou0b782532011-02-14 10:10:43 +0800155
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200156 if (hw->count < hw->len) {
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200157 altera_spi_tx_word(hw);
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200158 } else {
159 /* disable receive interrupt */
160 hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
161 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
162
163 spi_finalize_current_transfer(master);
164 }
Thomas Chou0b782532011-02-14 10:10:43 +0800165
166 return IRQ_HANDLED;
167}
168
Grant Likelyfd4a3192012-12-07 16:57:14 +0000169static int altera_spi_probe(struct platform_device *pdev)
Thomas Chou0b782532011-02-14 10:10:43 +0800170{
Thomas Chou0b782532011-02-14 10:10:43 +0800171 struct altera_spi *hw;
172 struct spi_master *master;
173 struct resource *res;
174 int err = -ENODEV;
175
176 master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
177 if (!master)
178 return err;
179
180 /* setup the master state. */
181 master->bus_num = pdev->id;
182 master->num_chipselect = 16;
183 master->mode_bits = SPI_CS_HIGH;
Axel Lin72bb79d2014-03-05 13:37:00 +0800184 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
Axel Linbf2f2f72014-03-21 11:21:58 +0800185 master->dev.of_node = pdev->dev.of_node;
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200186 master->transfer_one = altera_spi_txrx;
187 master->set_cs = altera_spi_set_cs;
Thomas Chou0b782532011-02-14 10:10:43 +0800188
189 hw = spi_master_get_devdata(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800190
191 /* find and map our resources */
192 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Julia Lawallb3136f82013-08-24 19:13:15 +0200193 hw->base = devm_ioremap_resource(&pdev->dev, res);
194 if (IS_ERR(hw->base)) {
195 err = PTR_ERR(hw->base);
196 goto exit;
197 }
Thomas Chou0b782532011-02-14 10:10:43 +0800198 /* program defaults into the registers */
199 hw->imr = 0; /* disable spi interrupts */
200 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
201 writel(0, hw->base + ALTERA_SPI_STATUS); /* clear status reg */
202 if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK)
203 readl(hw->base + ALTERA_SPI_RXDATA); /* flush rxdata */
204 /* irq is optional */
205 hw->irq = platform_get_irq(pdev, 0);
206 if (hw->irq >= 0) {
Thomas Chou0b782532011-02-14 10:10:43 +0800207 err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200208 pdev->name, master);
Thomas Chou0b782532011-02-14 10:10:43 +0800209 if (err)
210 goto exit;
211 }
Thomas Chou0b782532011-02-14 10:10:43 +0800212
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200213 err = devm_spi_register_master(&pdev->dev, master);
Thomas Chou0b782532011-02-14 10:10:43 +0800214 if (err)
215 goto exit;
216 dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
217
218 return 0;
Thomas Chou0b782532011-02-14 10:10:43 +0800219exit:
Thomas Chou0b782532011-02-14 10:10:43 +0800220 spi_master_put(master);
221 return err;
222}
223
Thomas Chou0b782532011-02-14 10:10:43 +0800224#ifdef CONFIG_OF
225static const struct of_device_id altera_spi_match[] = {
226 { .compatible = "ALTR,spi-1.0", },
Dinh Nguyen13960b42013-08-14 15:25:19 -0500227 { .compatible = "altr,spi-1.0", },
Thomas Chou0b782532011-02-14 10:10:43 +0800228 {},
229};
230MODULE_DEVICE_TABLE(of, altera_spi_match);
Thomas Chou0b782532011-02-14 10:10:43 +0800231#endif /* CONFIG_OF */
232
233static struct platform_driver altera_spi_driver = {
234 .probe = altera_spi_probe,
Thomas Chou0b782532011-02-14 10:10:43 +0800235 .driver = {
236 .name = DRV_NAME,
Thomas Chou0b782532011-02-14 10:10:43 +0800237 .pm = NULL,
Tobias Klauser89f98dc2012-08-15 09:30:28 +0200238 .of_match_table = of_match_ptr(altera_spi_match),
Thomas Chou0b782532011-02-14 10:10:43 +0800239 },
240};
Grant Likely940ab882011-10-05 11:29:49 -0600241module_platform_driver(altera_spi_driver);
Thomas Chou0b782532011-02-14 10:10:43 +0800242
243MODULE_DESCRIPTION("Altera SPI driver");
244MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
245MODULE_LICENSE("GPL");
246MODULE_ALIAS("platform:" DRV_NAME);