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Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Thierry Reding89184652014-04-16 09:24:44 +02002/*
3 * Copyright (C) 2014 NVIDIA Corporation
Thierry Reding89184652014-04-16 09:24:44 +02004 */
5
6#ifndef __SOC_TEGRA_MC_H__
7#define __SOC_TEGRA_MC_H__
8
Dmitry Osipenkoce2785a2018-12-12 23:38:56 +03009#include <linux/err.h>
Dmitry Osipenko20e92462018-04-13 14:33:49 +030010#include <linux/reset-controller.h>
Thierry Reding89184652014-04-16 09:24:44 +020011#include <linux/types.h>
12
13struct clk;
14struct device;
15struct page;
16
17struct tegra_smmu_enable {
18 unsigned int reg;
19 unsigned int bit;
20};
21
Mikko Perttunen3d9dd6f2015-03-12 15:48:02 +010022struct tegra_mc_timing {
23 unsigned long rate;
24
25 u32 *emem_data;
26};
27
Thierry Reding89184652014-04-16 09:24:44 +020028/* latency allowance */
29struct tegra_mc_la {
30 unsigned int reg;
31 unsigned int shift;
32 unsigned int mask;
33 unsigned int def;
34};
35
36struct tegra_mc_client {
37 unsigned int id;
38 const char *name;
39 unsigned int swgroup;
40
41 unsigned int fifo_size;
42
43 struct tegra_smmu_enable smmu;
44 struct tegra_mc_la la;
45};
46
47struct tegra_smmu_swgroup {
Thierry Redinge660df02015-01-23 09:45:35 +010048 const char *name;
Thierry Reding89184652014-04-16 09:24:44 +020049 unsigned int swgroup;
50 unsigned int reg;
51};
52
Thierry Reding2a8102d2017-10-12 16:29:19 +020053struct tegra_smmu_group_soc {
54 const char *name;
55 const unsigned int *swgroups;
56 unsigned int num_swgroups;
57};
58
Thierry Reding89184652014-04-16 09:24:44 +020059struct tegra_smmu_soc {
60 const struct tegra_mc_client *clients;
61 unsigned int num_clients;
62
63 const struct tegra_smmu_swgroup *swgroups;
64 unsigned int num_swgroups;
65
Thierry Reding2a8102d2017-10-12 16:29:19 +020066 const struct tegra_smmu_group_soc *groups;
67 unsigned int num_groups;
68
Thierry Reding89184652014-04-16 09:24:44 +020069 bool supports_round_robin_arbitration;
70 bool supports_request_limit;
71
Thierry Reding11cec152015-08-06 14:20:31 +020072 unsigned int num_tlb_lines;
Thierry Reding89184652014-04-16 09:24:44 +020073 unsigned int num_asids;
Thierry Reding89184652014-04-16 09:24:44 +020074};
75
76struct tegra_mc;
77struct tegra_smmu;
Dmitry Osipenkoce2785a2018-12-12 23:38:56 +030078struct gart_device;
Thierry Reding89184652014-04-16 09:24:44 +020079
80#ifdef CONFIG_TEGRA_IOMMU_SMMU
81struct tegra_smmu *tegra_smmu_probe(struct device *dev,
82 const struct tegra_smmu_soc *soc,
83 struct tegra_mc *mc);
Thierry Redingd1313e72015-01-23 09:49:25 +010084void tegra_smmu_remove(struct tegra_smmu *smmu);
Thierry Reding89184652014-04-16 09:24:44 +020085#else
86static inline struct tegra_smmu *
87tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc,
88 struct tegra_mc *mc)
89{
90 return NULL;
91}
Thierry Redingd1313e72015-01-23 09:49:25 +010092
93static inline void tegra_smmu_remove(struct tegra_smmu *smmu)
94{
95}
Thierry Reding89184652014-04-16 09:24:44 +020096#endif
97
Dmitry Osipenkoce2785a2018-12-12 23:38:56 +030098#ifdef CONFIG_TEGRA_IOMMU_GART
99struct gart_device *tegra_gart_probe(struct device *dev, struct tegra_mc *mc);
100int tegra_gart_suspend(struct gart_device *gart);
101int tegra_gart_resume(struct gart_device *gart);
102#else
103static inline struct gart_device *
104tegra_gart_probe(struct device *dev, struct tegra_mc *mc)
105{
106 return ERR_PTR(-ENODEV);
107}
108
109static inline int tegra_gart_suspend(struct gart_device *gart)
110{
111 return -ENODEV;
112}
113
114static inline int tegra_gart_resume(struct gart_device *gart)
115{
116 return -ENODEV;
117}
118#endif
119
Dmitry Osipenko20e92462018-04-13 14:33:49 +0300120struct tegra_mc_reset {
121 const char *name;
122 unsigned long id;
123 unsigned int control;
124 unsigned int status;
125 unsigned int reset;
126 unsigned int bit;
127};
128
129struct tegra_mc_reset_ops {
130 int (*hotreset_assert)(struct tegra_mc *mc,
131 const struct tegra_mc_reset *rst);
132 int (*hotreset_deassert)(struct tegra_mc *mc,
133 const struct tegra_mc_reset *rst);
134 int (*block_dma)(struct tegra_mc *mc,
135 const struct tegra_mc_reset *rst);
136 bool (*dma_idling)(struct tegra_mc *mc,
137 const struct tegra_mc_reset *rst);
138 int (*unblock_dma)(struct tegra_mc *mc,
139 const struct tegra_mc_reset *rst);
140 int (*reset_status)(struct tegra_mc *mc,
141 const struct tegra_mc_reset *rst);
142};
143
Thierry Reding89184652014-04-16 09:24:44 +0200144struct tegra_mc_soc {
145 const struct tegra_mc_client *clients;
146 unsigned int num_clients;
147
Mikko Perttunen3d9dd6f2015-03-12 15:48:02 +0100148 const unsigned long *emem_regs;
Thierry Reding89184652014-04-16 09:24:44 +0200149 unsigned int num_emem_regs;
150
151 unsigned int num_address_bits;
152 unsigned int atom_size;
153
Paul Walmsley3c01cf32015-06-04 19:33:48 +0000154 u8 client_id_mask;
155
Thierry Reding89184652014-04-16 09:24:44 +0200156 const struct tegra_smmu_soc *smmu;
Dmitry Osipenko1c74d5c2018-04-09 22:28:29 +0300157
158 u32 intmask;
Dmitry Osipenko20e92462018-04-13 14:33:49 +0300159
160 const struct tegra_mc_reset_ops *reset_ops;
161 const struct tegra_mc_reset *resets;
162 unsigned int num_resets;
Thierry Reding89184652014-04-16 09:24:44 +0200163};
164
165struct tegra_mc {
166 struct device *dev;
167 struct tegra_smmu *smmu;
Dmitry Osipenkoce2785a2018-12-12 23:38:56 +0300168 struct gart_device *gart;
Dmitry Osipenko96efa112018-12-12 23:38:52 +0300169 void __iomem *regs;
Thierry Reding89184652014-04-16 09:24:44 +0200170 struct clk *clk;
171 int irq;
172
173 const struct tegra_mc_soc *soc;
174 unsigned long tick;
Mikko Perttunen3d9dd6f2015-03-12 15:48:02 +0100175
176 struct tegra_mc_timing *timings;
177 unsigned int num_timings;
Dmitry Osipenko20e92462018-04-13 14:33:49 +0300178
179 struct reset_controller_dev reset;
180
181 spinlock_t lock;
Thierry Reding89184652014-04-16 09:24:44 +0200182};
183
Mikko Perttunen3d9dd6f2015-03-12 15:48:02 +0100184void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
185unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
186
Thierry Reding89184652014-04-16 09:24:44 +0200187#endif /* __SOC_TEGRA_MC_H__ */