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git.odroid.com / yocto / kernel / common / e50334d4e1c3bacfeb3bb1530f73a419d4ec6832 / . / sound / soc / codecs / rt5670.c
blob: 3ddb34ef77d7e57cc80c74240626b87b53318dcf [file] [log] [blame]
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1/*
2 * rt5670.c -- RT5670 ALSA SoC audio codec driver
3 *
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
Mengdong Lin06058152014-11-14 15:51:34 +0800[diff] [blame]19#include <linux/acpi.h>
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]20#include <linux/spi/spi.h>
21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/jack.h>
25#include <sound/soc.h>
26#include <sound/soc-dapm.h>
27#include <sound/initval.h>
28#include <sound/tlv.h>
29#include <sound/rt5670.h>
30
31#include "rl6231.h"
32#include "rt5670.h"
33#include "rt5670-dsp.h"
34
35#define RT5670_DEVICE_ID 0x6271
36
37#define RT5670_PR_RANGE_BASE (0xff + 1)
38#define RT5670_PR_SPACING 0x100
39
40#define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
41
42static const struct regmap_range_cfg rt5670_ranges[] = {
43 { .name = "PR", .range_min = RT5670_PR_BASE,
44 .range_max = RT5670_PR_BASE + 0xf8,
45 .selector_reg = RT5670_PRIV_INDEX,
46 .selector_mask = 0xff,
47 .selector_shift = 0x0,
48 .window_start = RT5670_PRIV_DATA,
49 .window_len = 0x1, },
50};
51
52static struct reg_default init_list[] = {
53 { RT5670_PR_BASE + 0x14, 0x9a8a },
54 { RT5670_PR_BASE + 0x38, 0x3ba1 },
55 { RT5670_PR_BASE + 0x3d, 0x3640 },
56};
57#define RT5670_INIT_REG_LEN ARRAY_SIZE(init_list)
58
59static const struct reg_default rt5670_reg[] = {
60 { 0x00, 0x0000 },
61 { 0x02, 0x8888 },
62 { 0x03, 0x8888 },
63 { 0x0a, 0x0001 },
64 { 0x0b, 0x0827 },
65 { 0x0c, 0x0000 },
66 { 0x0d, 0x0008 },
67 { 0x0e, 0x0000 },
68 { 0x0f, 0x0808 },
69 { 0x19, 0xafaf },
70 { 0x1a, 0xafaf },
71 { 0x1b, 0x0011 },
72 { 0x1c, 0x2f2f },
73 { 0x1d, 0x2f2f },
74 { 0x1e, 0x0000 },
75 { 0x1f, 0x2f2f },
76 { 0x20, 0x0000 },
77 { 0x26, 0x7860 },
78 { 0x27, 0x7860 },
79 { 0x28, 0x7871 },
80 { 0x29, 0x8080 },
81 { 0x2a, 0x5656 },
82 { 0x2b, 0x5454 },
83 { 0x2c, 0xaaa0 },
84 { 0x2d, 0x0000 },
85 { 0x2e, 0x2f2f },
86 { 0x2f, 0x1002 },
87 { 0x30, 0x0000 },
88 { 0x31, 0x5f00 },
89 { 0x32, 0x0000 },
90 { 0x33, 0x0000 },
91 { 0x34, 0x0000 },
92 { 0x35, 0x0000 },
93 { 0x36, 0x0000 },
94 { 0x37, 0x0000 },
95 { 0x38, 0x0000 },
96 { 0x3b, 0x0000 },
97 { 0x3c, 0x007f },
98 { 0x3d, 0x0000 },
99 { 0x3e, 0x007f },
100 { 0x45, 0xe00f },
101 { 0x4c, 0x5380 },
102 { 0x4f, 0x0073 },
103 { 0x52, 0x00d3 },
104 { 0x53, 0xf0f0 },
105 { 0x61, 0x0000 },
106 { 0x62, 0x0001 },
107 { 0x63, 0x00c3 },
108 { 0x64, 0x0000 },
109 { 0x65, 0x0000 },
110 { 0x66, 0x0000 },
111 { 0x6f, 0x8000 },
112 { 0x70, 0x8000 },
113 { 0x71, 0x8000 },
114 { 0x72, 0x8000 },
115 { 0x73, 0x1110 },
116 { 0x74, 0x0e00 },
117 { 0x75, 0x1505 },
118 { 0x76, 0x0015 },
119 { 0x77, 0x0c00 },
120 { 0x78, 0x4000 },
121 { 0x79, 0x0123 },
122 { 0x7f, 0x1100 },
123 { 0x80, 0x0000 },
124 { 0x81, 0x0000 },
125 { 0x82, 0x0000 },
126 { 0x83, 0x0000 },
127 { 0x84, 0x0000 },
128 { 0x85, 0x0000 },
129 { 0x86, 0x0008 },
130 { 0x87, 0x0000 },
131 { 0x88, 0x0000 },
132 { 0x89, 0x0000 },
133 { 0x8a, 0x0000 },
134 { 0x8b, 0x0000 },
135 { 0x8c, 0x0007 },
136 { 0x8d, 0x0000 },
137 { 0x8e, 0x0004 },
138 { 0x8f, 0x1100 },
139 { 0x90, 0x0646 },
140 { 0x91, 0x0c06 },
141 { 0x93, 0x0000 },
142 { 0x94, 0x0000 },
143 { 0x95, 0x0000 },
144 { 0x97, 0x0000 },
145 { 0x98, 0x0000 },
146 { 0x99, 0x0000 },
147 { 0x9a, 0x2184 },
148 { 0x9b, 0x010a },
149 { 0x9c, 0x0aea },
150 { 0x9d, 0x000c },
151 { 0x9e, 0x0400 },
152 { 0xae, 0x7000 },
153 { 0xaf, 0x0000 },
154 { 0xb0, 0x6000 },
155 { 0xb1, 0x0000 },
156 { 0xb2, 0x0000 },
157 { 0xb3, 0x001f },
158 { 0xb4, 0x2206 },
159 { 0xb5, 0x1f00 },
160 { 0xb6, 0x0000 },
161 { 0xb7, 0x0000 },
162 { 0xbb, 0x0000 },
163 { 0xbc, 0x0000 },
164 { 0xbd, 0x0000 },
165 { 0xbe, 0x0000 },
166 { 0xbf, 0x0000 },
167 { 0xc0, 0x0000 },
168 { 0xc1, 0x0000 },
169 { 0xc2, 0x0000 },
170 { 0xcd, 0x0000 },
171 { 0xce, 0x0000 },
172 { 0xcf, 0x1813 },
173 { 0xd0, 0x0690 },
174 { 0xd1, 0x1c17 },
175 { 0xd3, 0xb320 },
176 { 0xd4, 0x0000 },
177 { 0xd6, 0x0400 },
178 { 0xd9, 0x0809 },
179 { 0xda, 0x0000 },
180 { 0xdb, 0x0001 },
181 { 0xdc, 0x0049 },
182 { 0xdd, 0x0009 },
183 { 0xe6, 0x8000 },
184 { 0xe7, 0x0000 },
185 { 0xec, 0xb300 },
186 { 0xed, 0x0000 },
187 { 0xee, 0xb300 },
188 { 0xef, 0x0000 },
189 { 0xf8, 0x0000 },
190 { 0xf9, 0x0000 },
191 { 0xfa, 0x8010 },
192 { 0xfb, 0x0033 },
193 { 0xfc, 0x0080 },
194};
195
196static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
197{
198 int i;
199
200 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
201 if ((reg >= rt5670_ranges[i].window_start &&
202 reg <= rt5670_ranges[i].window_start +
203 rt5670_ranges[i].window_len) ||
204 (reg >= rt5670_ranges[i].range_min &&
205 reg <= rt5670_ranges[i].range_max)) {
206 return true;
207 }
208 }
209
210 switch (reg) {
211 case RT5670_RESET:
212 case RT5670_PDM_DATA_CTRL1:
213 case RT5670_PDM1_DATA_CTRL4:
214 case RT5670_PDM2_DATA_CTRL4:
215 case RT5670_PRIV_DATA:
216 case RT5670_ASRC_5:
217 case RT5670_CJ_CTRL1:
218 case RT5670_CJ_CTRL2:
219 case RT5670_CJ_CTRL3:
220 case RT5670_A_JD_CTRL1:
221 case RT5670_A_JD_CTRL2:
222 case RT5670_VAD_CTRL5:
223 case RT5670_ADC_EQ_CTRL1:
224 case RT5670_EQ_CTRL1:
225 case RT5670_ALC_CTRL_1:
226 case RT5670_IRQ_CTRL1:
227 case RT5670_IRQ_CTRL2:
228 case RT5670_INT_IRQ_ST:
229 case RT5670_IL_CMD:
230 case RT5670_DSP_CTRL1:
231 case RT5670_DSP_CTRL2:
232 case RT5670_DSP_CTRL3:
233 case RT5670_DSP_CTRL4:
234 case RT5670_DSP_CTRL5:
235 case RT5670_VENDOR_ID:
236 case RT5670_VENDOR_ID1:
237 case RT5670_VENDOR_ID2:
238 return true;
239 default:
240 return false;
241 }
242}
243
244static bool rt5670_readable_register(struct device *dev, unsigned int reg)
245{
246 int i;
247
248 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
249 if ((reg >= rt5670_ranges[i].window_start &&
250 reg <= rt5670_ranges[i].window_start +
251 rt5670_ranges[i].window_len) ||
252 (reg >= rt5670_ranges[i].range_min &&
253 reg <= rt5670_ranges[i].range_max)) {
254 return true;
255 }
256 }
257
258 switch (reg) {
259 case RT5670_RESET:
260 case RT5670_HP_VOL:
261 case RT5670_LOUT1:
262 case RT5670_CJ_CTRL1:
263 case RT5670_CJ_CTRL2:
264 case RT5670_CJ_CTRL3:
265 case RT5670_IN2:
266 case RT5670_INL1_INR1_VOL:
267 case RT5670_DAC1_DIG_VOL:
268 case RT5670_DAC2_DIG_VOL:
269 case RT5670_DAC_CTRL:
270 case RT5670_STO1_ADC_DIG_VOL:
271 case RT5670_MONO_ADC_DIG_VOL:
272 case RT5670_STO2_ADC_DIG_VOL:
273 case RT5670_ADC_BST_VOL1:
274 case RT5670_ADC_BST_VOL2:
275 case RT5670_STO2_ADC_MIXER:
276 case RT5670_STO1_ADC_MIXER:
277 case RT5670_MONO_ADC_MIXER:
278 case RT5670_AD_DA_MIXER:
279 case RT5670_STO_DAC_MIXER:
280 case RT5670_DD_MIXER:
281 case RT5670_DIG_MIXER:
282 case RT5670_DSP_PATH1:
283 case RT5670_DSP_PATH2:
284 case RT5670_DIG_INF1_DATA:
285 case RT5670_DIG_INF2_DATA:
286 case RT5670_PDM_OUT_CTRL:
287 case RT5670_PDM_DATA_CTRL1:
288 case RT5670_PDM1_DATA_CTRL2:
289 case RT5670_PDM1_DATA_CTRL3:
290 case RT5670_PDM1_DATA_CTRL4:
291 case RT5670_PDM2_DATA_CTRL2:
292 case RT5670_PDM2_DATA_CTRL3:
293 case RT5670_PDM2_DATA_CTRL4:
294 case RT5670_REC_L1_MIXER:
295 case RT5670_REC_L2_MIXER:
296 case RT5670_REC_R1_MIXER:
297 case RT5670_REC_R2_MIXER:
298 case RT5670_HPO_MIXER:
299 case RT5670_MONO_MIXER:
300 case RT5670_OUT_L1_MIXER:
301 case RT5670_OUT_R1_MIXER:
302 case RT5670_LOUT_MIXER:
303 case RT5670_PWR_DIG1:
304 case RT5670_PWR_DIG2:
305 case RT5670_PWR_ANLG1:
306 case RT5670_PWR_ANLG2:
307 case RT5670_PWR_MIXER:
308 case RT5670_PWR_VOL:
309 case RT5670_PRIV_INDEX:
310 case RT5670_PRIV_DATA:
311 case RT5670_I2S4_SDP:
312 case RT5670_I2S1_SDP:
313 case RT5670_I2S2_SDP:
314 case RT5670_I2S3_SDP:
315 case RT5670_ADDA_CLK1:
316 case RT5670_ADDA_CLK2:
317 case RT5670_DMIC_CTRL1:
318 case RT5670_DMIC_CTRL2:
319 case RT5670_TDM_CTRL_1:
320 case RT5670_TDM_CTRL_2:
321 case RT5670_TDM_CTRL_3:
322 case RT5670_DSP_CLK:
323 case RT5670_GLB_CLK:
324 case RT5670_PLL_CTRL1:
325 case RT5670_PLL_CTRL2:
326 case RT5670_ASRC_1:
327 case RT5670_ASRC_2:
328 case RT5670_ASRC_3:
329 case RT5670_ASRC_4:
330 case RT5670_ASRC_5:
331 case RT5670_ASRC_7:
332 case RT5670_ASRC_8:
333 case RT5670_ASRC_9:
334 case RT5670_ASRC_10:
335 case RT5670_ASRC_11:
336 case RT5670_ASRC_12:
337 case RT5670_ASRC_13:
338 case RT5670_ASRC_14:
339 case RT5670_DEPOP_M1:
340 case RT5670_DEPOP_M2:
341 case RT5670_DEPOP_M3:
342 case RT5670_CHARGE_PUMP:
343 case RT5670_MICBIAS:
344 case RT5670_A_JD_CTRL1:
345 case RT5670_A_JD_CTRL2:
346 case RT5670_VAD_CTRL1:
347 case RT5670_VAD_CTRL2:
348 case RT5670_VAD_CTRL3:
349 case RT5670_VAD_CTRL4:
350 case RT5670_VAD_CTRL5:
351 case RT5670_ADC_EQ_CTRL1:
352 case RT5670_ADC_EQ_CTRL2:
353 case RT5670_EQ_CTRL1:
354 case RT5670_EQ_CTRL2:
355 case RT5670_ALC_DRC_CTRL1:
356 case RT5670_ALC_DRC_CTRL2:
357 case RT5670_ALC_CTRL_1:
358 case RT5670_ALC_CTRL_2:
359 case RT5670_ALC_CTRL_3:
360 case RT5670_JD_CTRL:
361 case RT5670_IRQ_CTRL1:
362 case RT5670_IRQ_CTRL2:
363 case RT5670_INT_IRQ_ST:
364 case RT5670_GPIO_CTRL1:
365 case RT5670_GPIO_CTRL2:
366 case RT5670_GPIO_CTRL3:
367 case RT5670_SCRABBLE_FUN:
368 case RT5670_SCRABBLE_CTRL:
369 case RT5670_BASE_BACK:
370 case RT5670_MP3_PLUS1:
371 case RT5670_MP3_PLUS2:
372 case RT5670_ADJ_HPF1:
373 case RT5670_ADJ_HPF2:
374 case RT5670_HP_CALIB_AMP_DET:
375 case RT5670_SV_ZCD1:
376 case RT5670_SV_ZCD2:
377 case RT5670_IL_CMD:
378 case RT5670_IL_CMD2:
379 case RT5670_IL_CMD3:
380 case RT5670_DRC_HL_CTRL1:
381 case RT5670_DRC_HL_CTRL2:
382 case RT5670_ADC_MONO_HP_CTRL1:
383 case RT5670_ADC_MONO_HP_CTRL2:
384 case RT5670_ADC_STO2_HP_CTRL1:
385 case RT5670_ADC_STO2_HP_CTRL2:
386 case RT5670_JD_CTRL3:
387 case RT5670_JD_CTRL4:
388 case RT5670_DIG_MISC:
389 case RT5670_DSP_CTRL1:
390 case RT5670_DSP_CTRL2:
391 case RT5670_DSP_CTRL3:
392 case RT5670_DSP_CTRL4:
393 case RT5670_DSP_CTRL5:
394 case RT5670_GEN_CTRL2:
395 case RT5670_GEN_CTRL3:
396 case RT5670_VENDOR_ID:
397 case RT5670_VENDOR_ID1:
398 case RT5670_VENDOR_ID2:
399 return true;
400 default:
401 return false;
402 }
403}
404
405static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
406static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
407static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
408static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
409static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
410
411/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
412static unsigned int bst_tlv[] = {
413 TLV_DB_RANGE_HEAD(7),
414 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
415 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
416 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
417 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
418 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
419 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
420 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
421};
422
423/* Interface data select */
424static const char * const rt5670_data_select[] = {
425 "Normal", "Swap", "left copy to right", "right copy to left"
426};
427
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]428static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]429 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
430
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]431static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]432 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
433
434static const struct snd_kcontrol_new rt5670_snd_controls[] = {
435 /* Headphone Output Volume */
436 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
437 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
438 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
439 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
440 39, 0, out_vol_tlv),
441 /* OUTPUT Control */
442 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
443 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
444 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
445 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
446 /* DAC Digital Volume */
447 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
448 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
449 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
450 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
451 175, 0, dac_vol_tlv),
452 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
453 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
454 175, 0, dac_vol_tlv),
455 /* IN1/IN2 Control */
456 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
457 RT5670_BST_SFT1, 8, 0, bst_tlv),
458 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
459 RT5670_BST_SFT1, 8, 0, bst_tlv),
460 /* INL/INR Volume Control */
461 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
462 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
463 31, 1, in_vol_tlv),
464 /* ADC Digital Volume Control */
465 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
466 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
467 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
468 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
469 127, 0, adc_vol_tlv),
470
471 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
472 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
473 127, 0, adc_vol_tlv),
474
475 /* ADC Boost Volume Control */
476 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
477 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
478 3, 0, adc_bst_tlv),
479
480 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
481 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
482 3, 0, adc_bst_tlv),
483
484 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
485 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
486};
487
488/**
489 * set_dmic_clk - Set parameter of dmic.
490 *
491 * @w: DAPM widget.
492 * @kcontrol: The kcontrol of this widget.
493 * @event: Event id.
494 *
495 * Choose dmic clock between 1MHz and 3MHz.
496 * It is better for clock to approximate 3MHz.
497 */
498static int set_dmic_clk(struct snd_soc_dapm_widget *w,
499 struct snd_kcontrol *kcontrol, int event)
500{
501 struct snd_soc_codec *codec = w->codec;
502 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
503 int idx = -EINVAL;
504
505 idx = rl6231_calc_dmic_clk(rt5670->sysclk);
506
507 if (idx < 0)
508 dev_err(codec->dev, "Failed to set DMIC clock\n");
509 else
510 snd_soc_update_bits(codec, RT5670_DMIC_CTRL1,
511 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
512 return idx;
513}
514
515static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
516 struct snd_soc_dapm_widget *sink)
517{
518 unsigned int val;
519
520 val = snd_soc_read(source->codec, RT5670_GLB_CLK);
521 val &= RT5670_SCLK_SRC_MASK;
522 if (val == RT5670_SCLK_SRC_PLL1)
523 return 1;
524 else
525 return 0;
526}
527
528static int is_using_asrc(struct snd_soc_dapm_widget *source,
529 struct snd_soc_dapm_widget *sink)
530{
531 unsigned int reg, shift, val;
532
533 switch (source->shift) {
534 case 0:
535 reg = RT5670_ASRC_3;
536 shift = 0;
537 break;
538 case 1:
539 reg = RT5670_ASRC_3;
540 shift = 4;
541 break;
542 case 2:
543 reg = RT5670_ASRC_5;
544 shift = 12;
545 break;
546 case 3:
547 reg = RT5670_ASRC_2;
548 shift = 0;
549 break;
550 case 8:
551 reg = RT5670_ASRC_2;
552 shift = 4;
553 break;
554 case 9:
555 reg = RT5670_ASRC_2;
556 shift = 8;
557 break;
558 case 10:
559 reg = RT5670_ASRC_2;
560 shift = 12;
561 break;
562 default:
563 return 0;
564 }
565
566 val = (snd_soc_read(source->codec, reg) >> shift) & 0xf;
567 switch (val) {
568 case 1:
569 case 2:
570 case 3:
571 case 4:
572 return 1;
573 default:
574 return 0;
575 }
576
577}
578
Bard Liaoe50334d2014-11-17 15:27:21 +0800[diff] [blame^]579static int can_use_asrc(struct snd_soc_dapm_widget *source,
580 struct snd_soc_dapm_widget *sink)
581{
582 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
583 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
584
585 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
586 return 1;
587
588 return 0;
589}
590
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]591/* Digital Mixer */
592static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
593 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
594 RT5670_M_ADC_L1_SFT, 1, 1),
595 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
596 RT5670_M_ADC_L2_SFT, 1, 1),
597};
598
599static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
600 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
601 RT5670_M_ADC_R1_SFT, 1, 1),
602 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
603 RT5670_M_ADC_R2_SFT, 1, 1),
604};
605
606static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
607 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
608 RT5670_M_ADC_L1_SFT, 1, 1),
609 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
610 RT5670_M_ADC_L2_SFT, 1, 1),
611};
612
613static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
614 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
615 RT5670_M_ADC_R1_SFT, 1, 1),
616 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
617 RT5670_M_ADC_R2_SFT, 1, 1),
618};
619
620static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
621 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
622 RT5670_M_MONO_ADC_L1_SFT, 1, 1),
623 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
624 RT5670_M_MONO_ADC_L2_SFT, 1, 1),
625};
626
627static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
628 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
629 RT5670_M_MONO_ADC_R1_SFT, 1, 1),
630 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
631 RT5670_M_MONO_ADC_R2_SFT, 1, 1),
632};
633
634static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
635 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
636 RT5670_M_ADCMIX_L_SFT, 1, 1),
637 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
638 RT5670_M_DAC1_L_SFT, 1, 1),
639};
640
641static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
642 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
643 RT5670_M_ADCMIX_R_SFT, 1, 1),
644 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
645 RT5670_M_DAC1_R_SFT, 1, 1),
646};
647
648static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
649 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
650 RT5670_M_DAC_L1_SFT, 1, 1),
651 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
652 RT5670_M_DAC_L2_SFT, 1, 1),
653 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
654 RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
655};
656
657static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
658 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
659 RT5670_M_DAC_R1_SFT, 1, 1),
660 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
661 RT5670_M_DAC_R2_SFT, 1, 1),
662 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
663 RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
664};
665
666static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
667 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
668 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
669 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
670 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
671 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
672 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
673};
674
675static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
676 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
677 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
678 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
679 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
680 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
681 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
682};
683
684static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
685 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
686 RT5670_M_STO_L_DAC_L_SFT, 1, 1),
687 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
688 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
689 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
690 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
691};
692
693static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
694 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
695 RT5670_M_STO_R_DAC_R_SFT, 1, 1),
696 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
697 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
698 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
699 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
700};
701
702/* Analog Input Mixer */
703static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
704 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
705 RT5670_M_IN_L_RM_L_SFT, 1, 1),
706 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
707 RT5670_M_BST2_RM_L_SFT, 1, 1),
708 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
709 RT5670_M_BST1_RM_L_SFT, 1, 1),
710};
711
712static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
713 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
714 RT5670_M_IN_R_RM_R_SFT, 1, 1),
715 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
716 RT5670_M_BST2_RM_R_SFT, 1, 1),
717 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
718 RT5670_M_BST1_RM_R_SFT, 1, 1),
719};
720
721static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
722 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
723 RT5670_M_BST1_OM_L_SFT, 1, 1),
724 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
725 RT5670_M_IN_L_OM_L_SFT, 1, 1),
726 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
727 RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
728 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
729 RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
730};
731
732static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
733 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
734 RT5670_M_BST2_OM_R_SFT, 1, 1),
735 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
736 RT5670_M_IN_R_OM_R_SFT, 1, 1),
737 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
738 RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
739 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
740 RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
741};
742
743static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
744 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
745 RT5670_M_DAC1_HM_SFT, 1, 1),
746 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
747 RT5670_M_HPVOL_HM_SFT, 1, 1),
748};
749
750static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
751 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
752 RT5670_M_DACL1_HML_SFT, 1, 1),
753 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
754 RT5670_M_INL1_HML_SFT, 1, 1),
755};
756
757static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
758 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
759 RT5670_M_DACR1_HMR_SFT, 1, 1),
760 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
761 RT5670_M_INR1_HMR_SFT, 1, 1),
762};
763
764static const struct snd_kcontrol_new rt5670_lout_mix[] = {
765 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
766 RT5670_M_DAC_L1_LM_SFT, 1, 1),
767 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
768 RT5670_M_DAC_R1_LM_SFT, 1, 1),
769 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
770 RT5670_M_OV_L_LM_SFT, 1, 1),
771 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
772 RT5670_M_OV_R_LM_SFT, 1, 1),
773};
774
775static const struct snd_kcontrol_new rt5670_hpl_mix[] = {
776 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER,
777 RT5670_M_DACL1_HML_SFT, 1, 1),
778 SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER,
779 RT5670_M_INL1_HML_SFT, 1, 1),
780};
781
782static const struct snd_kcontrol_new rt5670_hpr_mix[] = {
783 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER,
784 RT5670_M_DACR1_HMR_SFT, 1, 1),
785 SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER,
786 RT5670_M_INR1_HMR_SFT, 1, 1),
787};
788
789static const struct snd_kcontrol_new lout_l_enable_control =
790 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
791 RT5670_L_MUTE_SFT, 1, 1);
792
793static const struct snd_kcontrol_new lout_r_enable_control =
794 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
795 RT5670_R_MUTE_SFT, 1, 1);
796
797/* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
798static const char * const rt5670_dac1_src[] = {
799 "IF1 DAC", "IF2 DAC"
800};
801
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]802static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]803 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
804
805static const struct snd_kcontrol_new rt5670_dac1l_mux =
806 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
807
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]808static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]809 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
810
811static const struct snd_kcontrol_new rt5670_dac1r_mux =
812 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
813
814/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
815/* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
816static const char * const rt5670_dac12_src[] = {
817 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
818 "Bass", "VAD_ADC", "IF4 DAC"
819};
820
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]821static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]822 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
823
824static const struct snd_kcontrol_new rt5670_dac_l2_mux =
825 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
826
827static const char * const rt5670_dacr2_src[] = {
828 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
829};
830
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]831static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]832 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
833
834static const struct snd_kcontrol_new rt5670_dac_r2_mux =
835 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
836
837/*RxDP source*/ /* MX-2D [15:13] */
838static const char * const rt5670_rxdp_src[] = {
839 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
840 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
841};
842
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]843static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]844 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
845
846static const struct snd_kcontrol_new rt5670_rxdp_mux =
847 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
848
849/* MX-2D [1] [0] */
850static const char * const rt5670_dsp_bypass_src[] = {
851 "DSP", "Bypass"
852};
853
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]854static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]855 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
856
857static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
858 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
859
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]860static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]861 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
862
863static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
864 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
865
866/* Stereo2 ADC source */
867/* MX-26 [15] */
868static const char * const rt5670_stereo2_adc_lr_src[] = {
869 "L", "LR"
870};
871
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]872static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]873 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
874
875static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
876 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
877
878/* Stereo1 ADC source */
879/* MX-27 MX-26 [12] */
880static const char * const rt5670_stereo_adc1_src[] = {
881 "DAC MIX", "ADC"
882};
883
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]884static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]885 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
886
887static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux =
888 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum);
889
890static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux =
891 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum);
892
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]893static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]894 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
895
896static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux =
897 SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum);
898
899static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux =
900 SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum);
901
902/* MX-27 MX-26 [11] */
903static const char * const rt5670_stereo_adc2_src[] = {
904 "DAC MIX", "DMIC"
905};
906
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]907static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]908 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
909
910static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux =
911 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum);
912
913static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux =
914 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum);
915
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]916static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]917 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
918
919static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux =
920 SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum);
921
922static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux =
923 SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum);
924
925/* MX-27 MX26 [10] */
926static const char * const rt5670_stereo_adc_src[] = {
927 "ADC1L ADC2R", "ADC3"
928};
929
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]930static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]931 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
932
933static const struct snd_kcontrol_new rt5670_sto_adc_mux =
934 SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum);
935
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]936static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]937 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
938
939static const struct snd_kcontrol_new rt5670_sto2_adc_mux =
940 SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum);
941
942/* MX-27 MX-26 [9:8] */
943static const char * const rt5670_stereo_dmic_src[] = {
944 "DMIC1", "DMIC2", "DMIC3"
945};
946
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]947static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]948 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
949
950static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
951 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
952
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]953static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]954 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
955
956static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
957 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
958
959/* MX-27 [0] */
960static const char * const rt5670_stereo_dmic3_src[] = {
961 "DMIC3", "PDM ADC"
962};
963
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]964static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]965 RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src);
966
967static const struct snd_kcontrol_new rt5670_sto_dmic3_mux =
968 SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum);
969
970/* Mono ADC source */
971/* MX-28 [12] */
972static const char * const rt5670_mono_adc_l1_src[] = {
973 "Mono DAC MIXL", "ADC1"
974};
975
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]976static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]977 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
978
979static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
980 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
981/* MX-28 [11] */
982static const char * const rt5670_mono_adc_l2_src[] = {
983 "Mono DAC MIXL", "DMIC"
984};
985
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]986static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]987 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
988
989static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
990 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
991
992/* MX-28 [9:8] */
993static const char * const rt5670_mono_dmic_src[] = {
994 "DMIC1", "DMIC2", "DMIC3"
995};
996
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]997static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]998 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
999
1000static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
1001 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
1002/* MX-28 [1:0] */
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1003static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1004 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
1005
1006static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
1007 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
1008/* MX-28 [4] */
1009static const char * const rt5670_mono_adc_r1_src[] = {
1010 "Mono DAC MIXR", "ADC2"
1011};
1012
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1013static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1014 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
1015
1016static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
1017 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
1018/* MX-28 [3] */
1019static const char * const rt5670_mono_adc_r2_src[] = {
1020 "Mono DAC MIXR", "DMIC"
1021};
1022
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1023static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1024 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
1025
1026static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
1027 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
1028
1029/* MX-2D [3:2] */
1030static const char * const rt5670_txdp_slot_src[] = {
1031 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
1032};
1033
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1034static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1035 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
1036
1037static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
1038 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
1039
1040/* MX-2F [15] */
1041static const char * const rt5670_if1_adc2_in_src[] = {
1042 "IF_ADC2", "VAD_ADC"
1043};
1044
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1045static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1046 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
1047
1048static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
1049 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
1050
1051/* MX-2F [14:12] */
1052static const char * const rt5670_if2_adc_in_src[] = {
1053 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
1054};
1055
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1056static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1057 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
1058
1059static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
1060 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
1061
1062/* MX-30 [5:4] */
1063static const char * const rt5670_if4_adc_in_src[] = {
1064 "IF_ADC1", "IF_ADC2", "IF_ADC3"
1065};
1066
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1067static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1068 RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src);
1069
1070static const struct snd_kcontrol_new rt5670_if4_adc_in_mux =
1071 SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum);
1072
1073/* MX-31 [15] [13] [11] [9] */
1074static const char * const rt5670_pdm_src[] = {
1075 "Mono DAC", "Stereo DAC"
1076};
1077
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1078static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1079 RT5670_PDM1_L_SFT, rt5670_pdm_src);
1080
1081static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
1082 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
1083
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1084static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1085 RT5670_PDM1_R_SFT, rt5670_pdm_src);
1086
1087static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
1088 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
1089
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1090static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1091 RT5670_PDM2_L_SFT, rt5670_pdm_src);
1092
1093static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
1094 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
1095
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1096static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1097 RT5670_PDM2_R_SFT, rt5670_pdm_src);
1098
1099static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
1100 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
1101
1102/* MX-FA [12] */
1103static const char * const rt5670_if1_adc1_in1_src[] = {
1104 "IF_ADC1", "IF1_ADC3"
1105};
1106
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1107static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1108 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
1109
1110static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
1111 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
1112
1113/* MX-FA [11] */
1114static const char * const rt5670_if1_adc1_in2_src[] = {
1115 "IF1_ADC1_IN1", "IF1_ADC4"
1116};
1117
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1118static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1119 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
1120
1121static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
1122 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
1123
1124/* MX-FA [10] */
1125static const char * const rt5670_if1_adc2_in1_src[] = {
1126 "IF1_ADC2_IN", "IF1_ADC4"
1127};
1128
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1129static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1130 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
1131
1132static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
1133 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
1134
1135/* MX-9D [9:8] */
1136static const char * const rt5670_vad_adc_src[] = {
1137 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
1138};
1139
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1140static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1141 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
1142
1143static const struct snd_kcontrol_new rt5670_vad_adc_mux =
1144 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
1145
1146static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
1147 struct snd_kcontrol *kcontrol, int event)
1148{
1149 struct snd_soc_codec *codec = w->codec;
1150 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1151
1152 switch (event) {
1153 case SND_SOC_DAPM_POST_PMU:
1154 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
1155 RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
1156 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1157 0x0400, 0x0400);
1158 /* headphone amp power on */
1159 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
1160 RT5670_PWR_HA | RT5670_PWR_FV1 |
1161 RT5670_PWR_FV2, RT5670_PWR_HA |
1162 RT5670_PWR_FV1 | RT5670_PWR_FV2);
1163 /* depop parameters */
1164 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
1165 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
1166 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1167 RT5670_HP_DCC_INT1, 0x9f00);
1168 mdelay(20);
1169 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1170 break;
1171 case SND_SOC_DAPM_PRE_PMD:
1172 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
1173 msleep(30);
1174 break;
1175 default:
1176 return 0;
1177 }
1178
1179 return 0;
1180}
1181
1182static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
1183 struct snd_kcontrol *kcontrol, int event)
1184{
1185 struct snd_soc_codec *codec = w->codec;
1186 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1187
1188 switch (event) {
1189 case SND_SOC_DAPM_POST_PMU:
1190 /* headphone unmute sequence */
1191 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1192 RT5670_MAMP_INT_REG2, 0xb400);
1193 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1194 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
1195 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1196 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1197 0x0300, 0x0300);
1198 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1199 RT5670_L_MUTE | RT5670_R_MUTE, 0);
1200 msleep(80);
1201 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1202 break;
1203
1204 case SND_SOC_DAPM_PRE_PMD:
1205 /* headphone mute sequence */
1206 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1207 RT5670_MAMP_INT_REG2, 0xb400);
1208 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1209 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
1210 mdelay(10);
1211 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1212 mdelay(10);
1213 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1214 RT5670_L_MUTE | RT5670_R_MUTE,
1215 RT5670_L_MUTE | RT5670_R_MUTE);
1216 msleep(20);
1217 regmap_update_bits(rt5670->regmap,
1218 RT5670_GEN_CTRL2, 0x0300, 0x0);
1219 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1220 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
1221 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1222 RT5670_MAMP_INT_REG2, 0xfc00);
1223 break;
1224
1225 default:
1226 return 0;
1227 }
1228
1229 return 0;
1230}
1231
1232static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
1233 struct snd_kcontrol *kcontrol, int event)
1234{
1235 struct snd_soc_codec *codec = w->codec;
1236
1237 switch (event) {
1238 case SND_SOC_DAPM_POST_PMU:
1239 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1240 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
1241 break;
1242
1243 case SND_SOC_DAPM_PRE_PMD:
1244 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1245 RT5670_PWR_BST1_P, 0);
1246 break;
1247
1248 default:
1249 return 0;
1250 }
1251
1252 return 0;
1253}
1254
1255static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
1256 struct snd_kcontrol *kcontrol, int event)
1257{
1258 struct snd_soc_codec *codec = w->codec;
1259
1260 switch (event) {
1261 case SND_SOC_DAPM_POST_PMU:
1262 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1263 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
1264 break;
1265
1266 case SND_SOC_DAPM_PRE_PMD:
1267 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1268 RT5670_PWR_BST2_P, 0);
1269 break;
1270
1271 default:
1272 return 0;
1273 }
1274
1275 return 0;
1276}
1277
1278static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
1279 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
1280 RT5670_PWR_PLL_BIT, 0, NULL, 0),
1281 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1282 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
1283 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
1284 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
1285
1286 /* ASRC */
1287 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
1288 11, 0, NULL, 0),
1289 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
1290 12, 0, NULL, 0),
1291 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
1292 10, 0, NULL, 0),
1293 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
1294 9, 0, NULL, 0),
1295 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
1296 8, 0, NULL, 0),
1297 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
1298 3, 0, NULL, 0),
1299 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
1300 2, 0, NULL, 0),
1301 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
1302 1, 0, NULL, 0),
1303 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
1304 0, 0, NULL, 0),
1305
1306 /* Input Side */
1307 /* micbias */
1308 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
1309 RT5670_PWR_MB1_BIT, 0, NULL, 0),
1310
1311 /* Input Lines */
1312 SND_SOC_DAPM_INPUT("DMIC L1"),
1313 SND_SOC_DAPM_INPUT("DMIC R1"),
1314 SND_SOC_DAPM_INPUT("DMIC L2"),
1315 SND_SOC_DAPM_INPUT("DMIC R2"),
1316 SND_SOC_DAPM_INPUT("DMIC L3"),
1317 SND_SOC_DAPM_INPUT("DMIC R3"),
1318
1319 SND_SOC_DAPM_INPUT("IN1P"),
1320 SND_SOC_DAPM_INPUT("IN1N"),
1321 SND_SOC_DAPM_INPUT("IN2P"),
1322 SND_SOC_DAPM_INPUT("IN2N"),
1323
1324 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1325 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1326 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1327
1328 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1329 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1330 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
1331 RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
1332 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
1333 RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
1334 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
1335 RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
1336 /* Boost */
1337 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
1338 0, NULL, 0, rt5670_bst1_event,
1339 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1340 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
1341 0, NULL, 0, rt5670_bst2_event,
1342 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1343 /* Input Volume */
1344 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
1345 RT5670_PWR_IN_L_BIT, 0, NULL, 0),
1346 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
1347 RT5670_PWR_IN_R_BIT, 0, NULL, 0),
1348
1349 /* REC Mixer */
1350 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
1351 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
1352 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
1353 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
1354 /* ADCs */
1355 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
1356 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
1357
1358 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1359
1360 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
1361 RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
1362 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
1363 RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
1364 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
1365 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
1366 /* ADC Mux */
1367 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1368 &rt5670_sto1_dmic_mux),
1369 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1370 &rt5670_sto_adc_l2_mux),
1371 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1372 &rt5670_sto_adc_r2_mux),
1373 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1374 &rt5670_sto_adc_l1_mux),
1375 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1376 &rt5670_sto_adc_r1_mux),
1377 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1378 &rt5670_sto2_dmic_mux),
1379 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1380 &rt5670_sto2_adc_l2_mux),
1381 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1382 &rt5670_sto2_adc_r2_mux),
1383 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1384 &rt5670_sto2_adc_l1_mux),
1385 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1386 &rt5670_sto2_adc_r1_mux),
1387 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1388 &rt5670_sto2_adc_lr_mux),
1389 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1390 &rt5670_mono_dmic_l_mux),
1391 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1392 &rt5670_mono_dmic_r_mux),
1393 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1394 &rt5670_mono_adc_l2_mux),
1395 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1396 &rt5670_mono_adc_l1_mux),
1397 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1398 &rt5670_mono_adc_r1_mux),
1399 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1400 &rt5670_mono_adc_r2_mux),
1401 /* ADC Mixer */
1402 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
1403 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1404 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1405 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1406 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
1407 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
1408 ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1409 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
1410 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
1411 ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1412 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1413 rt5670_sto2_adc_l_mix,
1414 ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
1415 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1416 rt5670_sto2_adc_r_mix,
1417 ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
1418 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
1419 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1420 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
1421 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
1422 ARRAY_SIZE(rt5670_mono_adc_l_mix)),
1423 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
1424 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1425 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
1426 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
1427 ARRAY_SIZE(rt5670_mono_adc_r_mix)),
1428
1429 /* ADC PGA */
1430 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1431 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1432 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1433 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1434 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1435 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1436 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1437 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1438 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1439 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1440 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1441 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1442 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1443 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1444 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1445 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1446
1447 /* DSP */
1448 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1449 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
1450 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
1451 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1452
1453 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
1454 &rt5670_txdp_slot_mux),
1455
1456 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1457 &rt5670_dsp_ul_mux),
1458 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1459 &rt5670_dsp_dl_mux),
1460
1461 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
1462 &rt5670_rxdp_mux),
1463
1464 /* IF2 Mux */
1465 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
1466 &rt5670_if2_adc_in_mux),
1467
1468 /* Digital Interface */
1469 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
1470 RT5670_PWR_I2S1_BIT, 0, NULL, 0),
1471 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1472 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1473 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1474 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1475 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1476 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1477 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1478 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1479 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1480 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
1481 RT5670_PWR_I2S2_BIT, 0, NULL, 0),
1482 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1483 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1484 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1485 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1486 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1487 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1488
1489 /* Digital Interface Select */
1490 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
1491 &rt5670_if1_adc1_in1_mux),
1492 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
1493 &rt5670_if1_adc1_in2_mux),
1494 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
1495 &rt5670_if1_adc2_in_mux),
1496 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
1497 &rt5670_if1_adc2_in1_mux),
1498 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1499 &rt5670_vad_adc_mux),
1500
1501 /* Audio Interface */
1502 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1503 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1504 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1505 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1506 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
1507
1508 /* Audio DSP */
1509 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1510
1511 /* Output Side */
1512 /* DAC mixer before sound effect */
1513 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1514 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
1515 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1516 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
1517 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1518
1519 /* DAC2 channel Mux */
1520 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1521 &rt5670_dac_l2_mux),
1522 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1523 &rt5670_dac_r2_mux),
1524 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
1525 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
1526 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
1527 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
1528
1529 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
1530 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
1531
1532 /* DAC Mixer */
1533 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
1534 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
1535 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
1536 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1537 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
1538 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1539 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1540 rt5670_sto_dac_l_mix,
1541 ARRAY_SIZE(rt5670_sto_dac_l_mix)),
1542 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1543 rt5670_sto_dac_r_mix,
1544 ARRAY_SIZE(rt5670_sto_dac_r_mix)),
1545 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1546 rt5670_mono_dac_l_mix,
1547 ARRAY_SIZE(rt5670_mono_dac_l_mix)),
1548 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1549 rt5670_mono_dac_r_mix,
1550 ARRAY_SIZE(rt5670_mono_dac_r_mix)),
1551 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1552 rt5670_dig_l_mix,
1553 ARRAY_SIZE(rt5670_dig_l_mix)),
1554 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1555 rt5670_dig_r_mix,
1556 ARRAY_SIZE(rt5670_dig_r_mix)),
1557
1558 /* DACs */
1559 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
1560 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
1561 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
1562 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
1563 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1564 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1565 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
1566 RT5670_PWR_DAC_L2_BIT, 0),
1567
1568 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
1569 RT5670_PWR_DAC_R2_BIT, 0),
1570 /* OUT Mixer */
1571
1572 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
1573 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
1574 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
1575 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
1576 /* Ouput Volume */
1577 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
1578 RT5670_PWR_HV_L_BIT, 0,
1579 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
1580 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
1581 RT5670_PWR_HV_R_BIT, 0,
1582 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
1583 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1584 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1585 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1586
1587 /* HPO/LOUT/Mono Mixer */
1588 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
1589 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
1590 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
1591 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
1592 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
1593 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
1594 SND_SOC_DAPM_PRE_PMD),
1595 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
1596 RT5670_PWR_HP_L_BIT, 0, NULL, 0),
1597 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
1598 RT5670_PWR_HP_R_BIT, 0, NULL, 0),
1599 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1600 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
1601 SND_SOC_DAPM_POST_PMU),
1602 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1603 &lout_l_enable_control),
1604 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1605 &lout_r_enable_control),
1606 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1607
1608 /* PDM */
1609 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
1610 RT5670_PWR_PDM1_BIT, 0, NULL, 0),
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1611
1612 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
1613 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
1614 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
1615 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1616
1617 /* Output Lines */
1618 SND_SOC_DAPM_OUTPUT("HPOL"),
1619 SND_SOC_DAPM_OUTPUT("HPOR"),
1620 SND_SOC_DAPM_OUTPUT("LOUTL"),
1621 SND_SOC_DAPM_OUTPUT("LOUTR"),
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]1622};
1623
1624static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
1625 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
1626 RT5670_PWR_PDM2_BIT, 0, NULL, 0),
1627 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
1628 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
1629 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
1630 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1631 SND_SOC_DAPM_OUTPUT("PDM1L"),
1632 SND_SOC_DAPM_OUTPUT("PDM1R"),
1633 SND_SOC_DAPM_OUTPUT("PDM2L"),
1634 SND_SOC_DAPM_OUTPUT("PDM2R"),
1635};
1636
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]1637static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1638 SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1639 SND_SOC_DAPM_OUTPUT("SPOLP"),
1640 SND_SOC_DAPM_OUTPUT("SPOLN"),
1641 SND_SOC_DAPM_OUTPUT("SPORP"),
1642 SND_SOC_DAPM_OUTPUT("SPORN"),
1643};
1644
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1645static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
1646 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1647 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
1648 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1649 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1650 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1651 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1652 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
1653
Bard Liaoe50334d2014-11-17 15:27:21 +0800[diff] [blame^]1654 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
1655 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1656
1657 { "DMIC1", NULL, "DMIC L1" },
1658 { "DMIC1", NULL, "DMIC R1" },
1659 { "DMIC2", NULL, "DMIC L2" },
1660 { "DMIC2", NULL, "DMIC R2" },
1661 { "DMIC3", NULL, "DMIC L3" },
1662 { "DMIC3", NULL, "DMIC R3" },
1663
1664 { "BST1", NULL, "IN1P" },
1665 { "BST1", NULL, "IN1N" },
1666 { "BST1", NULL, "Mic Det Power" },
1667 { "BST2", NULL, "IN2P" },
1668 { "BST2", NULL, "IN2N" },
1669
1670 { "INL VOL", NULL, "IN2P" },
1671 { "INR VOL", NULL, "IN2N" },
1672
1673 { "RECMIXL", "INL Switch", "INL VOL" },
1674 { "RECMIXL", "BST2 Switch", "BST2" },
1675 { "RECMIXL", "BST1 Switch", "BST1" },
1676
1677 { "RECMIXR", "INR Switch", "INR VOL" },
1678 { "RECMIXR", "BST2 Switch", "BST2" },
1679 { "RECMIXR", "BST1 Switch", "BST1" },
1680
1681 { "ADC 1", NULL, "RECMIXL" },
1682 { "ADC 1", NULL, "ADC 1 power" },
1683 { "ADC 1", NULL, "ADC clock" },
1684 { "ADC 2", NULL, "RECMIXR" },
1685 { "ADC 2", NULL, "ADC 2 power" },
1686 { "ADC 2", NULL, "ADC clock" },
1687
1688 { "DMIC L1", NULL, "DMIC CLK" },
1689 { "DMIC L1", NULL, "DMIC1 Power" },
1690 { "DMIC R1", NULL, "DMIC CLK" },
1691 { "DMIC R1", NULL, "DMIC1 Power" },
1692 { "DMIC L2", NULL, "DMIC CLK" },
1693 { "DMIC L2", NULL, "DMIC2 Power" },
1694 { "DMIC R2", NULL, "DMIC CLK" },
1695 { "DMIC R2", NULL, "DMIC2 Power" },
1696 { "DMIC L3", NULL, "DMIC CLK" },
1697 { "DMIC L3", NULL, "DMIC3 Power" },
1698 { "DMIC R3", NULL, "DMIC CLK" },
1699 { "DMIC R3", NULL, "DMIC3 Power" },
1700
1701 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1702 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1703 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
1704
1705 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
1706 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
1707 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
1708
1709 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1710 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1711 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
1712
1713 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1714 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1715 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
1716
1717 { "ADC 1_2", NULL, "ADC 1" },
1718 { "ADC 1_2", NULL, "ADC 2" },
1719
1720 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1721 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1722 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
1723 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1724
1725 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
1726 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1727 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1728 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1729
1730 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1731 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1732 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1733 { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
1734
1735 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1736 { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
1737 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1738 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1739
1740 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1741 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1742 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1743 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1744
1745 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1746 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
1747 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1748
1749 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1750 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
1751 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1752
1753 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1754 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1755 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
1756 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
1757
1758 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1759 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1760 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
1761 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
1762
1763 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
1764 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1765 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
1766 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1767
1768 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
1769 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1770 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
1771 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1772
1773 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
1774 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
1775 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
1776 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
1777
1778 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
1779 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
1780
1781 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
1782 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
1783
1784 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
1785 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
1786 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1787
1788 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
1789 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
1790 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1791
1792 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1793 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1794 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1795 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
1796
1797 { "VAD_ADC", NULL, "VAD ADC Mux" },
1798
1799 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1800 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1801 { "IF_ADC2", NULL, "Mono ADC MIXL" },
1802 { "IF_ADC2", NULL, "Mono ADC MIXR" },
1803 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
1804 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
1805
1806 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
1807 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
1808
1809 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
1810 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" },
1811
1812 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
1813 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
1814
1815 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
1816 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" },
1817
1818 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
1819 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
1820
1821 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
1822 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
1823 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
1824 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
1825 { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
1826 { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
1827
1828 { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
1829 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
1830 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
1831 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
1832 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
1833 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
1834 { "RxDP Mux", "DAC1", "DAC MIX" },
1835
1836 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
1837 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
1838 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
1839 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
1840
1841 { "DSP UL Mux", "Bypass", "TDM Data Mux" },
1842 { "DSP UL Mux", NULL, "I2S DSP" },
1843 { "DSP DL Mux", "Bypass", "RxDP Mux" },
1844 { "DSP DL Mux", NULL, "I2S DSP" },
1845
1846 { "TxDP_ADC_L", NULL, "DSP UL Mux" },
1847 { "TxDP_ADC_R", NULL, "DSP UL Mux" },
1848 { "TxDC_DAC", NULL, "DSP DL Mux" },
1849
1850 { "TxDP_ADC", NULL, "TxDP_ADC_L" },
1851 { "TxDP_ADC", NULL, "TxDP_ADC_R" },
1852
1853 { "IF1 ADC", NULL, "I2S1" },
1854 { "IF1 ADC", NULL, "IF1_ADC1" },
1855 { "IF1 ADC", NULL, "IF1_ADC2" },
1856 { "IF1 ADC", NULL, "IF_ADC3" },
1857 { "IF1 ADC", NULL, "TxDP_ADC" },
1858
1859 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1860 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1861 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
1862 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
1863 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
1864 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1865
1866 { "IF2 ADC L", NULL, "IF2 ADC Mux" },
1867 { "IF2 ADC R", NULL, "IF2 ADC Mux" },
1868
1869 { "IF2 ADC", NULL, "I2S2" },
1870 { "IF2 ADC", NULL, "IF2 ADC L" },
1871 { "IF2 ADC", NULL, "IF2 ADC R" },
1872
1873 { "AIF1TX", NULL, "IF1 ADC" },
1874 { "AIF2TX", NULL, "IF2 ADC" },
1875
1876 { "IF1 DAC1", NULL, "AIF1RX" },
1877 { "IF1 DAC2", NULL, "AIF1RX" },
1878 { "IF2 DAC", NULL, "AIF2RX" },
1879
1880 { "IF1 DAC1", NULL, "I2S1" },
1881 { "IF1 DAC2", NULL, "I2S1" },
1882 { "IF2 DAC", NULL, "I2S2" },
1883
1884 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1885 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1886 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1887 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1888 { "IF2 DAC L", NULL, "IF2 DAC" },
1889 { "IF2 DAC R", NULL, "IF2 DAC" },
1890
1891 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1892 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1893
1894 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1895 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1896
1897 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1898 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1899 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
1900 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1901 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1902 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
1903
1904 { "DAC MIX", NULL, "DAC1 MIXL" },
1905 { "DAC MIX", NULL, "DAC1 MIXR" },
1906
1907 { "Audio DSP", NULL, "DAC1 MIXL" },
1908 { "Audio DSP", NULL, "DAC1 MIXR" },
1909
1910 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1911 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1912 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
1913 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1914 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1915 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
1916
1917 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1918 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1919 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
1920 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
1921 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1922 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
1923
1924 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1925 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1926 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1927 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
1928 { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
1929 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1930 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1931 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1932 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
1933 { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
1934
1935 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1936 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1937 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1938 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
1939 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1940 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1941 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1942 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
1943
1944 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1945 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1946 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1947 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1948 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1949 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1950
1951 { "DAC L1", NULL, "DAC L1 Power" },
1952 { "DAC L1", NULL, "Stereo DAC MIXL" },
1953 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1954 { "DAC R1", NULL, "DAC R1 Power" },
1955 { "DAC R1", NULL, "Stereo DAC MIXR" },
1956 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1957 { "DAC L2", NULL, "Mono DAC MIXL" },
1958 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1959 { "DAC R2", NULL, "Mono DAC MIXR" },
1960 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1961
1962 { "OUT MIXL", "BST1 Switch", "BST1" },
1963 { "OUT MIXL", "INL Switch", "INL VOL" },
1964 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1965 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1966
1967 { "OUT MIXR", "BST2 Switch", "BST2" },
1968 { "OUT MIXR", "INR Switch", "INR VOL" },
1969 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1970 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1971
1972 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1973 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1974 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1975 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1976
1977 { "DAC 2", NULL, "DAC L2" },
1978 { "DAC 2", NULL, "DAC R2" },
1979 { "DAC 1", NULL, "DAC L1" },
1980 { "DAC 1", NULL, "DAC R1" },
1981 { "HPOVOL", NULL, "HPOVOL MIXL" },
1982 { "HPOVOL", NULL, "HPOVOL MIXR" },
1983 { "HPO MIX", "DAC1 Switch", "DAC 1" },
1984 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1985
1986 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1987 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1988 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1989 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1990
1991 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1992 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1993 { "PDM1 L Mux", NULL, "PDM1 Power" },
1994 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
1995 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
1996 { "PDM1 R Mux", NULL, "PDM1 Power" },
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1997
1998 { "HP Amp", NULL, "HPO MIX" },
1999 { "HP Amp", NULL, "Mic Det Power" },
2000 { "HPOL", NULL, "HP Amp" },
2001 { "HPOL", NULL, "HP L Amp" },
2002 { "HPOL", NULL, "Improve HP Amp Drv" },
2003 { "HPOR", NULL, "HP Amp" },
2004 { "HPOR", NULL, "HP R Amp" },
2005 { "HPOR", NULL, "Improve HP Amp Drv" },
2006
2007 { "LOUT Amp", NULL, "LOUT MIX" },
2008 { "LOUT L Playback", "Switch", "LOUT Amp" },
2009 { "LOUT R Playback", "Switch", "LOUT Amp" },
2010 { "LOUTL", NULL, "LOUT L Playback" },
2011 { "LOUTR", NULL, "LOUT R Playback" },
2012 { "LOUTL", NULL, "Improve HP Amp Drv" },
2013 { "LOUTR", NULL, "Improve HP Amp Drv" },
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2014};
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2015
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2016static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
2017 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2018 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
2019 { "PDM2 L Mux", NULL, "PDM2 Power" },
2020 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2021 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
2022 { "PDM2 R Mux", NULL, "PDM2 Power" },
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2023 { "PDM1L", NULL, "PDM1 L Mux" },
2024 { "PDM1R", NULL, "PDM1 R Mux" },
2025 { "PDM2L", NULL, "PDM2 L Mux" },
2026 { "PDM2R", NULL, "PDM2 R Mux" },
2027};
2028
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2029static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
2030 { "SPO Amp", NULL, "PDM1 L Mux" },
2031 { "SPO Amp", NULL, "PDM1 R Mux" },
2032 { "SPOLP", NULL, "SPO Amp" },
2033 { "SPOLN", NULL, "SPO Amp" },
2034 { "SPORP", NULL, "SPO Amp" },
2035 { "SPORN", NULL, "SPO Amp" },
2036};
2037
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2038static int rt5670_hw_params(struct snd_pcm_substream *substream,
2039 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2040{
2041 struct snd_soc_codec *codec = dai->codec;
2042 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2043 unsigned int val_len = 0, val_clk, mask_clk;
2044 int pre_div, bclk_ms, frame_size;
2045
2046 rt5670->lrck[dai->id] = params_rate(params);
2047 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
2048 if (pre_div < 0) {
2049 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
2050 rt5670->lrck[dai->id], dai->id);
2051 return -EINVAL;
2052 }
2053 frame_size = snd_soc_params_to_frame_size(params);
2054 if (frame_size < 0) {
2055 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2056 return -EINVAL;
2057 }
2058 bclk_ms = frame_size > 32;
2059 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
2060
2061 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2062 rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
2063 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2064 bclk_ms, pre_div, dai->id);
2065
2066 switch (params_width(params)) {
2067 case 16:
2068 break;
2069 case 20:
2070 val_len |= RT5670_I2S_DL_20;
2071 break;
2072 case 24:
2073 val_len |= RT5670_I2S_DL_24;
2074 break;
2075 case 8:
2076 val_len |= RT5670_I2S_DL_8;
2077 break;
2078 default:
2079 return -EINVAL;
2080 }
2081
2082 switch (dai->id) {
2083 case RT5670_AIF1:
2084 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
2085 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
2086 pre_div << RT5670_I2S_PD1_SFT;
2087 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2088 RT5670_I2S_DL_MASK, val_len);
2089 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2090 break;
2091 case RT5670_AIF2:
2092 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
2093 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
2094 pre_div << RT5670_I2S_PD2_SFT;
2095 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2096 RT5670_I2S_DL_MASK, val_len);
2097 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2098 break;
2099 default:
2100 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2101 return -EINVAL;
2102 }
2103
2104 return 0;
2105}
2106
2107static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2108{
2109 struct snd_soc_codec *codec = dai->codec;
2110 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2111 unsigned int reg_val = 0;
2112
2113 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2114 case SND_SOC_DAIFMT_CBM_CFM:
2115 rt5670->master[dai->id] = 1;
2116 break;
2117 case SND_SOC_DAIFMT_CBS_CFS:
2118 reg_val |= RT5670_I2S_MS_S;
2119 rt5670->master[dai->id] = 0;
2120 break;
2121 default:
2122 return -EINVAL;
2123 }
2124
2125 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2126 case SND_SOC_DAIFMT_NB_NF:
2127 break;
2128 case SND_SOC_DAIFMT_IB_NF:
2129 reg_val |= RT5670_I2S_BP_INV;
2130 break;
2131 default:
2132 return -EINVAL;
2133 }
2134
2135 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2136 case SND_SOC_DAIFMT_I2S:
2137 break;
2138 case SND_SOC_DAIFMT_LEFT_J:
2139 reg_val |= RT5670_I2S_DF_LEFT;
2140 break;
2141 case SND_SOC_DAIFMT_DSP_A:
2142 reg_val |= RT5670_I2S_DF_PCM_A;
2143 break;
2144 case SND_SOC_DAIFMT_DSP_B:
2145 reg_val |= RT5670_I2S_DF_PCM_B;
2146 break;
2147 default:
2148 return -EINVAL;
2149 }
2150
2151 switch (dai->id) {
2152 case RT5670_AIF1:
2153 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2154 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2155 RT5670_I2S_DF_MASK, reg_val);
2156 break;
2157 case RT5670_AIF2:
2158 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2159 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2160 RT5670_I2S_DF_MASK, reg_val);
2161 break;
2162 default:
2163 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2164 return -EINVAL;
2165 }
2166 return 0;
2167}
2168
2169static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai,
2170 int clk_id, unsigned int freq, int dir)
2171{
2172 struct snd_soc_codec *codec = dai->codec;
2173 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2174 unsigned int reg_val = 0;
2175
2176 if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src)
2177 return 0;
2178
2179 switch (clk_id) {
2180 case RT5670_SCLK_S_MCLK:
2181 reg_val |= RT5670_SCLK_SRC_MCLK;
2182 break;
2183 case RT5670_SCLK_S_PLL1:
2184 reg_val |= RT5670_SCLK_SRC_PLL1;
2185 break;
2186 case RT5670_SCLK_S_RCCLK:
2187 reg_val |= RT5670_SCLK_SRC_RCCLK;
2188 break;
2189 default:
2190 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2191 return -EINVAL;
2192 }
2193 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2194 RT5670_SCLK_SRC_MASK, reg_val);
2195 rt5670->sysclk = freq;
2196 rt5670->sysclk_src = clk_id;
2197
2198 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2199
2200 return 0;
2201}
2202
2203static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2204 unsigned int freq_in, unsigned int freq_out)
2205{
2206 struct snd_soc_codec *codec = dai->codec;
2207 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2208 struct rl6231_pll_code pll_code;
2209 int ret;
2210
2211 if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
2212 freq_out == rt5670->pll_out)
2213 return 0;
2214
2215 if (!freq_in || !freq_out) {
2216 dev_dbg(codec->dev, "PLL disabled\n");
2217
2218 rt5670->pll_in = 0;
2219 rt5670->pll_out = 0;
2220 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2221 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
2222 return 0;
2223 }
2224
2225 switch (source) {
2226 case RT5670_PLL1_S_MCLK:
2227 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2228 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
2229 break;
2230 case RT5670_PLL1_S_BCLK1:
2231 case RT5670_PLL1_S_BCLK2:
2232 case RT5670_PLL1_S_BCLK3:
2233 case RT5670_PLL1_S_BCLK4:
2234 switch (dai->id) {
2235 case RT5670_AIF1:
2236 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2237 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
2238 break;
2239 case RT5670_AIF2:
2240 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2241 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
2242 break;
2243 default:
2244 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2245 return -EINVAL;
2246 }
2247 break;
2248 default:
2249 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2250 return -EINVAL;
2251 }
2252
2253 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2254 if (ret < 0) {
2255 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2256 return ret;
2257 }
2258
2259 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2260 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2261 pll_code.n_code, pll_code.k_code);
2262
2263 snd_soc_write(codec, RT5670_PLL_CTRL1,
2264 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
2265 snd_soc_write(codec, RT5670_PLL_CTRL2,
2266 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
2267 pll_code.m_bp << RT5670_PLL_M_BP_SFT);
2268
2269 rt5670->pll_in = freq_in;
2270 rt5670->pll_out = freq_out;
2271 rt5670->pll_src = source;
2272
2273 return 0;
2274}
2275
2276static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2277 unsigned int rx_mask, int slots, int slot_width)
2278{
2279 struct snd_soc_codec *codec = dai->codec;
2280 unsigned int val = 0;
2281
2282 if (rx_mask || tx_mask)
2283 val |= (1 << 14);
2284
2285 switch (slots) {
2286 case 4:
2287 val |= (1 << 12);
2288 break;
2289 case 6:
2290 val |= (2 << 12);
2291 break;
2292 case 8:
2293 val |= (3 << 12);
2294 break;
2295 case 2:
2296 break;
2297 default:
2298 return -EINVAL;
2299 }
2300
2301 switch (slot_width) {
2302 case 20:
2303 val |= (1 << 10);
2304 break;
2305 case 24:
2306 val |= (2 << 10);
2307 break;
2308 case 32:
2309 val |= (3 << 10);
2310 break;
2311 case 16:
2312 break;
2313 default:
2314 return -EINVAL;
2315 }
2316
2317 snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val);
2318
2319 return 0;
2320}
2321
2322static int rt5670_set_bias_level(struct snd_soc_codec *codec,
2323 enum snd_soc_bias_level level)
2324{
Bard Liao044b7242014-11-12 19:54:30 +0800[diff] [blame]2325 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2326
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2327 switch (level) {
2328 case SND_SOC_BIAS_PREPARE:
2329 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
2330 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2331 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2332 RT5670_PWR_BG | RT5670_PWR_VREF2,
2333 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2334 RT5670_PWR_BG | RT5670_PWR_VREF2);
2335 mdelay(10);
2336 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2337 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2338 RT5670_PWR_FV1 | RT5670_PWR_FV2);
2339 snd_soc_update_bits(codec, RT5670_CHARGE_PUMP,
2340 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
2341 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
2342 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1);
2343 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2344 RT5670_LDO_SEL_MASK, 0x3);
2345 }
2346 break;
2347 case SND_SOC_BIAS_STANDBY:
Bard Liao044b7242014-11-12 19:54:30 +0800[diff] [blame]2348 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2349 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
2350 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2351 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2352 RT5670_LDO_SEL_MASK, 0x1);
2353 break;
Bard Liao044b7242014-11-12 19:54:30 +0800[diff] [blame]2354 case SND_SOC_BIAS_OFF:
2355 if (rt5670->pdata.jd_mode)
2356 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2357 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2358 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2359 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2360 RT5670_PWR_MB | RT5670_PWR_BG);
2361 else
2362 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2363 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2364 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2365 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2366
2367 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0);
2368 break;
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2369
2370 default:
2371 break;
2372 }
2373 codec->dapm.bias_level = level;
2374
2375 return 0;
2376}
2377
2378static int rt5670_probe(struct snd_soc_codec *codec)
2379{
2380 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2381
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2382 switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) {
2383 case RT5670_ID_5670:
2384 case RT5670_ID_5671:
2385 snd_soc_dapm_new_controls(&codec->dapm,
2386 rt5670_specific_dapm_widgets,
2387 ARRAY_SIZE(rt5670_specific_dapm_widgets));
2388 snd_soc_dapm_add_routes(&codec->dapm,
2389 rt5670_specific_dapm_routes,
2390 ARRAY_SIZE(rt5670_specific_dapm_routes));
2391 break;
2392 case RT5670_ID_5672:
2393 snd_soc_dapm_new_controls(&codec->dapm,
2394 rt5672_specific_dapm_widgets,
2395 ARRAY_SIZE(rt5672_specific_dapm_widgets));
2396 snd_soc_dapm_add_routes(&codec->dapm,
2397 rt5672_specific_dapm_routes,
2398 ARRAY_SIZE(rt5672_specific_dapm_routes));
2399 break;
2400 default:
2401 dev_err(codec->dev,
2402 "The driver is for RT5670 RT5671 or RT5672 only\n");
2403 return -ENODEV;
2404 }
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2405 rt5670->codec = codec;
2406
2407 return 0;
2408}
2409
2410static int rt5670_remove(struct snd_soc_codec *codec)
2411{
2412 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2413
2414 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2415 return 0;
2416}
2417
2418#ifdef CONFIG_PM
2419static int rt5670_suspend(struct snd_soc_codec *codec)
2420{
2421 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2422
2423 regcache_cache_only(rt5670->regmap, true);
2424 regcache_mark_dirty(rt5670->regmap);
2425 return 0;
2426}
2427
2428static int rt5670_resume(struct snd_soc_codec *codec)
2429{
2430 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2431
2432 regcache_cache_only(rt5670->regmap, false);
2433 regcache_sync(rt5670->regmap);
2434
2435 return 0;
2436}
2437#else
2438#define rt5670_suspend NULL
2439#define rt5670_resume NULL
2440#endif
2441
2442#define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2443#define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2444 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2445
Mark Brownff62b952014-08-01 17:22:19 +0100[diff] [blame]2446static struct snd_soc_dai_ops rt5670_aif_dai_ops = {
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2447 .hw_params = rt5670_hw_params,
2448 .set_fmt = rt5670_set_dai_fmt,
2449 .set_sysclk = rt5670_set_dai_sysclk,
2450 .set_tdm_slot = rt5670_set_tdm_slot,
2451 .set_pll = rt5670_set_dai_pll,
2452};
2453
Mark Brownff62b952014-08-01 17:22:19 +0100[diff] [blame]2454static struct snd_soc_dai_driver rt5670_dai[] = {
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2455 {
2456 .name = "rt5670-aif1",
2457 .id = RT5670_AIF1,
2458 .playback = {
2459 .stream_name = "AIF1 Playback",
2460 .channels_min = 1,
2461 .channels_max = 2,
2462 .rates = RT5670_STEREO_RATES,
2463 .formats = RT5670_FORMATS,
2464 },
2465 .capture = {
2466 .stream_name = "AIF1 Capture",
2467 .channels_min = 1,
2468 .channels_max = 2,
2469 .rates = RT5670_STEREO_RATES,
2470 .formats = RT5670_FORMATS,
2471 },
2472 .ops = &rt5670_aif_dai_ops,
2473 },
2474 {
2475 .name = "rt5670-aif2",
2476 .id = RT5670_AIF2,
2477 .playback = {
2478 .stream_name = "AIF2 Playback",
2479 .channels_min = 1,
2480 .channels_max = 2,
2481 .rates = RT5670_STEREO_RATES,
2482 .formats = RT5670_FORMATS,
2483 },
2484 .capture = {
2485 .stream_name = "AIF2 Capture",
2486 .channels_min = 1,
2487 .channels_max = 2,
2488 .rates = RT5670_STEREO_RATES,
2489 .formats = RT5670_FORMATS,
2490 },
2491 .ops = &rt5670_aif_dai_ops,
2492 },
2493};
2494
2495static struct snd_soc_codec_driver soc_codec_dev_rt5670 = {
2496 .probe = rt5670_probe,
2497 .remove = rt5670_remove,
2498 .suspend = rt5670_suspend,
2499 .resume = rt5670_resume,
2500 .set_bias_level = rt5670_set_bias_level,
2501 .idle_bias_off = true,
2502 .controls = rt5670_snd_controls,
2503 .num_controls = ARRAY_SIZE(rt5670_snd_controls),
2504 .dapm_widgets = rt5670_dapm_widgets,
2505 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
2506 .dapm_routes = rt5670_dapm_routes,
2507 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
2508};
2509
2510static const struct regmap_config rt5670_regmap = {
2511 .reg_bits = 8,
2512 .val_bits = 16,
2513 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
2514 RT5670_PR_SPACING),
2515 .volatile_reg = rt5670_volatile_register,
2516 .readable_reg = rt5670_readable_register,
2517 .cache_type = REGCACHE_RBTREE,
2518 .reg_defaults = rt5670_reg,
2519 .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
2520 .ranges = rt5670_ranges,
2521 .num_ranges = ARRAY_SIZE(rt5670_ranges),
2522};
2523
2524static const struct i2c_device_id rt5670_i2c_id[] = {
2525 { "rt5670", 0 },
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2526 { "rt5671", 0 },
2527 { "rt5672", 0 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2528 { }
2529};
2530MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
2531
Mengdong Lin06058152014-11-14 15:51:34 +0800[diff] [blame]2532#ifdef CONFIG_ACPI
2533static struct acpi_device_id rt5670_acpi_match[] = {
2534 { "10EC5670", 0},
2535 { },
2536};
2537MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
2538#endif
2539
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2540static int rt5670_i2c_probe(struct i2c_client *i2c,
2541 const struct i2c_device_id *id)
2542{
2543 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev);
2544 struct rt5670_priv *rt5670;
2545 int ret;
2546 unsigned int val;
2547
2548 rt5670 = devm_kzalloc(&i2c->dev,
2549 sizeof(struct rt5670_priv),
2550 GFP_KERNEL);
2551 if (NULL == rt5670)
2552 return -ENOMEM;
2553
2554 i2c_set_clientdata(i2c, rt5670);
2555
2556 if (pdata)
2557 rt5670->pdata = *pdata;
2558
2559 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
2560 if (IS_ERR(rt5670->regmap)) {
2561 ret = PTR_ERR(rt5670->regmap);
2562 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2563 ret);
2564 return ret;
2565 }
2566
2567 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
2568 if (val != RT5670_DEVICE_ID) {
2569 dev_err(&i2c->dev,
2570 "Device with ID register %x is not rt5670/72\n", val);
2571 return -ENODEV;
2572 }
2573
2574 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2575 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2576 RT5670_PWR_HP_L | RT5670_PWR_HP_R |
2577 RT5670_PWR_VREF2, RT5670_PWR_VREF2);
2578 msleep(100);
2579
2580 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2581
2582 ret = regmap_register_patch(rt5670->regmap, init_list,
2583 ARRAY_SIZE(init_list));
2584 if (ret != 0)
2585 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2586
2587 if (rt5670->pdata.in2_diff)
2588 regmap_update_bits(rt5670->regmap, RT5670_IN2,
2589 RT5670_IN_DF2, RT5670_IN_DF2);
2590
2591 if (i2c->irq) {
2592 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2593 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
2594 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
2595 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
2596
2597 }
2598
2599 if (rt5670->pdata.jd_mode) {
2600 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2601 RT5670_PWR_MB, RT5670_PWR_MB);
2602 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
2603 RT5670_PWR_JD1, RT5670_PWR_JD1);
2604 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
2605 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
2606 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
2607 RT5670_JD_TRI_CBJ_SEL_MASK |
2608 RT5670_JD_TRI_HPO_SEL_MASK,
2609 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
2610 switch (rt5670->pdata.jd_mode) {
2611 case 1:
2612 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2613 RT5670_JD1_MODE_MASK,
2614 RT5670_JD1_MODE_0);
2615 break;
2616 case 2:
2617 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2618 RT5670_JD1_MODE_MASK,
2619 RT5670_JD1_MODE_1);
2620 break;
2621 case 3:
2622 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2623 RT5670_JD1_MODE_MASK,
2624 RT5670_JD1_MODE_2);
2625 break;
2626 default:
2627 break;
2628 }
2629 }
2630
2631 if (rt5670->pdata.dmic_en) {
2632 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2633 RT5670_GP2_PIN_MASK,
2634 RT5670_GP2_PIN_DMIC1_SCL);
2635
2636 switch (rt5670->pdata.dmic1_data_pin) {
2637 case RT5670_DMIC_DATA_IN2P:
2638 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2639 RT5670_DMIC_1_DP_MASK,
2640 RT5670_DMIC_1_DP_IN2P);
2641 break;
2642
2643 case RT5670_DMIC_DATA_GPIO6:
2644 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2645 RT5670_DMIC_1_DP_MASK,
2646 RT5670_DMIC_1_DP_GPIO6);
2647 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2648 RT5670_GP6_PIN_MASK,
2649 RT5670_GP6_PIN_DMIC1_SDA);
2650 break;
2651
2652 case RT5670_DMIC_DATA_GPIO7:
2653 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2654 RT5670_DMIC_1_DP_MASK,
2655 RT5670_DMIC_1_DP_GPIO7);
2656 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2657 RT5670_GP7_PIN_MASK,
2658 RT5670_GP7_PIN_DMIC1_SDA);
2659 break;
2660
2661 default:
2662 break;
2663 }
2664
2665 switch (rt5670->pdata.dmic2_data_pin) {
2666 case RT5670_DMIC_DATA_IN3N:
2667 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2668 RT5670_DMIC_2_DP_MASK,
2669 RT5670_DMIC_2_DP_IN3N);
2670 break;
2671
2672 case RT5670_DMIC_DATA_GPIO8:
2673 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2674 RT5670_DMIC_2_DP_MASK,
2675 RT5670_DMIC_2_DP_GPIO8);
2676 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2677 RT5670_GP8_PIN_MASK,
2678 RT5670_GP8_PIN_DMIC2_SDA);
2679 break;
2680
2681 default:
2682 break;
2683 }
2684
2685 switch (rt5670->pdata.dmic3_data_pin) {
2686 case RT5670_DMIC_DATA_GPIO5:
2687 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
2688 RT5670_DMIC_3_DP_MASK,
2689 RT5670_DMIC_3_DP_GPIO5);
2690 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2691 RT5670_GP5_PIN_MASK,
2692 RT5670_GP5_PIN_DMIC3_SDA);
2693 break;
2694
2695 case RT5670_DMIC_DATA_GPIO9:
2696 case RT5670_DMIC_DATA_GPIO10:
2697 dev_err(&i2c->dev,
2698 "Always use GPIO5 as DMIC3 data pin\n");
2699 break;
2700
2701 default:
2702 break;
2703 }
2704
2705 }
2706
2707 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670,
2708 rt5670_dai, ARRAY_SIZE(rt5670_dai));
2709 if (ret < 0)
2710 goto err;
2711
2712 return 0;
2713err:
2714 return ret;
2715}
2716
2717static int rt5670_i2c_remove(struct i2c_client *i2c)
2718{
2719 snd_soc_unregister_codec(&i2c->dev);
2720
2721 return 0;
2722}
2723
Mark Brownff62b952014-08-01 17:22:19 +0100[diff] [blame]2724static struct i2c_driver rt5670_i2c_driver = {
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2725 .driver = {
2726 .name = "rt5670",
2727 .owner = THIS_MODULE,
Mengdong Lin06058152014-11-14 15:51:34 +0800[diff] [blame]2728 .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2729 },
2730 .probe = rt5670_i2c_probe,
2731 .remove = rt5670_i2c_remove,
2732 .id_table = rt5670_i2c_id,
2733};
2734
2735module_i2c_driver(rt5670_i2c_driver);
2736
2737MODULE_DESCRIPTION("ASoC RT5670 driver");
2738MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2739MODULE_LICENSE("GPL v2");