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hualing chen7c8ff2e2021-08-12 15:39:37 +08001/* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
Chuangcheng Pengae4ec202020-08-19 13:19:11 +08002/*
3 * dmx.h
4 *
5 * Copyright (C) 2000 Marcus Metzler <marcus@convergence.de>
6 * & Ralph Metzler <ralph@convergence.de>
7 * for convergence integrated media GmbH
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public License
11 * as published by the Free Software Foundation; either version 2.1
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU Lesser General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 */
24
25#ifndef _UAPI_DVBDMX_H_
26#define _UAPI_DVBDMX_H_
27
28#include <linux/types.h>
29#ifndef __KERNEL__
30#include <time.h>
31#endif
Chuangcheng Pengae4ec202020-08-19 13:19:11 +080032#define CONFIG_AMLOGIC_DVB_COMPAT
33
34#define DMX_FILTER_SIZE 16
35
36enum dmx_output
37{
38 DMX_OUT_DECODER, /* Streaming directly to decoder. */
39 DMX_OUT_TAP, /* Output going to a memory buffer */
40 /* (to be retrieved via the read command).*/
41 DMX_OUT_TS_TAP, /* Output multiplexed into a new TS */
42 /* (to be retrieved by reading from the */
43 /* logical DVR device). */
44 DMX_OUT_TSDEMUX_TAP /* Like TS_TAP but retrieved from the DMX device */
45};
46
47typedef enum dmx_output dmx_output_t;
48
49typedef enum dmx_input
50{
51 DMX_IN_FRONTEND, /* Input from a front-end device. */
52 DMX_IN_DVR /* Input from the logical DVR device. */
53} dmx_input_t;
54
55
56typedef enum dmx_ts_pes
57{
58 DMX_PES_AUDIO0,
59 DMX_PES_VIDEO0,
60 DMX_PES_TELETEXT0,
61 DMX_PES_SUBTITLE0,
62 DMX_PES_PCR0,
63
64 DMX_PES_AUDIO1,
65 DMX_PES_VIDEO1,
66 DMX_PES_TELETEXT1,
67 DMX_PES_SUBTITLE1,
68 DMX_PES_PCR1,
69
70 DMX_PES_AUDIO2,
71 DMX_PES_VIDEO2,
72 DMX_PES_TELETEXT2,
73 DMX_PES_SUBTITLE2,
74 DMX_PES_PCR2,
75
76 DMX_PES_AUDIO3,
77 DMX_PES_VIDEO3,
78 DMX_PES_TELETEXT3,
79 DMX_PES_SUBTITLE3,
80 DMX_PES_PCR3,
81
82 DMX_PES_OTHER
83} dmx_pes_type_t;
84
85#define DMX_PES_AUDIO DMX_PES_AUDIO0
86#define DMX_PES_VIDEO DMX_PES_VIDEO0
87#define DMX_PES_TELETEXT DMX_PES_TELETEXT0
88#define DMX_PES_SUBTITLE DMX_PES_SUBTITLE0
89#define DMX_PES_PCR DMX_PES_PCR0
90
91
92typedef struct dmx_filter
93{
94 __u8 filter[DMX_FILTER_SIZE];
95 __u8 mask[DMX_FILTER_SIZE];
96 __u8 mode[DMX_FILTER_SIZE];
97} dmx_filter_t;
98
99
100struct dmx_sct_filter_params
101{
102 __u16 pid;
103 dmx_filter_t filter;
104 __u32 timeout;
105 __u32 flags;
106#define DMX_CHECK_CRC 1
107#define DMX_ONESHOT 2
108#define DMX_IMMEDIATE_START 4
109#define DMX_KERNEL_CLIENT 0x8000
110#ifdef CONFIG_AMLOGIC_DVB_COMPAT
111#define DMX_USE_SWFILTER 0x100
112#endif
113};
114
115#ifdef CONFIG_AMLOGIC_DVB_COMPAT
116
117enum dmx_input_source {
118 INPUT_DEMOD,
119 INPUT_LOCAL,
120 INPUT_LOCAL_SEC
121};
122
123enum dmx_hw_source {
124 HW_TS0,
125 HW_TS1,
126 HW_TS2,
127 HW_TS3,
128 HW_TS4,
129 HW_TS5,
130 HW_TS6,
131 HW_TS7,
132 HW_DMA0 = 16,
133 HW_DMA1,
134 HW_DMA2,
135 HW_DMA3,
136 HW_DMA4,
137 HW_DMA5,
138 HW_DMA6,
139 HW_DMA7
140};
141
142/**
143 * struct dmx_non_sec_es_header - non-sec Elementary Stream (ES) Header
144 *
145 * @pts_dts_flag:[1:0], 01:pts valid, 10:dts valid
146 * @pts: pts value
147 * @dts: dts value
148 * @len: data len
149 */
150struct dmx_non_sec_es_header {
151 __u8 pts_dts_flag;
152 __u64 pts;
153 __u64 dts;
154 __u32 len;
155};
156
157/**
158 * struct dmx_sec_es_data - sec Elementary Stream (ES)
159 *
160 * @pts_dts_flag:[1:0], 01:pts valid, 10:dts valid
161 * @pts: pts value
162 * @dts: dts value
163 * @buf_start: buf start addr
164 * @buf_end: buf end addr
165 * @data_start: data start addr
166 * @data_end: data end addr
167 */
168struct dmx_sec_es_data {
169 __u8 pts_dts_flag;
170 __u64 pts;
171 __u64 dts;
172 __u32 buf_start;
173 __u32 buf_end;
174 __u32 data_start;
175 __u32 data_end;
176};
177
178enum dmx_audio_format {
179 AUDIO_UNKNOWN = 0, /* unknown media */
180 AUDIO_MPX = 1, /* mpeg audio MP2/MP3 */
181 AUDIO_AC3 = 2, /* Dolby AC3/EAC3 */
182 AUDIO_AAC_ADTS = 3, /* AAC-ADTS */
183 AUDIO_AAC_LOAS = 4, /* AAC-LOAS */
184 AUDIO_DTS = 5, /* DTS */
185 AUDIO_MAX
186};
187
188struct dmx_mem_info {
189 __u32 dmx_total_size;
190 __u32 dmx_buf_phy_start;
191 __u32 dmx_free_size;
192 __u32 dvb_core_total_size;
193 __u32 dvb_core_free_size;
194 __u32 wp_offset;
195};
196
197#endif
198
199/**
200 * struct dmx_pes_filter_params - Specifies Packetized Elementary Stream (PES)
201 * filter parameters.
202 *
203 * @pid: PID to be filtered.
204 * @input: Demux input, as specified by &enum dmx_input.
205 * @output: Demux output, as specified by &enum dmx_output.
206 * @pes_type: Type of the pes filter, as specified by &enum dmx_pes_type.
207 * @flags: Demux PES flags.
208 */
209struct dmx_pes_filter_params {
210 __u16 pid;
211 dmx_input_t input;
212 dmx_output_t output;
213 dmx_pes_type_t pes_type;
214 __u32 flags;
215#ifdef CONFIG_AMLOGIC_DVB_COMPAT
216/*bit 8~15 for mem sec_level*/
217#define DMX_MEM_SEC_LEVEL1 (1 << 10)
218#define DMX_MEM_SEC_LEVEL2 (1 << 11)
219#define DMX_MEM_SEC_LEVEL3 (1 << 12)
220
221/*bit 16~23 for output */
222#define DMX_ES_OUTPUT (1 << 16)
223/*set raw mode, it will send the struct dmx_sec_es_data, not es data*/
224#define DMX_OUTPUT_RAW_MODE (1 << 17)
225
226/*24~31 one byte for audio type, dmx_audio_format_t*/
227#define DMX_AUDIO_FORMAT_BIT 24
228
229#endif
230};
231
232typedef struct dmx_caps {
233 __u32 caps;
234 int num_decoders;
235} dmx_caps_t;
236
237typedef enum dmx_source {
238 DMX_SOURCE_FRONT0 = 0,
239 DMX_SOURCE_FRONT1,
240 DMX_SOURCE_FRONT2,
241 DMX_SOURCE_FRONT3,
242 DMX_SOURCE_DVR0 = 16,
243 DMX_SOURCE_DVR1,
244 DMX_SOURCE_DVR2,
245 DMX_SOURCE_DVR3,
246
247#ifdef CONFIG_AMLOGIC_DVB_COMPAT
248 DMX_SOURCE_FRONT0_OFFSET = 100,
249 DMX_SOURCE_FRONT1_OFFSET,
250 DMX_SOURCE_FRONT2_OFFSET
251#endif
252} dmx_source_t;
253
254struct dmx_stc {
255 unsigned int num; /* input : which STC? 0..N */
256 unsigned int base; /* output: divisor for stc to get 90 kHz clock */
257 __u64 stc; /* output: stc in 'base'*90 kHz units */
258};
259
260#define DMX_START _IO('o', 41)
261#define DMX_STOP _IO('o', 42)
262#define DMX_SET_FILTER _IOW('o', 43, struct dmx_sct_filter_params)
263#define DMX_SET_PES_FILTER _IOW('o', 44, struct dmx_pes_filter_params)
264#define DMX_SET_BUFFER_SIZE _IO('o', 45)
265#define DMX_GET_PES_PIDS _IOR('o', 47, __u16[5])
266#define DMX_GET_CAPS _IOR('o', 48, dmx_caps_t)
267#define DMX_SET_SOURCE _IOW('o', 49, dmx_source_t)
268#define DMX_GET_STC _IOWR('o', 50, struct dmx_stc)
269#define DMX_ADD_PID _IOW('o', 51, __u16)
270#define DMX_REMOVE_PID _IOW('o', 52, __u16)
271#ifdef CONFIG_AMLOGIC_DVB_COMPAT
272#define DMX_SET_INPUT _IO('o', 80)
273#define DMX_GET_MEM_INFO _IOR('o', 81, struct dmx_mem_info)
274/*dmx_hw_source.
275 * if use demod, HW_TSX
276 * if non-demod, HW_DMAX
277 */
278#define DMX_SET_HW_SOURCE _IO('o', 82)
279#endif
280
281#endif /* _UAPI_DVBDMX_H_ */