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Chuanzhi Wang670fc042020-08-12 11:11:04 +08001/*
2 * dmx.h
3 *
4 * Copyright (C) 2000 Marcus Metzler <marcus@convergence.de>
5 * & Ralph Metzler <ralph@convergence.de>
6 * for convergence integrated media GmbH
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public License
10 * as published by the Free Software Foundation; either version 2.1
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 *
22 */
23
24#ifndef _UAPI_DVBDMX_H_
25#define _UAPI_DVBDMX_H_
26
27#include <linux/types.h>
28#include <asm/ioctl.h>
29#ifndef __KERNEL__
30#include <time.h>
31#endif
32
33#define CONFIG_AMLOGIC_DVB_COMPAT
34#define DMX_FILTER_SIZE 16
35
36enum dmx_output
37{
38 DMX_OUT_DECODER, /* Streaming directly to decoder. */
39 DMX_OUT_TAP, /* Output going to a memory buffer */
40 /* (to be retrieved via the read command).*/
41 DMX_OUT_TS_TAP, /* Output multiplexed into a new TS */
42 /* (to be retrieved by reading from the */
43 /* logical DVR device). */
44 DMX_OUT_TSDEMUX_TAP /* Like TS_TAP but retrieved from the DMX device */
45};
46
47typedef enum dmx_output dmx_output_t;
48
49typedef enum dmx_input
50{
51 DMX_IN_FRONTEND, /* Input from a front-end device. */
52 DMX_IN_DVR /* Input from the logical DVR device. */
53} dmx_input_t;
54
55
56typedef enum dmx_ts_pes
57{
58 DMX_PES_AUDIO0,
59 DMX_PES_VIDEO0,
60 DMX_PES_TELETEXT0,
61 DMX_PES_SUBTITLE0,
62 DMX_PES_PCR0,
63
64 DMX_PES_AUDIO1,
65 DMX_PES_VIDEO1,
66 DMX_PES_TELETEXT1,
67 DMX_PES_SUBTITLE1,
68 DMX_PES_PCR1,
69
70 DMX_PES_AUDIO2,
71 DMX_PES_VIDEO2,
72 DMX_PES_TELETEXT2,
73 DMX_PES_SUBTITLE2,
74 DMX_PES_PCR2,
75
76 DMX_PES_AUDIO3,
77 DMX_PES_VIDEO3,
78 DMX_PES_TELETEXT3,
79 DMX_PES_SUBTITLE3,
80 DMX_PES_PCR3,
81
82 DMX_PES_OTHER
83} dmx_pes_type_t;
84
85#define DMX_PES_AUDIO DMX_PES_AUDIO0
86#define DMX_PES_VIDEO DMX_PES_VIDEO0
87#define DMX_PES_TELETEXT DMX_PES_TELETEXT0
88#define DMX_PES_SUBTITLE DMX_PES_SUBTITLE0
89#define DMX_PES_PCR DMX_PES_PCR0
90
91
92typedef struct dmx_filter
93{
94 __u8 filter[DMX_FILTER_SIZE];
95 __u8 mask[DMX_FILTER_SIZE];
96 __u8 mode[DMX_FILTER_SIZE];
97} dmx_filter_t;
98
99
100struct dmx_sct_filter_params
101{
102 __u16 pid;
103 dmx_filter_t filter;
104 __u32 timeout;
105 __u32 flags;
106#define DMX_CHECK_CRC 1
107#define DMX_ONESHOT 2
108#define DMX_IMMEDIATE_START 4
109#define DMX_KERNEL_CLIENT 0x8000
110#ifdef CONFIG_AMLOGIC_DVB_COMPAT
111#define DMX_USE_SWFILTER 0x100
112#endif
113};
114
115#ifdef CONFIG_AMLOGIC_DVB_COMPAT
116
117enum dmx_input_source {
118 INPUT_DEMOD,
119 INPUT_LOCAL,
120 INPUT_LOCAL_SEC
121};
122
123/**
124 * struct dmx_non_sec_es_header - non-sec Elementary Stream (ES) Header
125 *
126 * @pts_dts_flag:[1:0], 01:pts valid, 10:dts valid
127 * @pts: pts value
128 * @dts: dts value
129 * @len: data len
130 */
131struct dmx_non_sec_es_header {
132 __u8 pts_dts_flag;
133 __u64 pts;
134 __u64 dts;
135 __u32 len;
136};
137
138/**
139 * struct dmx_sec_es_data - sec Elementary Stream (ES)
140 *
141 * @pts_dts_flag:[1:0], 01:pts valid, 10:dts valid
142 * @pts: pts value
143 * @dts: dts value
144 * @buf_start: buf start addr
145 * @buf_end: buf end addr
146 * @data_start: data start addr
147 * @data_end: data end addr
148 */
149struct dmx_sec_es_data {
150 __u8 pts_dts_flag;
151 __u64 pts;
152 __u64 dts;
153 __u32 buf_start;
154 __u32 buf_end;
155 __u32 data_start;
156 __u32 data_end;
157};
158
hualing chenf9867402020-09-23 17:06:20 +0800159struct dmx_sec_ts_data {
160 __u32 buf_start;
161 __u32 buf_end;
162 __u32 data_start;
163 __u32 data_end;
164};
165
Chuanzhi Wang670fc042020-08-12 11:11:04 +0800166enum dmx_audio_format {
167 AUDIO_UNKNOWN = 0, /* unknown media */
168 AUDIO_MPX = 1, /* mpeg audio MP2/MP3 */
169 AUDIO_AC3 = 2, /* Dolby AC3/EAC3 */
170 AUDIO_AAC_ADTS = 3, /* AAC-ADTS */
171 AUDIO_AAC_LOAS = 4, /* AAC-LOAS */
172 AUDIO_DTS = 5, /* DTS */
173 AUDIO_MAX
174};
175
176struct dmx_mem_info {
177 __u32 dmx_total_size;
178 __u32 dmx_buf_phy_start;
179 __u32 dmx_free_size;
180 __u32 dvb_core_total_size;
181 __u32 dvb_core_free_size;
182 __u32 wp_offset;
183};
184
hualing chenf9867402020-09-23 17:06:20 +0800185struct dmx_sec_mem {
186 __u32 buff;
187 __u32 size;
188};
Chuanzhi Wang670fc042020-08-12 11:11:04 +0800189#endif
190
191/**
192 * struct dmx_pes_filter_params - Specifies Packetized Elementary Stream (PES)
193 * filter parameters.
194 *
195 * @pid: PID to be filtered.
196 * @input: Demux input, as specified by &enum dmx_input.
197 * @output: Demux output, as specified by &enum dmx_output.
198 * @pes_type: Type of the pes filter, as specified by &enum dmx_pes_type.
199 * @flags: Demux PES flags.
200 */
201struct dmx_pes_filter_params {
202 __u16 pid;
203 dmx_input_t input;
204 dmx_output_t output;
205 dmx_pes_type_t pes_type;
206 __u32 flags;
207#ifdef CONFIG_AMLOGIC_DVB_COMPAT
208/*bit 8~15 for mem sec_level*/
209#define DMX_MEM_SEC_LEVEL1 (1 << 10)
210#define DMX_MEM_SEC_LEVEL2 (1 << 11)
211#define DMX_MEM_SEC_LEVEL3 (1 << 12)
212
213/*bit 16~23 for output */
214#define DMX_ES_OUTPUT (1 << 16)
215/*set raw mode, it will send the struct dmx_sec_es_data, not es data*/
216#define DMX_OUTPUT_RAW_MODE (1 << 17)
217
218/*24~31 one byte for audio type, dmx_audio_format_t*/
219#define DMX_AUDIO_FORMAT_BIT 24
220
221#endif
222};
223
224typedef struct dmx_caps {
225 __u32 caps;
226 int num_decoders;
227} dmx_caps_t;
228
229typedef enum dmx_source {
230 DMX_SOURCE_FRONT0 = 0,
231 DMX_SOURCE_FRONT1,
232 DMX_SOURCE_FRONT2,
233 DMX_SOURCE_FRONT3,
234 DMX_SOURCE_DVR0 = 16,
235 DMX_SOURCE_DVR1,
236 DMX_SOURCE_DVR2,
237 DMX_SOURCE_DVR3,
238
239#ifdef CONFIG_AMLOGIC_DVB_COMPAT
240 DMX_SOURCE_FRONT0_OFFSET = 100,
241 DMX_SOURCE_FRONT1_OFFSET,
242 DMX_SOURCE_FRONT2_OFFSET
243#endif
244} dmx_source_t;
245
246struct dmx_stc {
247 unsigned int num; /* input : which STC? 0..N */
248 unsigned int base; /* output: divisor for stc to get 90 kHz clock */
249 __u64 stc; /* output: stc in 'base'*90 kHz units */
250};
251
252#ifdef CONFIG_AMLOGIC_DVB_COMPAT
253enum {
254 DMA_0 = 0,
255 DMA_1,
256 DMA_2,
257 DMA_3,
258 DMA_4,
259 DMA_5,
260 DMA_6,
261 DMA_7,
262 FRONTEND_TS0 = 32,
263 FRONTEND_TS1,
264 FRONTEND_TS2,
265 FRONTEND_TS3,
266 FRONTEND_TS4,
267 FRONTEND_TS5,
268 FRONTEND_TS6,
269 FRONTEND_TS7,
270};
271#endif
272
273#define DMX_START _IO('o', 41)
274#define DMX_STOP _IO('o', 42)
275#define DMX_SET_FILTER _IOW('o', 43, struct dmx_sct_filter_params)
276#define DMX_SET_PES_FILTER _IOW('o', 44, struct dmx_pes_filter_params)
277#define DMX_SET_BUFFER_SIZE _IO('o', 45)
278#define DMX_GET_PES_PIDS _IOR('o', 47, __u16[5])
279#define DMX_GET_CAPS _IOR('o', 48, dmx_caps_t)
280#define DMX_SET_SOURCE _IOW('o', 49, dmx_source_t)
281#define DMX_GET_STC _IOWR('o', 50, struct dmx_stc)
282#define DMX_ADD_PID _IOW('o', 51, __u16)
283#define DMX_REMOVE_PID _IOW('o', 52, __u16)
284#ifdef CONFIG_AMLOGIC_DVB_COMPAT
285#define DMX_SET_INPUT _IO('o', 80)
286#define DMX_GET_MEM_INFO _IOR('o', 81, struct dmx_mem_info)
287#define DMX_SET_HW_SOURCE _IO('o', 82)
288#define DMX_GET_HW_SOURCE _IOR('o', 83, int)
hualing chenf9867402020-09-23 17:06:20 +0800289#define DMX_GET_FILTER_MEM_INFO _IOR('o', 84, struct dmx_filter_mem_info)
290/*just for dvr sec mem, please call before DMX_SET_PES_FILTER*/
291#define DMX_SET_SEC_MEM _IOW('o', 85, struct dmx_sec_mem)
Chuanzhi Wang670fc042020-08-12 11:11:04 +0800292#endif
293
294#endif /* _UAPI_DVBDMX_H_ */