blob: ba575957b0038ffffda5a248712f1acd47dde0e1 [file] [log] [blame]
limin.tian20df7d42023-02-10 10:05:52 +08001/*
2 * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
3 *
4 * This source code is subject to the terms and conditions defined in the
5 * file 'LICENSE' which is part of this source code package.
6 *
7 * Description:
8 */
limin.tian20df7d42023-02-10 10:05:52 +08009#ifndef MESON_DRM_SETTINGS_H_
10#define MESON_DRM_SETTINGS_H_
11#include <stdio.h>
12#include <stdint.h>
13#include <stdlib.h>
14#include <unistd.h>
15#include <stdbool.h>
16#include <xf86drmMode.h>
17#if defined(__cplusplus)
18extern "C" {
19#endif
20#define DRM_DISPLAY_MODE_LEN 32
21
chen.wang133a5c832023-07-12 04:23:36 +000022struct video_zpos {
23 unsigned int index;//<--Representing video index Index 0 corresponds to modifying video 0;Index 1 corresponds to modifying video 1-->//
24 unsigned int zpos; //<--Represents the zorder value set-->//
25 unsigned int flag; //<-- Make the settings effective Set flag equal to 1 to indicate effectiveness-->//
26};
27
chen.wang154f11d52023-04-14 07:56:49 +000028typedef enum _MESON_CONTENT_TYPE {
29 MESON_CONTENT_TYPE_Data = 0,
30 MESON_CONTENT_TYPE_Graphics,
31 MESON_CONTENT_TYPE_Photo,
32 MESON_CONTENT_TYPE_Cinema,
33 MESON_CONTENT_TYPE_Game,
34 MESON_CONTENT_TYPE_RESERVED
35} MESON_CONTENT_TYPE;
36
37/*HDCP transmission time divided into Type0&Type1 content*/
38typedef enum _ENUM_MESON_HDCP_Content_Type{
39 MESON_HDCP_Type0 = 0, //Type0 represents support for both 1.4 and 2.2
40 MESON_HDCP_Type1, //Type1 represents only support for 2.2
41 MESON_HDCP_Type_RESERVED
42} ENUM_MESON_HDCP_Content_Type;
43
limin.tian20df7d42023-02-10 10:05:52 +080044typedef enum {
45 MESON_DISCONNECTED = 0,
46 MESON_CONNECTED = 1,
47 MESON_UNKNOWNCONNECTION = 2
48} ENUM_MESON_CONN_CONNECTION;
49
50typedef struct _DisplayMode {
chen.wang154f11d52023-04-14 07:56:49 +000051 uint16_t w; //<--Number of horizontal pixels in the effective display area-->//
52 uint16_t h; //<--Number of vertical pixels in the effective display area-->//
53 uint32_t vrefresh; //<--Display refresh rate--->//
54 bool interlace; //<--Indicates which scanning form to choose, P represents progressive scanning, and i represents interlaced scanning; The default interlace value is 0 for P 1 for i-->//
limin.tian20df7d42023-02-10 10:05:52 +080055 char name[DRM_DISPLAY_MODE_LEN];
56} DisplayMode;
57
58typedef enum _ENUM_MESON_HDR_MODE {
59 MESON_HDR10PLUS = 0,
60 MESON_DOLBYVISION_STD,
61 MESON_DOLBYVISION_LL,
62 MESON_HDR10_ST2084,
63 MESON_HDR10_TRADITIONAL,
64 MESON_HDR_HLG,
65 MESON_SDR
66} ENUM_MESON_HDR_MODE;
67
68typedef enum _ENUM_MESON_CONNECTOR_TYPE {
chen.wang1a175cb02023-08-10 08:39:05 +000069 MESON_CONNECTOR_HDMIA = 0,
limin.tian20df7d42023-02-10 10:05:52 +080070 MESON_CONNECTOR_HDMIB,
71 MESON_CONNECTOR_LVDS,
72 MESON_CONNECTOR_CVBS,
chen.wang1a175cb02023-08-10 08:39:05 +000073 MESON_CONNECTOR_DUMMY,
limin.tian20df7d42023-02-10 10:05:52 +080074 MESON_CONNECTOR_RESERVED
75} MESON_CONNECTOR_TYPE;
76
77typedef enum _ENUM_MESON_COLOR_SPACE {
78 MESON_COLOR_SPACE_RGB = 0,
79 MESON_COLOR_SPACE_YCBCR422,
80 MESON_COLOR_SPACE_YCBCR444,
81 MESON_COLOR_SPACE_YCBCR420,
82 MESON_COLOR_SPACE_RESERVED
83} ENUM_MESON_COLOR_SPACE;
84
85typedef enum _ENUM_MESON_HDCP_VERSION {
86 MESON_HDCP_14 = 0,
87 MESON_HDCP_22,
88 MESON_HDCP_RESERVED
89} ENUM_MESON_HDCP_VERSION;
90
91typedef enum _ENUM_MESON_HDR_POLICY {
92 MESON_HDR_POLICY_FOLLOW_SINK = 0,
93 MESON_HDR_POLICY_FOLLOW_SOURCE
94} ENUM_MESON_HDR_POLICY;
95
limin.tianfe2ab442023-03-06 08:40:15 +000096typedef enum _ENUM_MESON_HDCP_AUTH_STATUS {
97 MESON_AUTH_STATUS_FAIL = 0,
98 MESON_AUTH_STATUS_SUCCESS
99} ENUM_MESON_HDCPAUTH_STATUS;
100
chen.wang154f11d52023-04-14 07:56:49 +0000101int meson_drm_setContentType(int drmFd, drmModeAtomicReq *req,
102 MESON_CONTENT_TYPE contentType, MESON_CONNECTOR_TYPE connType);
103
104int meson_drm_setVrrEnabled(int drmFd, drmModeAtomicReq *req,
105 uint32_t VrrEnable, MESON_CONNECTOR_TYPE connType);
106int meson_drm_getVrrEnabled( int drmFd, MESON_CONNECTOR_TYPE connType );
107
108
109int meson_drm_getActive( int drmFd, MESON_CONNECTOR_TYPE connType );
110
111int meson_drm_setActive(int drmFd, drmModeAtomicReq *req,
112 uint32_t active, MESON_CONNECTOR_TYPE connType);
113
114int meson_drm_getDvEnable( int drmFd, MESON_CONNECTOR_TYPE connType );
115int meson_drm_setDvEnable(int drmFd, drmModeAtomicReq *req,
116 uint32_t dvEnable, MESON_CONNECTOR_TYPE connType);
117
118MESON_CONTENT_TYPE meson_drm_getContentType(int drmFd, MESON_CONNECTOR_TYPE connType );
119
120
limin.tian20df7d42023-02-10 10:05:52 +0800121int meson_drm_changeMode(int drmFd, drmModeAtomicReq *req,
122 DisplayMode* modeInfo, MESON_CONNECTOR_TYPE connType);
123int meson_drm_getModeInfo(int drmFd, MESON_CONNECTOR_TYPE connType, DisplayMode* mode );
124
125ENUM_MESON_CONN_CONNECTION meson_drm_getConnectionStatus(int drmFd, MESON_CONNECTOR_TYPE connType);
126ENUM_MESON_HDR_MODE meson_drm_getHdrStatus(int drmFd, MESON_CONNECTOR_TYPE connType );
127ENUM_MESON_HDCP_VERSION meson_drm_getHdcpVersion(int drmFd, MESON_CONNECTOR_TYPE connType );
128ENUM_MESON_COLOR_SPACE meson_drm_getColorSpace(int drmFd, MESON_CONNECTOR_TYPE connType );
129int meson_drm_setColorSpace(int drmFd, drmModeAtomicReq *req,
130 ENUM_MESON_COLOR_SPACE colorSpace, MESON_CONNECTOR_TYPE connType);
131
132uint32_t meson_drm_getColorDepth(int drmFd, MESON_CONNECTOR_TYPE connType );
133int meson_drm_setColorDepth(int drmFd, drmModeAtomicReq *req,
134 uint32_t colorDepth, MESON_CONNECTOR_TYPE connType);
135
136ENUM_MESON_HDR_POLICY meson_drm_getHDRPolicy(int drmFd, MESON_CONNECTOR_TYPE connType );
137int meson_drm_setHDRPolicy(int drmFd, drmModeAtomicReq *req,
138 ENUM_MESON_HDR_POLICY hdrPolicy, MESON_CONNECTOR_TYPE connType);
139
limin.tianfe2ab442023-03-06 08:40:15 +0000140
141void meson_drm_getEDIDData(int drmFd, MESON_CONNECTOR_TYPE connType, int * data_Len, char **data );
142int meson_drm_setAVMute(int drmFd, drmModeAtomicReq *req,
143 bool mute, MESON_CONNECTOR_TYPE connType);
chen.wang154f11d52023-04-14 07:56:49 +0000144int meson_drm_getAVMute( int drmFd, MESON_CONNECTOR_TYPE connType );
145
limin.tianfe2ab442023-03-06 08:40:15 +0000146ENUM_MESON_HDCPAUTH_STATUS meson_drm_getHdcpAuthStatus( int drmFd, MESON_CONNECTOR_TYPE connType );
147int meson_drm_setHDCPEnable(int drmFd, drmModeAtomicReq *req,
148 bool enable, MESON_CONNECTOR_TYPE connType);
149
chen.wang13c3450e2023-08-01 11:07:11 +0000150int meson_drm_getsupportedModesList(int drmFd, DisplayMode** modeInfo, int* modeCount ,MESON_CONNECTOR_TYPE connType);
151int meson_drm_getPreferredMode( DisplayMode* mode, MESON_CONNECTOR_TYPE connType);
chen.wang154f11d52023-04-14 07:56:49 +0000152
153int meson_drm_setHDCPContentType(int drmFd, drmModeAtomicReq *req,
154 ENUM_MESON_HDCP_Content_Type HDCPType, MESON_CONNECTOR_TYPE connType);
155ENUM_MESON_HDCP_Content_Type meson_drm_getHDCPContentType( int drmFd, MESON_CONNECTOR_TYPE connType );
156
157int meson_drm_getHdcpVer( int drmFd, MESON_CONNECTOR_TYPE connType );
158
159int meson_drm_getHdrCap( int drmFd, MESON_CONNECTOR_TYPE connType );
160int meson_drm_getDvCap( int drmFd, MESON_CONNECTOR_TYPE connType );
chen.wang133a5c832023-07-12 04:23:36 +0000161int meson_drm_setVideoZorder(int drmFd, unsigned int index, unsigned int zorder, unsigned int flag);
linfang.zhao374dbdb2023-11-03 07:59:47 +0000162int meson_drm_setPlaneMute(int drmFd, unsigned int plane_type, unsigned int plane_mute);
chen.wang154f11d52023-04-14 07:56:49 +0000163
limin.tian20df7d42023-02-10 10:05:52 +0800164int meson_open_drm();
165void meson_close_drm(int drmFd);
166
167#if defined(__cplusplus)
168}
169#endif
170
171#endif