blob: 294483054c592bef268f26c07260ea3ab695c65e [file] [log] [blame]
yang.li5bef2f62022-01-11 14:08:06 +08001/*
2 * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
Xiaohu.Huangbe565062021-10-15 17:29:19 +08007#include <stdint.h>
8#include <stdio.h>
9#include <unistd.h>
10#include "riscv_encoding.h"
xiaohu.huange7678d12022-05-10 00:56:48 +080011#include "gcc_compiler_attributes.h"
Xiaohu.Huangbe565062021-10-15 17:29:19 +080012#include "n200_func.h"
13
xiaohu.huange7678d12022-05-10 00:56:48 +080014__weak uintptr_t handle_nmi(void)
Xiaohu.Huangbe565062021-10-15 17:29:19 +080015{
xiaohu.huange7678d12022-05-10 00:56:48 +080016 printf("\nhandle_nmi");
Xiaohu.Huangbe565062021-10-15 17:29:19 +080017
xiaohu.huange7678d12022-05-10 00:56:48 +080018 while (1)
19 ;
Xiaohu.Huangbe565062021-10-15 17:29:19 +080020
xiaohu.huange7678d12022-05-10 00:56:48 +080021 return 0;
Xiaohu.Huangbe565062021-10-15 17:29:19 +080022}
23
xiaohu.huange7678d12022-05-10 00:56:48 +080024__weak uintptr_t handle_trap(uintptr_t mcause, uintptr_t sp)
Xiaohu.Huangbe565062021-10-15 17:29:19 +080025{
xiaohu.huange7678d12022-05-10 00:56:48 +080026 (void)sp;
Xiaohu.Huangbe565062021-10-15 17:29:19 +080027
xiaohu.huange7678d12022-05-10 00:56:48 +080028 if ((mcause & 0xFFF) == 0xFFF)
29 handle_nmi();
30 //write(1, "trap\n", 5);
31 printf("In trap handler, the mcause is %d\n", mcause);
32 printf("In trap handler, the mepc is 0x%lx\n", read_csr(mepc));
33 printf("In trap handler, the mtval is 0x%lx\n", read_csr(mbadaddr));
34 //_exit(mcause);
35 printf("\nhandle_trap");
36
37 while (1)
38 ;
39
40 return 0;
Xiaohu.Huangbe565062021-10-15 17:29:19 +080041}
42
Xiaohu.Huang04248812022-01-17 10:44:18 +080043#ifdef CONFIG_N200_REVA
xiaohu.huange7678d12022-05-10 00:56:48 +080044__weak uint32_t handle_irq(uint32_t int_num)
45{
46 // Enable interrupts to allow interrupt preempt based on priority
47 //set_csr(mstatus, MSTATUS_MIE);
Xiaohu.Huangbe565062021-10-15 17:29:19 +080048
xiaohu.huange7678d12022-05-10 00:56:48 +080049 pic_interrupt_handlers[int_num]();
bangzheng.liu4b6c5572022-09-26 17:06:01 +080050 /* Since it will complete in the assembly instructions, it is redundant in this place. */
51 //pic_complete_interrupt(int_num);
xiaohu.huange7678d12022-05-10 00:56:48 +080052 // Disable interrupts
53 //clear_csr(mstatus, MSTATUS_MIE);
54 return int_num;
Xiaohu.Huangbe565062021-10-15 17:29:19 +080055}
56#endif