yang.li | 5bef2f6 | 2022-01-11 14:08:06 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | */ |
| 6 | |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 7 | #include <stdint.h> |
| 8 | #include <stdio.h> |
| 9 | #include <unistd.h> |
| 10 | #include "riscv_encoding.h" |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 11 | #include "gcc_compiler_attributes.h" |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 12 | #include "n200_func.h" |
| 13 | |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 14 | __weak uintptr_t handle_nmi(void) |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 15 | { |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 16 | printf("\nhandle_nmi"); |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 17 | |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 18 | while (1) |
| 19 | ; |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 20 | |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 21 | return 0; |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 22 | } |
| 23 | |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 24 | __weak uintptr_t handle_trap(uintptr_t mcause, uintptr_t sp) |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 25 | { |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 26 | (void)sp; |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 27 | |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 28 | if ((mcause & 0xFFF) == 0xFFF) |
| 29 | handle_nmi(); |
| 30 | //write(1, "trap\n", 5); |
| 31 | printf("In trap handler, the mcause is %d\n", mcause); |
| 32 | printf("In trap handler, the mepc is 0x%lx\n", read_csr(mepc)); |
| 33 | printf("In trap handler, the mtval is 0x%lx\n", read_csr(mbadaddr)); |
| 34 | //_exit(mcause); |
| 35 | printf("\nhandle_trap"); |
| 36 | |
| 37 | while (1) |
| 38 | ; |
| 39 | |
| 40 | return 0; |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 41 | } |
| 42 | |
Xiaohu.Huang | 0424881 | 2022-01-17 10:44:18 +0800 | [diff] [blame] | 43 | #ifdef CONFIG_N200_REVA |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 44 | __weak uint32_t handle_irq(uint32_t int_num) |
| 45 | { |
| 46 | // Enable interrupts to allow interrupt preempt based on priority |
| 47 | //set_csr(mstatus, MSTATUS_MIE); |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 48 | |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 49 | pic_interrupt_handlers[int_num](); |
bangzheng.liu | 4b6c557 | 2022-09-26 17:06:01 +0800 | [diff] [blame] | 50 | /* Since it will complete in the assembly instructions, it is redundant in this place. */ |
| 51 | //pic_complete_interrupt(int_num); |
xiaohu.huang | e7678d1 | 2022-05-10 00:56:48 +0800 | [diff] [blame] | 52 | // Disable interrupts |
| 53 | //clear_csr(mstatus, MSTATUS_MIE); |
| 54 | return int_num; |
Xiaohu.Huang | be56506 | 2021-10-15 17:29:19 +0800 | [diff] [blame] | 55 | } |
| 56 | #endif |