Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 1 | /* |
yang.li | 2477037 | 2022-01-11 15:21:49 +0800 | [diff] [blame] | 2 | * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved. |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 3 | * |
yang.li | 2477037 | 2022-01-11 15:21:49 +0800 | [diff] [blame] | 4 | * SPDX-License-Identifier: MIT |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include "bd71837.h" |
| 8 | #include "meson_i2c.h" |
| 9 | #include "uart.h" |
| 10 | #include "myprintf.h" |
| 11 | #include "gpio.h" |
| 12 | |
| 13 | static const struct regulator_linear_range bd718xx_dvs_buck_volts[] = { |
| 14 | REGULATOR_LINEAR_RANGE(700000, 0x00, 0x3C, 10000), |
| 15 | REGULATOR_LINEAR_RANGE(1300000, 0x3D, 0x3F, 0), |
| 16 | }; |
| 17 | |
| 18 | static const struct regulator_linear_range bd71837_buck5_volts[] = { |
| 19 | /* Ranges when VOLT_SEL bit is 0 */ |
| 20 | REGULATOR_LINEAR_RANGE(700000, 0x00, 0x03, 100000), |
| 21 | REGULATOR_LINEAR_RANGE(1050000, 0x04, 0x05, 50000), |
| 22 | REGULATOR_LINEAR_RANGE(1200000, 0x06, 0x07, 150000), |
| 23 | }; |
| 24 | |
| 25 | static const struct regulator_linear_range bd71837_buck6_volts[] = { |
| 26 | REGULATOR_LINEAR_RANGE(3000000, 0x00, 0x03, 100000), |
| 27 | }; |
| 28 | |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 29 | static const unsigned int bd71837_buck7_volts[] = { 1605000, 1695000, 1755000, 1800000, |
| 30 | 1845000, 1905000, 1950000, 1995000 }; |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 31 | |
| 32 | static const struct regulator_linear_range bd71837_buck8_volts[] = { |
| 33 | REGULATOR_LINEAR_RANGE(680000, 0x00, 0x3C, 11500), |
| 34 | REGULATOR_LINEAR_RANGE(1370000, 0x3C, 0x3F, 0), |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 35 | }; |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 36 | |
| 37 | static const struct regulator_linear_range bd718xx_ldo1_volts[] = { |
| 38 | REGULATOR_LINEAR_RANGE(1600000, 0x00, 0x03, 100000), |
| 39 | }; |
| 40 | |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 41 | static const unsigned int ldo_2_volts[] = { 900000, 800000 }; |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 42 | |
| 43 | static const struct regulator_linear_range bd718xx_ldo3_volts[] = { |
| 44 | REGULATOR_LINEAR_RANGE(1800000, 0x00, 0x0F, 100000), |
| 45 | }; |
| 46 | |
| 47 | static const struct regulator_linear_range bd718xx_ldo4_volts[] = { |
| 48 | REGULATOR_LINEAR_RANGE(900000, 0x00, 0x09, 100000), |
| 49 | REGULATOR_LINEAR_RANGE(1800000, 0xa, 0xf, 0), |
| 50 | }; |
| 51 | |
| 52 | static const struct regulator_linear_range bd71837_ldo5_volts[] = { |
| 53 | REGULATOR_LINEAR_RANGE(1800000, 0x00, 0x0F, 100000), |
| 54 | }; |
| 55 | |
| 56 | static const struct regulator_linear_range bd718xx_ldo6_volts[] = { |
| 57 | REGULATOR_LINEAR_RANGE(900000, 0x00, 0x09, 100000), |
| 58 | REGULATOR_LINEAR_RANGE(1800000, 0xA, 0xF, 0), |
| 59 | }; |
| 60 | |
| 61 | static const struct regulator_linear_range bd71837_ldo7_volts[] = { |
| 62 | REGULATOR_LINEAR_RANGE(1800000, 0x00, 0x0F, 100000), |
| 63 | }; |
| 64 | |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 65 | static int find_index(const unsigned int *p, unsigned int len, unsigned int sel) |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 66 | { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 67 | for (unsigned int i = 0; i < len; i++) { |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 68 | if (sel == p[i]) |
| 69 | return i; |
| 70 | } |
| 71 | return -1; |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 72 | } |
| 73 | |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 74 | static int find_index_struct(struct regulator_desc *rdev, unsigned int sel, int id) |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 75 | { |
| 76 | int b = 0; |
| 77 | unsigned int min_sel1 = 0; |
| 78 | unsigned int step = 0; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 79 | |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 80 | min_sel1 = (rdev->linear_ranges)[id].min_sel; |
| 81 | step = (rdev->linear_ranges)[id].uV_step; |
| 82 | b = sel - (rdev->linear_ranges)[id].min_uV; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 83 | b = b / step; |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 84 | b = min_sel1 + b; |
| 85 | return b; |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 86 | } |
| 87 | |
| 88 | static void set_pmic_bd71837_pinmux(struct pmic_i2c *bd71837_i2c_config1) |
| 89 | { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 90 | // set pinmux |
| 91 | iprintf("set %s pinmux\n", bd71837_i2c_config1->name); |
| 92 | xPinmuxSet(bd71837_i2c_config1->scl, bd71837_i2c_config1->scl_value); |
| 93 | xPinmuxSet(bd71837_i2c_config1->sda, bd71837_i2c_config1->sda_value); |
| 94 | //set ds and pull up |
| 95 | xPinconfSet(bd71837_i2c_config1->scl, |
| 96 | PINF_CONFIG_BIAS_PULL_UP | PINF_CONFIG_DRV_STRENGTH_3); |
| 97 | xPinconfSet(bd71837_i2c_config1->sda, |
| 98 | PINF_CONFIG_BIAS_PULL_UP | PINF_CONFIG_DRV_STRENGTH_3); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 99 | } |
| 100 | |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 101 | static void BD71837_PMIC_I2C_INIT(struct pmic_i2c *bd71837_i2c_config) |
| 102 | { |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 103 | set_pmic_bd71837_pinmux(bd71837_i2c_config); |
| 104 | xI2cMesonPortInit(bd71837_i2c_config->port); |
| 105 | } |
| 106 | |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 107 | static int bd71837_regulator_ctrl(struct regulator_desc *rdev, int status) |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 108 | { |
| 109 | int ret = 0; |
| 110 | unsigned char ctrl_reg = 0x0; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 111 | |
| 112 | if ((rdev->id) <= 7) { |
| 113 | ret = xI2cMesonRead(bd718x7_slave_address, rdev->enable_reg, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 114 | if (ret < 0) { |
| 115 | printf("i2c buck read failed\n"); |
| 116 | return ret; |
| 117 | } |
| 118 | ctrl_reg &= (~(rdev->enable_mask)); |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 119 | if (status) |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 120 | ctrl_reg |= rdev->enable_val; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 121 | else |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 122 | ctrl_reg |= rdev->disable_val; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 123 | ret = xI2cMesonWrite(bd718x7_slave_address, rdev->enable_reg, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 124 | if (ret < 0) { |
| 125 | printf("i2c buck write failed\n"); |
| 126 | return ret; |
| 127 | } |
| 128 | |
| 129 | } else { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 130 | ret = xI2cMesonRead(bd718x7_slave_address, rdev->ldo_reg, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 131 | if (ret < 0) { |
| 132 | printf("i2c ldo read failed\n"); |
| 133 | return ret; |
| 134 | } |
| 135 | ctrl_reg &= (~(rdev->ldo_mask_ctrl)); |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 136 | if (status) |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 137 | ctrl_reg |= rdev->ldo_val_ctrl; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 138 | else |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 139 | ctrl_reg |= rdev->ldo_val_ctrl_disable; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 140 | ret = xI2cMesonWrite(bd718x7_slave_address, rdev->ldo_reg, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 141 | if (ret < 0) { |
| 142 | printf("i2c ldo write failed\n"); |
| 143 | return ret; |
| 144 | } |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 145 | } |
| 146 | return ret; |
| 147 | } |
| 148 | |
| 149 | static int bd71837_regulator_set_voltage(struct regulator_desc *rdev, unsigned int sel) |
| 150 | { |
| 151 | int a = 0; |
| 152 | int ret = 0; |
| 153 | unsigned char ctrl_reg = 0; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 154 | |
| 155 | if ((rdev->id) <= 3) { /* buck1-4 */ |
| 156 | if (sel <= 1290000) |
| 157 | a = find_index_struct(rdev, sel, 0); |
| 158 | else |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 159 | a = (rdev->linear_ranges)[1].min_sel; |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 160 | } /* buck5 */ |
| 161 | if ((rdev->id) == 4) { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 162 | if (sel <= 1000000) |
| 163 | a = find_index_struct(rdev, sel, 0); |
| 164 | else if (1050000 <= sel && sel <= 1100000) |
| 165 | a = find_index_struct(rdev, sel, 1); |
| 166 | else |
| 167 | a = find_index_struct(rdev, sel, 2); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 168 | } /* buck6 */ |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 169 | if ((rdev->id) == 5) |
| 170 | a = find_index_struct(rdev, sel, 0); /*buck7 */ |
| 171 | if ((rdev->id) == 6) |
| 172 | a = find_index(rdev->volt_table, rdev->n_voltages, sel); /*buck8*/ |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 173 | if ((rdev->id) == 7) { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 174 | if (sel <= 1358500) |
| 175 | a = find_index_struct(rdev, sel, 0); |
| 176 | else |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 177 | a = (rdev->linear_ranges)[1].min_sel; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 178 | } /* ldo1 */ |
| 179 | if ((rdev->id) == 8) |
| 180 | a = find_index_struct(rdev, sel, 0); /* ldo2 */ |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 181 | if ((rdev->id) == 9) { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 182 | a = find_index(rdev->volt_table, rdev->n_voltages, sel); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 183 | a = a << 5; |
| 184 | } /* ldo3 */ |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 185 | if ((rdev->id) == 10) |
| 186 | a = find_index_struct(rdev, sel, 0); /* ldo4 */ |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 187 | if ((rdev->id) == 11) { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 188 | if (sel <= 1700000) |
| 189 | a = find_index_struct(rdev, sel, 0); |
| 190 | else |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 191 | a = (rdev->linear_ranges)[1].min_sel; |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 192 | } /* ldo5 */ |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 193 | if ((rdev->id) == 12) |
| 194 | a = find_index_struct(rdev, sel, 0); /* ldo6 */ |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 195 | if ((rdev->id) == 13) { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 196 | if (sel <= 1700000) |
| 197 | a = find_index_struct(rdev, sel, 0); |
| 198 | else |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 199 | a = (rdev->linear_ranges)[1].min_sel; |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 200 | } /* ldo7 */ |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 201 | if ((rdev->id) == 14) |
| 202 | a = find_index_struct(rdev, sel, 0); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 203 | if ((rdev->id) <= 7) { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 204 | ret = xI2cMesonRead(bd718x7_slave_address, rdev->vsel_reg, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 205 | if (ret < 0) { |
| 206 | printf("i2c buck read failed\n"); |
| 207 | return ret; |
| 208 | } |
| 209 | ctrl_reg &= (~(rdev->vsel_mask)); |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 210 | ctrl_reg |= (a << 0); |
| 211 | ret = xI2cMesonWrite(bd718x7_slave_address, rdev->vsel_reg, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 212 | if (ret < 0) { |
| 213 | printf("i2c buck write failed\n"); |
| 214 | return ret; |
| 215 | } |
| 216 | } |
| 217 | if ((rdev->id) > 7) { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 218 | ret = xI2cMesonRead(bd718x7_slave_address, rdev->ldo_reg, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 219 | if (ret < 0) { |
| 220 | printf("i2c ldo read failed\n"); |
| 221 | return ret; |
| 222 | } |
| 223 | ctrl_reg &= (~(rdev->ldo_out_mask)); |
| 224 | ctrl_reg |= a; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 225 | ret = xI2cMesonWrite(bd718x7_slave_address, rdev->ldo_reg, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 226 | if (ret < 0) { |
| 227 | printf("i2c ldo write failed\n"); |
| 228 | return ret; |
| 229 | } |
| 230 | } |
| 231 | |
| 232 | return ret; |
| 233 | } |
| 234 | |
| 235 | static void bd71837_osc_ctrl(int status) |
| 236 | { |
| 237 | unsigned char ctrl_reg = 0; |
| 238 | int ret = 0; |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 239 | |
| 240 | ret = xI2cMesonRead(bd718x7_slave_address, BD718XX_REG_OUT32K, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 241 | if (ret < 0) { |
| 242 | printf("i2c osc read failed\n"); |
| 243 | return; |
| 244 | } |
| 245 | if (status) { |
| 246 | ctrl_reg &= (~0x1); |
| 247 | ctrl_reg |= 0x1; |
| 248 | } else { |
| 249 | ctrl_reg &= (~0x1); |
| 250 | ctrl_reg |= 0x0; |
| 251 | } |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 252 | ret = xI2cMesonWrite(bd718x7_slave_address, BD718XX_REG_OUT32K, &ctrl_reg, 1); |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 253 | if (ret < 0) { |
| 254 | printf("i2c osc write failed\n"); |
| 255 | return; |
| 256 | } |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 257 | } |
| 258 | |
| 259 | static const struct regulator_ops bd718xx_dvs_buck_regulator_ops = { |
| 260 | .ctrl = bd71837_regulator_ctrl, |
| 261 | .set_voltage = bd71837_regulator_set_voltage, |
| 262 | }; |
| 263 | |
| 264 | struct regulator_desc bd71837_desc[15] = { |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 265 | { |
| 266 | .name = "buck1", |
| 267 | .id = BD718XX_BUCK1, |
| 268 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 269 | .linear_ranges = bd718xx_dvs_buck_volts, |
| 270 | .n_linear_ranges = ARRAY_SIZE(bd718xx_dvs_buck_volts), |
| 271 | .enable_reg = BD718XX_REG_BUCK1_CTRL, |
| 272 | .enable_mask = 0x3, //bit0 = 1, bit1 = 1 |
| 273 | .enable_val = 0x3, |
| 274 | .disable_val = 0x2, //bitt = 0 ,bit1 = 1 |
| 275 | .vsel_reg = BD718XX_REG_BUCK1_VOLT_RUN, |
| 276 | .vsel_mask = 0x3f, |
| 277 | }, |
| 278 | { |
| 279 | .name = "buck2", |
| 280 | .id = BD718XX_BUCK2, |
| 281 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 282 | .linear_ranges = bd718xx_dvs_buck_volts, |
| 283 | .n_linear_ranges = ARRAY_SIZE(bd718xx_dvs_buck_volts), |
| 284 | .enable_reg = BD718XX_REG_BUCK2_CTRL, |
| 285 | .enable_mask = 0x3, //bit0 =1 ,bit1 = 1; |
| 286 | .enable_val = 0x3, |
| 287 | .disable_val = 0x2, //bitt = 0 ,bit1 = 1 |
| 288 | .vsel_reg = BD718XX_REG_BUCK2_VOLT_RUN, |
| 289 | .vsel_mask = 0x3f, |
| 290 | }, |
| 291 | { |
| 292 | .name = "buck3", |
| 293 | .id = BD718XX_BUCK3, |
| 294 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 295 | .linear_ranges = bd718xx_dvs_buck_volts, |
| 296 | .n_linear_ranges = ARRAY_SIZE(bd718xx_dvs_buck_volts), |
| 297 | .enable_reg = BD71837_REG_BUCK3_CTRL, |
| 298 | .enable_mask = 0x7, //bit0 =1 ,bit1 = 1 , bit2 = 1; |
| 299 | .enable_val = 0x7, |
| 300 | .disable_val = 0x2, //bitt = 0 ,bit1 = 1 |
| 301 | .vsel_reg = BD71837_REG_BUCK3_VOLT_RUN, |
| 302 | .vsel_mask = 0x3f, |
| 303 | }, |
| 304 | { |
| 305 | .name = "buck4", |
| 306 | .id = BD718XX_BUCK4, |
| 307 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 308 | .linear_ranges = bd718xx_dvs_buck_volts, |
| 309 | .n_linear_ranges = ARRAY_SIZE(bd718xx_dvs_buck_volts), |
| 310 | .enable_reg = BD71837_REG_BUCK4_CTRL, |
| 311 | .enable_mask = 0x7, //bit0 =1 ,bit1 = 1 , bit2 = 1; |
| 312 | .enable_val = 0x7, |
| 313 | .disable_val = 0x2, //bitt = 0 ,bit1 = 1 |
| 314 | .vsel_reg = BD71837_REG_BUCK4_VOLT_RUN, |
| 315 | .vsel_mask = 0x3f, |
| 316 | }, |
| 317 | { |
| 318 | .name = "buck5", |
| 319 | .id = BD718XX_BUCK5, |
| 320 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 321 | .linear_ranges = bd71837_buck5_volts, |
| 322 | .n_linear_ranges = ARRAY_SIZE(bd71837_buck5_volts), |
| 323 | .enable_reg = BD718XX_REG_1ST_NODVS_BUCK_CTRL, |
| 324 | .enable_mask = 0x3, //bit0 =1 ,bit1 = 1 |
| 325 | .enable_val = 0x3, |
| 326 | .disable_val = 0x2, //bit0 = 0 ,bit1 = 1 |
| 327 | .vsel_reg = BD718XX_REG_1ST_NODVS_BUCK_VOLT, |
| 328 | .vsel_mask = 0x7, // 某认bit7 = 0 |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 329 | |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 330 | }, |
| 331 | { |
| 332 | .name = "buck6", |
| 333 | .id = BD718XX_BUCK6, |
| 334 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 335 | .linear_ranges = bd71837_buck6_volts, |
| 336 | .n_linear_ranges = ARRAY_SIZE(bd71837_buck6_volts), |
| 337 | .enable_reg = BD718XX_REG_2ND_NODVS_BUCK_CTRL, |
| 338 | .enable_mask = 0x3, //bit0 =1 ,bit1 = 1, |
| 339 | .enable_val = 0x3, |
| 340 | .disable_val = 0x2, //bit0 = 0 ,bit1 = 1 |
| 341 | .vsel_reg = BD718XX_REG_2ND_NODVS_BUCK_VOLT, |
| 342 | .vsel_mask = 0x3, |
| 343 | }, |
| 344 | { |
| 345 | .name = "buck7", |
| 346 | .id = BD718XX_BUCK7, |
| 347 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 348 | .volt_table = &bd71837_buck7_volts[0], |
| 349 | .n_voltages = sizeof(bd71837_buck7_volts), |
| 350 | .enable_reg = BD718XX_REG_3RD_NODVS_BUCK_CTRL, |
| 351 | .enable_mask = 0x3, //bit0 =1 ,bit1 = 1, |
| 352 | .enable_val = 0x3, |
| 353 | .disable_val = 0x2, //bit0 = 0 ,bit1 = 1 |
| 354 | .vsel_reg = BD718XX_REG_3RD_NODVS_BUCK_VOLT, |
| 355 | .vsel_mask = 0x7, |
| 356 | }, |
| 357 | { |
| 358 | .name = "buck8", |
| 359 | .id = BD718XX_BUCK8, |
| 360 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 361 | .linear_ranges = bd71837_buck8_volts, |
| 362 | .n_linear_ranges = ARRAY_SIZE(bd71837_buck8_volts), |
| 363 | .enable_reg = BD718XX_REG_4TH_NODVS_BUCK_CTRL, |
| 364 | .enable_mask = 0x3, //bit0 =1 ,bit1 = 1, |
| 365 | .enable_val = 0x3, |
| 366 | .disable_val = 0x2, //bit0 = 0 ,bit1 = 1 |
| 367 | .vsel_reg = BD718XX_REG_4TH_NODVS_BUCK_VOLT, |
| 368 | .vsel_mask = 0x3f, |
| 369 | }, |
| 370 | { |
| 371 | .name = "ldo1", |
| 372 | .id = BD718XX_LDO1, |
| 373 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 374 | .linear_ranges = bd718xx_ldo1_volts, |
| 375 | .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo1_volts), |
| 376 | .ldo_reg = BD718XX_REG_LDO1_VOLT, |
| 377 | .ldo_mask_ctrl = 0xe0, //bit5 = 1,bit6 =1,bit7 =1 |
| 378 | .ldo_val_ctrl = 0xe0, |
| 379 | .ldo_val_ctrl_disable = 0x80, //bit6 =0 ,bit7 = 1 |
| 380 | .ldo_out_mask = 0x3, //bit0-bit1 = 1 |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 381 | |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 382 | }, |
| 383 | { |
| 384 | .name = "ldo2", |
| 385 | .id = BD718XX_LDO2, |
| 386 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 387 | .volt_table = &ldo_2_volts[0], |
| 388 | .n_voltages = ARRAY_SIZE(bd71837_buck8_volts), |
| 389 | .ldo_reg = BD718XX_REG_LDO2_VOLT, |
| 390 | .ldo_mask_ctrl = 0xc0, //bit6 =1,bit7 =1 |
| 391 | .ldo_val_ctrl = 0xc0, |
| 392 | .ldo_val_ctrl_disable = 0x80, //bit6 =0 ,bit7 = 1 |
| 393 | .ldo_out_mask = 0x20, //bit5 = 1 |
| 394 | }, |
| 395 | { |
| 396 | .name = "ldo3", |
| 397 | .id = BD718XX_LDO3, |
| 398 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 399 | .linear_ranges = bd718xx_ldo3_volts, |
| 400 | .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo3_volts), |
| 401 | .ldo_reg = BD718XX_REG_LDO3_VOLT, |
| 402 | .ldo_mask_ctrl = 0xc0, //bit6=1,bi7=1 |
| 403 | .ldo_val_ctrl = 0xc0, |
| 404 | .ldo_val_ctrl_disable = 0x80, //bit6 =0 ,bit7 = 1 |
| 405 | .ldo_out_mask = 0xf, //bit0-bit3 = 1 |
| 406 | }, |
| 407 | { |
| 408 | .name = "ldo4", |
| 409 | .id = BD718XX_LDO4, |
| 410 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 411 | .linear_ranges = bd718xx_ldo4_volts, |
| 412 | .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo4_volts), |
| 413 | .ldo_reg = BD718XX_REG_LDO4_VOLT, |
| 414 | .ldo_mask_ctrl = 0xc0, //bit6=1,bi7=1, |
| 415 | .ldo_val_ctrl = 0xc0, |
| 416 | .ldo_val_ctrl_disable = 0x80, //bit6 =0 ,bit7 = 1 |
| 417 | .ldo_out_mask = 0xf, //bit0-bit3 = 1 |
| 418 | }, |
| 419 | { |
| 420 | .name = "ldo5", |
| 421 | .id = BD718XX_LDO5, |
| 422 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 423 | .linear_ranges = bd71837_ldo5_volts, |
| 424 | .n_linear_ranges = ARRAY_SIZE(bd71837_ldo5_volts), |
| 425 | .ldo_reg = BD718XX_REG_LDO5_VOLT, |
| 426 | .ldo_mask_ctrl = 0xc0, //bit6=1,bi7=1, |
| 427 | .ldo_val_ctrl = 0xc0, |
| 428 | .ldo_val_ctrl_disable = 0x80, //bit6 =0 ,bit7 = 1 |
| 429 | .ldo_out_mask = 0xf, //bit0-bit3 = 1 |
| 430 | }, |
| 431 | { |
| 432 | .name = "ldo6", |
| 433 | .id = BD718XX_LDO6, |
| 434 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 435 | .linear_ranges = bd718xx_ldo6_volts, |
| 436 | .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo6_volts), |
| 437 | .ldo_reg = BD718XX_REG_LDO6_VOLT, |
| 438 | .ldo_mask_ctrl = 0xc0, //bit6=1,bi7=1, |
| 439 | .ldo_val_ctrl = 0xc0, |
| 440 | .ldo_val_ctrl_disable = 0x80, //bit6 =0 ,bit7 = 1 |
| 441 | .ldo_out_mask = 0xf, //bit0-bit3 = 1 |
| 442 | }, |
| 443 | { |
| 444 | .name = "ldo7", |
| 445 | .id = BD718XX_LDO7, |
| 446 | .ops = &bd718xx_dvs_buck_regulator_ops, |
| 447 | .linear_ranges = bd71837_ldo7_volts, |
| 448 | .n_linear_ranges = ARRAY_SIZE(bd71837_ldo7_volts), |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 449 | |
xiaohu.huang | 2beac51 | 2022-05-07 15:10:04 +0800 | [diff] [blame] | 450 | .ldo_reg = BD71837_REG_LDO7_VOLT, |
| 451 | .ldo_mask_ctrl = 0xc0, //bit6=1,bi7=1, |
| 452 | .ldo_val_ctrl = 0xc0, |
| 453 | .ldo_val_ctrl_disable = 0x80, //bit6 =0 ,bit7 = 1 |
| 454 | .ldo_out_mask = 0xf, //bit0-bit3 = 1 |
| 455 | }, |
Kelvin Zhang | c4c3dd1 | 2021-12-24 20:59:18 +0800 | [diff] [blame] | 456 | |
| 457 | }; |
| 458 | |
| 459 | struct pmic_regulator BD71837_PMIC = { |
| 460 | .pmic_i2c_config = BD71837_PMIC_I2C_INIT, |
| 461 | .osc_ctrl = bd71837_osc_ctrl, |
| 462 | .rdev = bd71837_desc, |
| 463 | .num = ARRAY_SIZE(bd71837_desc), |
| 464 | }; |